diff --git a/audio/tangorpro/config/audio_platform_configuration.xml b/audio/tangorpro/config/audio_platform_configuration.xml
index 3a4f57f..4725555 100644
--- a/audio/tangorpro/config/audio_platform_configuration.xml
+++ b/audio/tangorpro/config/audio_platform_configuration.xml
@@ -192,7 +192,7 @@
         <!-- dev1: audio dev2: haptic -->
         <usecase id="UC_HAPTIC_AUDIO" dev1="2" dev2="7" period="10" period_num="4"/>
         <!-- for VOIP output, 4 * 10ms buffer -->
-        <usecase id="UC_VOIP_PLAYBACK" dev1="16" dyn_path="true" dsp_vol="true" mmap="false" period="10" period_num="4"/>
+        <usecase id="UC_VOIP_PLAYBACK" dev1="16" dyn_path="true" dsp_vol="true" mmap="false" period="10" period_num="4" pcm_ch="2"/>
         <!-- for input -->
         <usecase id="UC_AUDIO_RECORD" dev1="8" dyn_path="true" dsp_vol="false" mmap="false" period="20" period_num="4"/>
         <usecase id="UC_HOSTLESS_UL" dev1="15"/>
@@ -293,7 +293,7 @@
     <external_module>
         <module libname="audio_waves_aoc.so" argu="Sink=SPK:1,USB_DOCK:4,USB_HP:4"/>
         <module libname="audio_spk_35l41.so" argu="SpeakerNum=4"/>
-        <module libname="audio_fortemedia_aoc.so" argu="RTN_SUP=y Legacy_VoIP=y DOCK_CHARGER_MONITOR=y"/>
+        <module libname="audio_fortemedia_aoc.so" argu="RTN_SUP=y Legacy_VoIP=y DOCK_CHARGER_MONITOR=y DL_CH=y VoIP_DLCHs=SPK:1,USB:1"/>
         <module libname="liboffloadeffect.so"/>
         <module libname="audio_amcs_ext.so"/>
         <module libname="audio_bluenote_aoc.so"/>
diff --git a/audio/tangorpro/tuning/fortemedia/BLUETOOTH.dat b/audio/tangorpro/tuning/fortemedia/BLUETOOTH.dat
index 1337d3a..3c2a8ce 100644
Binary files a/audio/tangorpro/tuning/fortemedia/BLUETOOTH.dat and b/audio/tangorpro/tuning/fortemedia/BLUETOOTH.dat differ
diff --git a/audio/tangorpro/tuning/fortemedia/BLUETOOTH.mods b/audio/tangorpro/tuning/fortemedia/BLUETOOTH.mods
index 34b73b9..2003ec9 100644
--- a/audio/tangorpro/tuning/fortemedia/BLUETOOTH.mods
+++ b/audio/tangorpro/tuning/fortemedia/BLUETOOTH.mods
@@ -1,16 +1,2688 @@
 #PLATFORM_NAME  gChip
-#SINGLE_API_VER  1.1.6
-#SAVE_TIME  2021-01-15 16:26:09
+#EXPORT_FLAG  BLUETOOTH
+#SINGLE_API_VER  1.2.1
+#SAVE_TIME  2022-06-10 12:44:00
+
+#CASE_NAME  BLUETOOTH-RESERVE1-VOICE_GENERIC-FB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0000    //TX_PATCH_REG
+3    0x0000    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0078    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0800    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0000    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0000    //TX_MICS_OF_PAIR0
+38    0x0000    //TX_MICS_OF_PAIR1
+39    0x0000    //TX_MICS_OF_PAIR2
+40    0x0000    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0003    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x0000    //TX_HD_BIN_MASK
+53    0x0000    //TX_HD_SUBAND_MASK
+54    0x0000    //TX_HD_FRAME_AVG_MASK
+55    0x0000    //TX_HD_MIN_FRQ
+56    0x0000    //TX_HD_ALPHA_PSD
+57    0x0000    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0x0000    //TX_T_PSDVAT
+63    0x0000    //TX_CNT
+64    0x0000    //TX_ANTI_HOWL_GAIN
+65    0x0000    //TX_MICFORBFMARK_0
+66    0x0000    //TX_MICFORBFMARK_1
+67    0x0000    //TX_MICFORBFMARK_2
+68    0x0000    //TX_MICFORBFMARK_3
+69    0x0000    //TX_MICFORBFMARK_4
+70    0x0000    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x0000    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x0000    //TX_ADCS_GAIN
+112    0x0000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x7FFF    //TX_BLMIC_BLKFACTOR
+116    0x7FFF    //TX_BRMIC_BLKFACTOR
+117    0x000A    //TX_MICBLK_START_BIN
+118    0x0041    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x0000    //TX_FE_ENER_TH_MTS
+124    0x0000    //TX_FE_ENER_TH_EXP
+125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0020    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7800    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6000    //TX_THR_PITCH_DET_2
+133    0x0000    //TX_PITCH_BFR_LEN
+134    0x0000    //TX_SBD_PITCH_DET
+135    0x0000    //TX_TD_AEC_L
+136    0x0000    //TX_MU0_UNP_TD_AEC
+137    0x0000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x2000    //TX_AEC_REF_GAIN_0
+148    0x2000    //TX_AEC_REF_GAIN_1
+149    0x2000    //TX_AEC_REF_GAIN_2
+150    0x4000    //TX_EAD_THR
+151    0x0200    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x0000    //TX_C_POST_FLT
+168    0x728A    //TX_GAIN_NP
+169    0x0008    //TX_SE_HOLD_N
+170    0x0050    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x0000    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x0000    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0000    //TX_FRQ_LIN_LEN
+184    0x0000    //TX_FRQ_AEC_LEN_RHO
+185    0x0000    //TX_MU0_UNP_FRQ_AEC
+186    0x0000    //TX_MU0_PTD_FRQ_AEC
+187    0x0000    //TX_MINENOISETH
+188    0x0000    //TX_MU0_RE_EST
+189    0x0000    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x0000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7333    //TX_DTD_THR1_0
+198    0x7333    //TX_DTD_THR1_1
+199    0x7333    //TX_DTD_THR1_2
+200    0x7333    //TX_DTD_THR1_3
+201    0x7333    //TX_DTD_THR1_4
+202    0x7333    //TX_DTD_THR1_5
+203    0x7333    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0400    //TX_DT_CUT_K
+214    0x0000    //TX_DT_CUT_THR
+215    0x0000    //TX_COMFORT_G
+216    0x0000    //TX_POWER_YOUT_TH
+217    0x0000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0000    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x0000    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0000    //TX_DT_RESRV_7
+240    0x0000    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF200    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF800    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0A00    //TX_N_SN_EST
+267    0x0000    //TX_INBEAM_T
+268    0x0000    //TX_INBEAMHOLDT
+269    0x1FFF    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0000    //TX_B_POST_FLT_0
+280    0x0000    //TX_B_POST_FLT_1
+281    0x001A    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x000C    //TX_NS_LVL_CTRL_3
+285    0x000C    //TX_NS_LVL_CTRL_4
+286    0x000C    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x000C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0014    //TX_MIN_GAIN_S_1
+291    0x0014    //TX_MIN_GAIN_S_2
+292    0x0014    //TX_MIN_GAIN_S_3
+293    0x0014    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x0000    //TX_NMOS_SUP
+298    0x0064    //TX_NS_MAX_PRI_SNR_TH
+299    0x7FFF    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x1200    //TX_THR_LFNS
+309    0x0028    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x7FFF    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x7FFF    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x1000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x6666    //TX_A_POST_FILT_S_3
+318    0x6666    //TX_A_POST_FILT_S_4
+319    0x6666    //TX_A_POST_FILT_S_5
+320    0x199A    //TX_A_POST_FILT_S_6
+321    0x6666    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7E00    //TX_LAMBDA_PFILT_S_0
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
+343    0x7E00    //TX_LAMBDA_PFILT_S_4
+344    0x7E00    //TX_LAMBDA_PFILT_S_5
+345    0x7E00    //TX_LAMBDA_PFILT_S_6
+346    0x7E00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x0FA0    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0000    //TX_DT_BINVAD_TH_0
+354    0x0000    //TX_DT_BINVAD_TH_1
+355    0x0000    //TX_DT_BINVAD_TH_2
+356    0x0000    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0001    //TX_BF_SGRAD_FLG
+362    0x0000    //TX_BF_DVG_TH
+363    0x0000    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x05A0    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1388    //TX_NOISE_TH_0_2
+369    0x3A98    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x0032    //TX_NOISE_TH_2
+372    0x3D54    //TX_NOISE_TH_3
+373    0x012C    //TX_NOISE_TH_4
+374    0x07D0    //TX_NOISE_TH_5
+375    0x6590    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x00C8    //TX_NOISE_TH_6
+379    0x000A    //TX_MINENOISE_TH
+380    0x0000    //TX_MORENS_TFMASK_TH
+381    0x0000    //TX_DRC_QUIET_FLOOR
+382    0x0000    //TX_RATIODTL_CUT_TH
+383    0x0000    //TX_DT_CUT_K1
+384    0x0640    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0640    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0640    //TX_OUT_ENER_S_TH_NOISY
+387    0x0190    //TX_OUT_ENER_TH_NOISE
+388    0x07D0    //TX_OUT_ENER_TH_SPEECH
+389    0x0000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0000    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0000    //TX_EXTRA_NS_L
+398    0x0000    //TX_C_POST_FLT_MASK
+399    0x0000    //TX_A_POST_FLT_WNS
+400    0x0000    //TX_MIN_G_LOW300HZ
+401    0x0010    //TX_MAXLEVEL_CNG
+402    0x0000    //TX_STN_NOISE_TH
+403    0x0000    //TX_POST_MASK_SUP
+404    0x0000    //TX_POST_MASK_ADJUST
+405    0x0014    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x0226    //TX_MINENOISE_MIC0_S_TH
+408    0x2879    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x0800    //TX_RHO_UPB
+415    0x0B40    //TX_N_HOLD_HS
+416    0x005A    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x0219    //TX_THR_STD_PLH
+421    0x09C4    //TX_N_HOLD_STD
+422    0x0166    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x1000    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0000    //TX_HS_VAD_BIN
+435    0x0000    //TX_THR_VAD_HS
+436    0x0000    //TX_MEAN_RTO_MIN_TH2
+437    0x0000    //TX_SILENCE_T
+438    0x4000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x001E    //TX_DOA_VAD_THR_1
+445    0x001E    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x005A    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x005A    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x005A    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0172    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x071C    //TX_DOA_TRACK_HT
+477    0x0280    //TX_N1_HOLD_HF
+478    0x0140    //TX_N2_HOLD_HF
+479    0x2AAB    //TX_BF_RESET_THR_HF
+480    0x4000    //TX_DOA_SMOOTH
+481    0x0000    //TX_MU_BF
+482    0x0200    //TX_BF_MU_LF_B2
+483    0x0000    //TX_BF_FC_END_BIN_B2
+484    0x0000    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0000    //TX_N_DOA_SEED
+488    0x0000    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x0000    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x0000    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x0000    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0168    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0004    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0230    //TX_NOR_OFF_TH1
+503    0xD333    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x6666    //TX_MICTOBFGAIN0
+513    0x0014    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x0000    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0028    //TX_SNR_THR
+531    0x03E8    //TX_ENGY_THR
+532    0x0000    //TX_CORR_HIGH_TH
+533    0x0000    //TX_ENGY_THR_2
+534    0x0000    //TX_MEAN_RTO_THR
+535    0x0000    //TX_WNS_ENOISE_MIC0_TH
+536    0x0000    //TX_RATIOMICL_TH
+537    0x0000    //TX_CALIG_HS
+538    0x000A    //TX_LVL_CTRL
+539    0x0000    //TX_WIND_SUPRTO
+540    0x0000    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x0000    //TX_RATIOMICH_TH
+543    0x0000    //TX_WIND_INBEAM_L_TH
+544    0x0000    //TX_WIND_INBEAM_H_TH
+545    0x0000    //TX_WNS_RESRV_0
+546    0x0000    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0000    //TX_FDEQ_BIN_0
+592    0x0000    //TX_FDEQ_BIN_1
+593    0x0000    //TX_FDEQ_BIN_2
+594    0x0000    //TX_FDEQ_BIN_3
+595    0x0000    //TX_FDEQ_BIN_4
+596    0x0000    //TX_FDEQ_BIN_5
+597    0x0000    //TX_FDEQ_BIN_6
+598    0x0000    //TX_FDEQ_BIN_7
+599    0x0000    //TX_FDEQ_BIN_8
+600    0x0000    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0000    //TX_PREEQ_BIN_MIC0_0
+642    0x0000    //TX_PREEQ_BIN_MIC0_1
+643    0x0000    //TX_PREEQ_BIN_MIC0_2
+644    0x0000    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0000    //TX_PREEQ_BIN_MIC1_0
+691    0x0000    //TX_PREEQ_BIN_MIC1_1
+692    0x0000    //TX_PREEQ_BIN_MIC1_2
+693    0x0000    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0000    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0064    //TX_MIC_CALIBRATION_0
+766    0x006A    //TX_MIC_CALIBRATION_1
+767    0x006A    //TX_MIC_CALIBRATION_2
+768    0x006B    //TX_MIC_CALIBRATION_3
+769    0x0048    //TX_MIC_PWR_BIAS_0
+770    0x003C    //TX_MIC_PWR_BIAS_1
+771    0x003C    //TX_MIC_PWR_BIAS_2
+772    0x003C    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
+788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
+789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
+790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
+791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0002    //TX_DEADMIC_SILENCE_TH
+817    0x0147    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x0000    //TX_KS_NOISEPASTE_FACTOR
+824    0x0000    //TX_KS_CONFIG
+825    0x0000    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x0000    //TX_A_POST_FLT_FP
+835    0x0000    //TX_RTO_OUTBEAM_TH
+836    0x0000    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0000    //TX_FFP_RESRV_2
+849    0x0000    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x0E80    //TX_TDDRC_THRD_2
+857    0x3800    //TX_TDDRC_THRD_3
+858    0x2A00    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x0000    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0000    //TX_TDDRC_SMT_W
+866    0x0100    //TX_TDDRC_DRC_GAIN
+867    0x0000    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x1EB8    //TX_TFMASKLTH
+870    0x170A    //TX_TFMASKLTHL
+871    0x4000    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x0000    //TX_FASTNS_OUTIN_TH
+884    0x0000    //TX_FASTNS_TFMASK_TH
+885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xD99A    //TX_FASTNS_MASK5_TH
+890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x0000    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0000    //RX_PITCH_BFR_LEN
+17    0x0000    //RX_SBD_PITCH_DET
+18    0x0000    //RX_PP_RESRV_0
+19    0x0000    //RX_PP_RESRV_1
+20    0xF800    //RX_N_SN_EST
+21    0x0000    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0000    //RX_FENS_RESRV_1
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+30    0x0000    //RX_EXTRA_NS_L
+31    0x0000    //RX_EXTRA_NS_A
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x0000    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x000C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0010    //RX_MAXLEVEL_CNG
+132    0x0000    //RX_BWE_UV_TH
+133    0x0000    //RX_BWE_UV_TH2
+134    0x0000    //RX_BWE_UV_TH3
+135    0x0000    //RX_BWE_V_TH
+136    0x0000    //RX_BWE_GAIN1_V_TH1
+137    0x0000    //RX_BWE_GAIN1_V_TH2
+138    0x0000    //RX_BWE_UV_EQ
+139    0x0000    //RX_BWE_V_EQ
+140    0x0000    //RX_BWE_TONE_TH
+141    0x0000    //RX_BWE_UV_HOLD_T
+142    0x0000    //RX_BWE_GAIN2_ALPHA
+143    0x0000    //RX_BWE_GAIN3_ALPHA
+144    0x0000    //RX_BWE_CUTOFF
+145    0x0000    //RX_BWE_GAINFILL
+146    0x0000    //RX_BWE_MAXTH_TONE
+147    0x0000    //RX_BWE_EQ_0
+148    0x0000    //RX_BWE_EQ_1
+149    0x0000    //RX_BWE_EQ_2
+150    0x0000    //RX_BWE_EQ_3
+151    0x0000    //RX_BWE_EQ_4
+152    0x0000    //RX_BWE_EQ_5
+153    0x0000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0014    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0021    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0037    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x0000    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0000    //RX_PITCH_BFR_LEN
+174    0x0000    //RX_SBD_PITCH_DET
+175    0x0000    //RX_PP_RESRV_0
+176    0x0000    //RX_PP_RESRV_1
+177    0xF800    //RX_N_SN_EST
+178    0x0000    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0000    //RX_FENS_RESRV_1
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+187    0x0000    //RX_EXTRA_NS_L
+188    0x0000    //RX_EXTRA_NS_A
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x0000    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x000C    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0010    //RX_MAXLEVEL_CNG
+289    0x0000    //RX_BWE_UV_TH
+290    0x0000    //RX_BWE_UV_TH2
+291    0x0000    //RX_BWE_UV_TH3
+292    0x0000    //RX_BWE_V_TH
+293    0x0000    //RX_BWE_GAIN1_V_TH1
+294    0x0000    //RX_BWE_GAIN1_V_TH2
+295    0x0000    //RX_BWE_UV_EQ
+296    0x0000    //RX_BWE_V_EQ
+297    0x0000    //RX_BWE_TONE_TH
+298    0x0000    //RX_BWE_UV_HOLD_T
+299    0x0000    //RX_BWE_GAIN2_ALPHA
+300    0x0000    //RX_BWE_GAIN3_ALPHA
+301    0x0000    //RX_BWE_CUTOFF
+302    0x0000    //RX_BWE_GAINFILL
+303    0x0000    //RX_BWE_MAXTH_TONE
+304    0x0000    //RX_BWE_EQ_0
+305    0x0000    //RX_BWE_EQ_1
+306    0x0000    //RX_BWE_EQ_2
+307    0x0000    //RX_BWE_EQ_3
+308    0x0000    //RX_BWE_EQ_4
+309    0x0000    //RX_BWE_EQ_5
+310    0x0000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000C    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0014    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0021    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0037    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-NB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2F7C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x0073    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0003    //TX_NUM_MIC
 6    0x0000    //TX_SAMPLINGFREQ_SIG
 7    0x0000    //TX_SAMPLINGFREQ_PROC
@@ -27,8 +2699,8 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
-22    0x000D    //TX_DIST2REF_02
+21    0x009C    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
@@ -47,8 +2719,8 @@
 38    0x0002    //TX_MICS_OF_PAIR1
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
 43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
@@ -114,7 +2786,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -156,7 +2828,7 @@
 147    0x0100    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7500    //TX_EAD_THR
+150    0x7A00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
 152    0x0200    //TX_MIN_EQ_RE_EST_0
 153    0x0200    //TX_MIN_EQ_RE_EST_1
@@ -171,13 +2843,13 @@
 162    0x4000    //TX_MIN_EQ_RE_EST_10
 163    0x6000    //TX_MIN_EQ_RE_EST_11
 164    0x7FFF    //TX_MIN_EQ_RE_EST_12
-165    0x2000    //TX_LAMBDA_RE_EST
+165    0x4000    //TX_LAMBDA_RE_EST
 166    0x0000    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x2000    //TX_GAIN_NP
 169    0x0180    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
+171    0x0200    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -203,14 +2875,14 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7FF0    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
+197    0x7148    //TX_DTD_THR1_0
+198    0x7148    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
-204    0x7E00    //TX_DTD_THR2_0
+204    0x0CCD    //TX_DTD_THR2_0
 205    0x0CCD    //TX_DTD_THR2_1
 206    0x0CCD    //TX_DTD_THR2_2
 207    0x0CCD    //TX_DTD_THR2_3
@@ -234,7 +2906,7 @@
 225    0x1770    //TX_RATIO_DT_L_TH_HIGH
 226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
 227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
+228    0x2000    //TX_B_POST_FILT_ECHO_L
 229    0x2000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
@@ -243,8 +2915,8 @@
 234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -257,12 +2929,12 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0050    //TX_DELTA_THR_SN_EST_0
-251    0x01A0    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x01A0    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -288,28 +2960,28 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0012    //TX_NS_LVL_CTRL_1
-283    0x0017    //TX_NS_LVL_CTRL_2
-284    0x0015    //TX_NS_LVL_CTRL_3
+282    0x0017    //TX_NS_LVL_CTRL_1
+283    0x0015    //TX_NS_LVL_CTRL_2
+284    0x0012    //TX_NS_LVL_CTRL_3
 285    0x0012    //TX_NS_LVL_CTRL_4
-286    0x0012    //TX_NS_LVL_CTRL_5
-287    0x0011    //TX_NS_LVL_CTRL_6
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0012    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000F    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000D    //TX_MIN_GAIN_S_2
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
 292    0x000F    //TX_MIN_GAIN_S_3
 293    0x000F    //TX_MIN_GAIN_S_4
-294    0x000F    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x000F    //TX_MIN_GAIN_S_6
 296    0x000F    //TX_MIN_GAIN_S_7
 297    0x4000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
+301    0x1000    //TX_SNRI_SUP_1
 302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
+303    0x2400    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
 306    0x4000    //TX_SNRI_SUP_6
@@ -321,19 +2993,19 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x3000    //TX_A_POST_FILT_S_5
+315    0x2000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x1000    //TX_A_POST_FILT_S_3
+318    0x3000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
 320    0x5000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x5000    //TX_B_POST_FILT_4
-327    0x3000    //TX_B_POST_FILT_5
+324    0x1000    //TX_B_POST_FILT_2
+325    0x5000    //TX_B_POST_FILT_3
+326    0x3000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
@@ -346,12 +3018,12 @@
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7E00    //TX_LAMBDA_PFILT
 339    0x7D00    //TX_LAMBDA_PFILT_S_0
-340    0x7900    //TX_LAMBDA_PFILT_S_1
-341    0x7400    //TX_LAMBDA_PFILT_S_2
-342    0x7900    //TX_LAMBDA_PFILT_S_3
+340    0x7400    //TX_LAMBDA_PFILT_S_1
+341    0x7900    //TX_LAMBDA_PFILT_S_2
+342    0x7000    //TX_LAMBDA_PFILT_S_3
 343    0x7D00    //TX_LAMBDA_PFILT_S_4
 344    0x7D00    //TX_LAMBDA_PFILT_S_5
-345    0x7D00    //TX_LAMBDA_PFILT_S_6
+345    0x7900    //TX_LAMBDA_PFILT_S_6
 346    0x7D00    //TX_LAMBDA_PFILT_S_7
 347    0x0200    //TX_K_PEPPER
 348    0x0800    //TX_A_PEPPER
@@ -364,7 +3036,7 @@
 355    0x0800    //TX_DT_BINVAD_TH_2
 356    0x0800    //TX_DT_BINVAD_TH_3
 357    0x0FA0    //TX_DT_BINVAD_ENDF
-358    0x0400    //TX_C_POST_FLT_DT
+358    0x0200    //TX_C_POST_FLT_DT
 359    0x4000    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0100    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -379,17 +3051,17 @@
 370    0x07D0    //TX_NOISE_TH_1
 371    0x03ED    //TX_NOISE_TH_2
 372    0x2EE0    //TX_NOISE_TH_3
-373    0x55F0    //TX_NOISE_TH_4
+373    0x5528    //TX_NOISE_TH_4
 374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x0FA0    //TX_NOISE_TH_6
 379    0x000A    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -397,17 +3069,17 @@
 388    0x1000    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x7000    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
+401    0x0004    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
@@ -515,21 +3187,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -558,31 +3230,31 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0014    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
+567    0x5250    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4848    //TX_FDEQ_GAIN_2
-570    0x483C    //TX_FDEQ_GAIN_3
-571    0x303C    //TX_FDEQ_GAIN_4
-572    0x3048    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
+570    0x4A43    //TX_FDEQ_GAIN_3
+571    0x374B    //TX_FDEQ_GAIN_4
+572    0x3444    //TX_FDEQ_GAIN_5
+573    0x433C    //TX_FDEQ_GAIN_6
+574    0x3A37    //TX_FDEQ_GAIN_7
+575    0x2A2A    //TX_FDEQ_GAIN_8
+576    0x2C2C    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
 579    0x4848    //TX_FDEQ_GAIN_12
@@ -606,7 +3278,7 @@
 597    0x0708    //TX_FDEQ_BIN_6
 598    0x090A    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D08    //TX_FDEQ_BIN_9
+600    0x0D0E    //TX_FDEQ_BIN_9
 601    0x0000    //TX_FDEQ_BIN_10
 602    0x0000    //TX_FDEQ_BIN_11
 603    0x0000    //TX_FDEQ_BIN_12
@@ -622,7 +3294,7 @@
 613    0x0000    //TX_FDEQ_BIN_22
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+616    0x0014    //TX_PREEQ_SUBNUM_MIC0
 617    0x4848    //TX_PREEQ_GAIN_MIC0_0
 618    0x4848    //TX_PREEQ_GAIN_MIC0_1
 619    0x4848    //TX_PREEQ_GAIN_MIC0_2
@@ -647,16 +3319,16 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x7800    //TX_PREEQ_BIN_MIC0_0
-642    0x0000    //TX_PREEQ_BIN_MIC0_1
-643    0x0000    //TX_PREEQ_BIN_MIC0_2
-644    0x0000    //TX_PREEQ_BIN_MIC0_3
-645    0x0000    //TX_PREEQ_BIN_MIC0_4
-646    0x0000    //TX_PREEQ_BIN_MIC0_5
-647    0x0000    //TX_PREEQ_BIN_MIC0_6
-648    0x0000    //TX_PREEQ_BIN_MIC0_7
-649    0x0000    //TX_PREEQ_BIN_MIC0_8
-650    0x0000    //TX_PREEQ_BIN_MIC0_9
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
 651    0x0000    //TX_PREEQ_BIN_MIC0_10
 652    0x0000    //TX_PREEQ_BIN_MIC0_11
 653    0x0000    //TX_PREEQ_BIN_MIC0_12
@@ -672,16 +3344,16 @@
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
 665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4846    //TX_PREEQ_GAIN_MIC1_0
-667    0x4544    //TX_PREEQ_GAIN_MIC1_1
-668    0x4240    //TX_PREEQ_GAIN_MIC1_2
-669    0x3E48    //TX_PREEQ_GAIN_MIC1_3
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+673    0x4A4A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4B4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4D4E    //TX_PREEQ_GAIN_MIC1_9
 676    0x4848    //TX_PREEQ_GAIN_MIC1_10
 677    0x4848    //TX_PREEQ_GAIN_MIC1_11
 678    0x4848    //TX_PREEQ_GAIN_MIC1_12
@@ -696,16 +3368,16 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x251A    //TX_PREEQ_BIN_MIC1_0
-691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
-692    0x0C08    //TX_PREEQ_BIN_MIC1_2
-693    0x0700    //TX_PREEQ_BIN_MIC1_3
-694    0x0000    //TX_PREEQ_BIN_MIC1_4
-695    0x0000    //TX_PREEQ_BIN_MIC1_5
-696    0x0000    //TX_PREEQ_BIN_MIC1_6
-697    0x0000    //TX_PREEQ_BIN_MIC1_7
-698    0x0000    //TX_PREEQ_BIN_MIC1_8
-699    0x0000    //TX_PREEQ_BIN_MIC1_9
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
 700    0x0000    //TX_PREEQ_BIN_MIC1_10
 701    0x0000    //TX_PREEQ_BIN_MIC1_11
 702    0x0000    //TX_PREEQ_BIN_MIC1_12
@@ -727,10 +3399,10 @@
 718    0x4848    //TX_PREEQ_GAIN_MIC2_3
 719    0x4848    //TX_PREEQ_GAIN_MIC2_4
 720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+721    0x484A    //TX_PREEQ_GAIN_MIC2_6
+722    0x4B4B    //TX_PREEQ_GAIN_MIC2_7
+723    0x4B4C    //TX_PREEQ_GAIN_MIC2_8
+724    0x4D50    //TX_PREEQ_GAIN_MIC2_9
 725    0x4848    //TX_PREEQ_GAIN_MIC2_10
 726    0x4848    //TX_PREEQ_GAIN_MIC2_11
 727    0x4848    //TX_PREEQ_GAIN_MIC2_12
@@ -745,16 +3417,16 @@
 736    0x4848    //TX_PREEQ_GAIN_MIC2_21
 737    0x4848    //TX_PREEQ_GAIN_MIC2_22
 738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x7800    //TX_PREEQ_BIN_MIC2_0
-740    0x0000    //TX_PREEQ_BIN_MIC2_1
-741    0x0000    //TX_PREEQ_BIN_MIC2_2
-742    0x0000    //TX_PREEQ_BIN_MIC2_3
-743    0x0000    //TX_PREEQ_BIN_MIC2_4
-744    0x0000    //TX_PREEQ_BIN_MIC2_5
-745    0x0000    //TX_PREEQ_BIN_MIC2_6
-746    0x0000    //TX_PREEQ_BIN_MIC2_7
-747    0x0000    //TX_PREEQ_BIN_MIC2_8
-748    0x0000    //TX_PREEQ_BIN_MIC2_9
+739    0x0202    //TX_PREEQ_BIN_MIC2_0
+740    0x0203    //TX_PREEQ_BIN_MIC2_1
+741    0x0303    //TX_PREEQ_BIN_MIC2_2
+742    0x0304    //TX_PREEQ_BIN_MIC2_3
+743    0x0405    //TX_PREEQ_BIN_MIC2_4
+744    0x0506    //TX_PREEQ_BIN_MIC2_5
+745    0x0708    //TX_PREEQ_BIN_MIC2_6
+746    0x090A    //TX_PREEQ_BIN_MIC2_7
+747    0x0B0C    //TX_PREEQ_BIN_MIC2_8
+748    0x0D0E    //TX_PREEQ_BIN_MIC2_9
 749    0x0000    //TX_PREEQ_BIN_MIC2_10
 750    0x0000    //TX_PREEQ_BIN_MIC2_11
 751    0x0000    //TX_PREEQ_BIN_MIC2_12
@@ -779,7 +3451,7 @@
 770    0x0044    //TX_MIC_PWR_BIAS_1
 771    0x0044    //TX_MIC_PWR_BIAS_2
 772    0x0044    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
+773    0x0000    //TX_GAIN_LIMIT_0
 774    0x000F    //TX_GAIN_LIMIT_1
 775    0x000F    //TX_GAIN_LIMIT_2
 776    0x000F    //TX_GAIN_LIMIT_3
@@ -872,7 +3544,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0970    //TX_TDDRC_DRC_GAIN
+866    0x0DCE    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -897,86 +3569,151 @@
 888    0x0028    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x0050    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x000C    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7E90    //TX_DTD_THR1_MICMUTE_0
+912    0x7918    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0xE0C0    //TX_AMS_RESRV_02
+945    0x1770    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0000    //RX_RECVFUNC_MODE_0
+0    0xA06C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
 4    0x000A    //RX_FRAME_SZ
 5    0x0000    //RX_DELAY_OPT
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-10    0x0000    //RX_PGA
-11    0x0000    //RX_A_HP
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
 12    0x0000    //RX_B_PE
-13    0x0000    //RX_THR_PITCH_DET_0
-14    0x0000    //RX_THR_PITCH_DET_1
-15    0x0000    //RX_THR_PITCH_DET_2
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
 16    0x0008    //RX_PITCH_BFR_LEN
 17    0x0003    //RX_SBD_PITCH_DET
 18    0x0100    //RX_PP_RESRV_0
 19    0x0020    //RX_PP_RESRV_1
-20    0x0000    //RX_N_SN_EST
+20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0000    //RX_NS_LVL_CTRL
-23    0x0000    //RX_THR_SN_EST
-24    0x0000    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 30    0x0002    //RX_EXTRA_NS_L
 31    0x0800    //RX_EXTRA_NS_A
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 35    0x199A    //RX_A_POST_FLT
 36    0x0000    //RX_LMT_THRD
-37    0x0000    //RX_LMT_ALPHA
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -993,47 +3730,47 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
 111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-125    0x0000    //RX_LAMBDA_PKA_FP
-126    0x0000    //RX_TPKA_FP
-127    0x0000    //RX_MIN_G_FP
-128    0x0000    //RX_MAX_G_FP
-129    0x0000    //RX_SPK_VOL
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -1062,64 +3799,64 @@
 155    0x0000    //RX_BWE_RESRV_1
 156    0x0000    //RX_BWE_RESRV_2
 #VOL    0
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1136,89 +3873,89 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1235,89 +3972,89 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1334,89 +4071,89 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1433,89 +4170,89 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1532,89 +4269,89 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1631,89 +4368,89 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1730,40 +4467,892 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-WB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2F3C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x0073    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0003    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
 7    0x0001    //TX_SAMPLINGFREQ_PROC
@@ -1780,14 +5369,14 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
-22    0x000D    //TX_DIST2REF_02
+21    0x009C    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
 27    0x1000    //TX_PGA_0
-28    0x0800    //TX_PGA_1
+28    0x1000    //TX_PGA_1
 29    0x1000    //TX_PGA_2
 30    0x0000    //TX_PGA_3
 31    0x0000    //TX_PGA_4
@@ -1800,8 +5389,8 @@
 38    0x0002    //TX_MICS_OF_PAIR1
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
 43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
@@ -1866,8 +5455,8 @@
 104    0x0000    //TX_MIC_LOC_23
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0C00    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -1909,9 +5498,9 @@
 147    0x0300    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
+150    0x6C00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x3000    //TX_MIN_EQ_RE_EST_0
+152    0x0200    //TX_MIN_EQ_RE_EST_0
 153    0x0100    //TX_MIN_EQ_RE_EST_1
 154    0x0200    //TX_MIN_EQ_RE_EST_2
 155    0x0200    //TX_MIN_EQ_RE_EST_3
@@ -1928,9 +5517,9 @@
 166    0x4000    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x5000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
+169    0x02A0    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
+171    0x01B0    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -1956,15 +5545,15 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7FF0    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
+197    0x7148    //TX_DTD_THR1_0
+198    0x7148    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
-204    0x7E00    //TX_DTD_THR2_0
-205    0x7E00    //TX_DTD_THR2_1
+204    0x5000    //TX_DTD_THR2_0
+205    0x5000    //TX_DTD_THR2_1
 206    0x5000    //TX_DTD_THR2_2
 207    0x5000    //TX_DTD_THR2_3
 208    0x5000    //TX_DTD_THR2_4
@@ -1972,8 +5561,8 @@
 210    0x5000    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x03E8    //TX_DT_CUT_K
-214    0x0010    //TX_DT_CUT_THR
+213    0x07D0    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
 217    0x4000    //TX_FDPFGAINECHO
@@ -1982,22 +5571,22 @@
 220    0x0000    //TX_DTD_MIC_BLK
 221    0x023E    //TX_ADPT_STRICT_L
 222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
+225    0x01CC    //TX_RATIO_DT_L_TH_HIGH
+226    0x4A38    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+234    0x015E    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -2010,11 +5599,11 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
 254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
+255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0200    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
@@ -2042,11 +5631,11 @@
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
 282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0016    //TX_NS_LVL_CTRL_4
-286    0x0014    //TX_NS_LVL_CTRL_5
-287    0x0011    //TX_NS_LVL_CTRL_6
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000F    //TX_MIN_GAIN_S_0
 290    0x0010    //TX_MIN_GAIN_S_1
@@ -2064,8 +5653,8 @@
 302    0x4000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x50C0    //TX_SNRI_SUP_6
+305    0x50C0    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
@@ -2074,19 +5663,19 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x5000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x4C00    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+315    0x4C00    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
+323    0x2000    //TX_B_POST_FILT_1
 324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
+325    0x4000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
-327    0x4000    //TX_B_POST_FILT_5
+327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
@@ -2094,14 +5683,14 @@
 332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
 333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
 334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x6000    //TX_B_LESSCUT_RTO_S_6
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7C00    //TX_LAMBDA_PFILT
 339    0x7C00    //TX_LAMBDA_PFILT_S_0
 340    0x7C00    //TX_LAMBDA_PFILT_S_1
-341    0x7C00    //TX_LAMBDA_PFILT_S_2
-342    0x7A00    //TX_LAMBDA_PFILT_S_3
+341    0x7A00    //TX_LAMBDA_PFILT_S_2
+342    0x7C00    //TX_LAMBDA_PFILT_S_3
 343    0x7C00    //TX_LAMBDA_PFILT_S_4
 344    0x7C00    //TX_LAMBDA_PFILT_S_5
 345    0x7C00    //TX_LAMBDA_PFILT_S_6
@@ -2112,12 +5701,12 @@
 350    0x0600    //TX_A_PEPPER_HF
 351    0x0001    //TX_HMNC_BST_FLG
 352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
 356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0800    //TX_C_POST_FLT_DT
+357    0x1388    //TX_DT_BINVAD_ENDF
+358    0x2000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0140    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -2139,10 +5728,10 @@
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x0F0A    //TX_NOISE_TH_6
 379    0x0033    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -2150,17 +5739,17 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x7FFF    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x4000    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
+401    0x0005    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
@@ -2268,21 +5857,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -2311,33 +5900,33 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
-566    0x001C    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x5048    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
+569    0x4A4F    //TX_FDEQ_GAIN_2
+570    0x4E48    //TX_FDEQ_GAIN_3
+571    0x4444    //TX_FDEQ_GAIN_4
+572    0x444B    //TX_FDEQ_GAIN_5
+573    0x4E50    //TX_FDEQ_GAIN_6
+574    0x544D    //TX_FDEQ_GAIN_7
+575    0x464C    //TX_FDEQ_GAIN_8
+576    0x4844    //TX_FDEQ_GAIN_9
+577    0x393C    //TX_FDEQ_GAIN_10
+578    0x3C3C    //TX_FDEQ_GAIN_11
 579    0x4848    //TX_FDEQ_GAIN_12
 580    0x4848    //TX_FDEQ_GAIN_13
 581    0x4848    //TX_FDEQ_GAIN_14
@@ -2360,10 +5949,10 @@
 598    0x090A    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
 600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x0E0F    //TX_FDEQ_BIN_10
-602    0x0F10    //TX_FDEQ_BIN_11
-603    0x1011    //TX_FDEQ_BIN_12
-604    0x1104    //TX_FDEQ_BIN_13
+601    0x0F10    //TX_FDEQ_BIN_10
+602    0x1011    //TX_FDEQ_BIN_11
+603    0x1112    //TX_FDEQ_BIN_12
+604    0x120B    //TX_FDEQ_BIN_13
 605    0x0000    //TX_FDEQ_BIN_14
 606    0x0000    //TX_FDEQ_BIN_15
 607    0x0000    //TX_FDEQ_BIN_16
@@ -2400,22 +5989,22 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0808    //TX_PREEQ_BIN_MIC0_7
-649    0x0808    //TX_PREEQ_BIN_MIC0_8
-650    0x0808    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0808    //TX_PREEQ_BIN_MIC0_11
-653    0x0808    //TX_PREEQ_BIN_MIC0_12
-654    0x0808    //TX_PREEQ_BIN_MIC0_13
-655    0x0808    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+651    0x0F10    //TX_PREEQ_BIN_MIC0_10
+652    0x1011    //TX_PREEQ_BIN_MIC0_11
+653    0x1112    //TX_PREEQ_BIN_MIC0_12
+654    0x120B    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
 657    0x0000    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
@@ -2425,20 +6014,20 @@
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
 665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4846    //TX_PREEQ_GAIN_MIC1_0
-667    0x4544    //TX_PREEQ_GAIN_MIC1_1
-668    0x4240    //TX_PREEQ_GAIN_MIC1_2
-669    0x3E3C    //TX_PREEQ_GAIN_MIC1_3
-670    0x3A38    //TX_PREEQ_GAIN_MIC1_4
-671    0x3635    //TX_PREEQ_GAIN_MIC1_5
-672    0x3330    //TX_PREEQ_GAIN_MIC1_6
-673    0x2E2A    //TX_PREEQ_GAIN_MIC1_7
-674    0x2648    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x484A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5454    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
 680    0x4848    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
@@ -2449,20 +6038,20 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x251A    //TX_PREEQ_BIN_MIC1_0
-691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
-692    0x0C0C    //TX_PREEQ_BIN_MIC1_2
-693    0x0C0F    //TX_PREEQ_BIN_MIC1_3
-694    0x0F0F    //TX_PREEQ_BIN_MIC1_4
-695    0x0F09    //TX_PREEQ_BIN_MIC1_5
-696    0x0909    //TX_PREEQ_BIN_MIC1_6
-697    0x0908    //TX_PREEQ_BIN_MIC1_7
-698    0x0700    //TX_PREEQ_BIN_MIC1_8
-699    0x0000    //TX_PREEQ_BIN_MIC1_9
-700    0x0000    //TX_PREEQ_BIN_MIC1_10
-701    0x0000    //TX_PREEQ_BIN_MIC1_11
-702    0x0000    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0F10    //TX_PREEQ_BIN_MIC1_10
+701    0x1011    //TX_PREEQ_BIN_MIC1_11
+702    0x1112    //TX_PREEQ_BIN_MIC1_12
+703    0x120B    //TX_PREEQ_BIN_MIC1_13
 704    0x0000    //TX_PREEQ_BIN_MIC1_14
 705    0x0000    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
@@ -2477,19 +6066,19 @@
 715    0x4848    //TX_PREEQ_GAIN_MIC2_0
 716    0x4848    //TX_PREEQ_GAIN_MIC2_1
 717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+718    0x484A    //TX_PREEQ_GAIN_MIC2_3
+719    0x4B4A    //TX_PREEQ_GAIN_MIC2_4
+720    0x4B4C    //TX_PREEQ_GAIN_MIC2_5
+721    0x4C4D    //TX_PREEQ_GAIN_MIC2_6
+722    0x4F50    //TX_PREEQ_GAIN_MIC2_7
+723    0x5050    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5252    //TX_PREEQ_GAIN_MIC2_10
+726    0x5253    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x5454    //TX_PREEQ_GAIN_MIC2_13
+729    0x5455    //TX_PREEQ_GAIN_MIC2_14
+730    0x5555    //TX_PREEQ_GAIN_MIC2_15
 731    0x4848    //TX_PREEQ_GAIN_MIC2_16
 732    0x4848    //TX_PREEQ_GAIN_MIC2_17
 733    0x4848    //TX_PREEQ_GAIN_MIC2_18
@@ -2513,7 +6102,7 @@
 751    0x0808    //TX_PREEQ_BIN_MIC2_12
 752    0x0808    //TX_PREEQ_BIN_MIC2_13
 753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
+754    0x0808    //TX_PREEQ_BIN_MIC2_15
 755    0x0000    //TX_PREEQ_BIN_MIC2_16
 756    0x0000    //TX_PREEQ_BIN_MIC2_17
 757    0x0000    //TX_PREEQ_BIN_MIC2_18
@@ -2532,8 +6121,8 @@
 770    0x0046    //TX_MIC_PWR_BIAS_1
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
 775    0x000F    //TX_GAIN_LIMIT_2
 776    0x000F    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
@@ -2625,7 +6214,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0B50    //TX_TDDRC_DRC_GAIN
+866    0x10CA    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -2650,90 +6239,155 @@
 888    0x0028    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x03C0    //TX_MICMUTE_RATIO_THR
+900    0x0122    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x6590    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0xE4A8    //TX_AMS_RESRV_02
+945    0x1770    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0000    //RX_RECVFUNC_MODE_0
+0    0xA06C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
 4    0x000A    //RX_FRAME_SZ
 5    0x0000    //RX_DELAY_OPT
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-10    0x0000    //RX_PGA
-11    0x0000    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x0000    //RX_THR_PITCH_DET_0
-14    0x0000    //RX_THR_PITCH_DET_1
-15    0x0000    //RX_THR_PITCH_DET_2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
 16    0x0008    //RX_PITCH_BFR_LEN
 17    0x0003    //RX_SBD_PITCH_DET
 18    0x0100    //RX_PP_RESRV_0
 19    0x0020    //RX_PP_RESRV_1
-20    0x0000    //RX_N_SN_EST
+20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0000    //RX_NS_LVL_CTRL
-23    0x0000    //RX_THR_SN_EST
-24    0x0000    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 30    0x0002    //RX_EXTRA_NS_L
 31    0x0800    //RX_EXTRA_NS_A
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 35    0x199A    //RX_A_POST_FLT
 36    0x0000    //RX_LMT_THRD
-37    0x0000    //RX_LMT_ALPHA
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -2746,47 +6400,47 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
 111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-125    0x0000    //RX_LAMBDA_PKA_FP
-126    0x0000    //RX_TPKA_FP
-127    0x0000    //RX_MIN_G_FP
-128    0x0000    //RX_MAX_G_FP
-129    0x0000    //RX_SPK_VOL
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -2815,68 +6469,68 @@
 155    0x0000    //RX_BWE_RESRV_1
 156    0x0000    //RX_BWE_RESRV_2
 #VOL    0
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -2889,93 +6543,93 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -2988,93 +6642,93 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -3087,93 +6741,93 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -3186,93 +6840,93 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -3285,93 +6939,93 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -3384,93 +7038,93 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -3483,40 +7137,892 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-SWB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2F7C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x00F3    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0003    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
 7    0x0003    //TX_SAMPLINGFREQ_PROC
@@ -3533,8 +8039,8 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0093    //TX_DIST2REF1
-22    0x001A    //TX_DIST2REF_02
+21    0x009C    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
@@ -3553,8 +8059,8 @@
 38    0x0002    //TX_MICS_OF_PAIR1
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
 43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
@@ -3620,7 +8126,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -3666,24 +8172,24 @@
 151    0x1000    //TX_THR_RE_EST
 152    0x2000    //TX_MIN_EQ_RE_EST_0
 153    0x0600    //TX_MIN_EQ_RE_EST_1
-154    0x0200    //TX_MIN_EQ_RE_EST_2
-155    0x0200    //TX_MIN_EQ_RE_EST_3
-156    0x0200    //TX_MIN_EQ_RE_EST_4
-157    0x0200    //TX_MIN_EQ_RE_EST_5
-158    0x0200    //TX_MIN_EQ_RE_EST_6
+154    0x3000    //TX_MIN_EQ_RE_EST_2
+155    0x3000    //TX_MIN_EQ_RE_EST_3
+156    0x3000    //TX_MIN_EQ_RE_EST_4
+157    0x3000    //TX_MIN_EQ_RE_EST_5
+158    0x3000    //TX_MIN_EQ_RE_EST_6
 159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
+160    0x7800    //TX_MIN_EQ_RE_EST_8
+161    0x7800    //TX_MIN_EQ_RE_EST_9
+162    0x7800    //TX_MIN_EQ_RE_EST_10
+163    0x7800    //TX_MIN_EQ_RE_EST_11
+164    0x7800    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
 166    0x3000    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
+169    0x0260    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
+171    0x0680    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -3709,7 +8215,7 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7FF0    //TX_DTD_THR1_0
+197    0x7B0C    //TX_DTD_THR1_0
 198    0x7FF0    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
@@ -3735,22 +8241,22 @@
 220    0x7FFF    //TX_DTD_MIC_BLK
 221    0x023E    //TX_ADPT_STRICT_L
 222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x1000    //TX_B_POST_FILT_ECHO_H
+225    0x01F4    //TX_RATIO_DT_L_TH_HIGH
+226    0x59D8    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+234    0x00C8    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -3765,10 +8271,10 @@
 250    0x0100    //TX_DELTA_THR_SN_EST_0
 251    0x0100    //TX_DELTA_THR_SN_EST_1
 252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
-254    0x0000    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+253    0x0000    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -3794,21 +8300,21 @@
 279    0x2000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0014    //TX_NS_LVL_CTRL_3
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0024    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
 285    0x0014    //TX_NS_LVL_CTRL_4
-286    0x0014    //TX_NS_LVL_CTRL_5
-287    0x0011    //TX_NS_LVL_CTRL_6
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000F    //TX_MIN_GAIN_S_0
-290    0x0010    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x0010    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
 297    0x6000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
@@ -3818,28 +8324,28 @@
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
-306    0x50C0    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
 310    0x09C4    //TX_GAIN0_NTH
 311    0x000A    //TX_MUSIC_MORENS
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
-314    0x5000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x4C00    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x7FFF    //TX_A_POST_FILT_S_1
+316    0x7FFF    //TX_A_POST_FILT_S_2
+317    0x7FFF    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x7FFF    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x4000    //TX_B_POST_FILT_5
+323    0x6000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
@@ -3847,19 +8353,19 @@
 332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
 333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
 334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x6000    //TX_B_LESSCUT_RTO_S_6
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7C00    //TX_LAMBDA_PFILT
-339    0x7D00    //TX_LAMBDA_PFILT_S_0
-340    0x7D00    //TX_LAMBDA_PFILT_S_1
-341    0x7D00    //TX_LAMBDA_PFILT_S_2
-342    0x7D00    //TX_LAMBDA_PFILT_S_3
-343    0x7D00    //TX_LAMBDA_PFILT_S_4
-344    0x7D00    //TX_LAMBDA_PFILT_S_5
-345    0x7D00    //TX_LAMBDA_PFILT_S_6
-346    0x7D00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7F00    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x3E80    //TX_K_PEPPER
 348    0x0400    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
@@ -3868,7 +8374,7 @@
 353    0x0040    //TX_DT_BINVAD_TH_0
 354    0x0040    //TX_DT_BINVAD_TH_1
 355    0x0100    //TX_DT_BINVAD_TH_2
-356    0x0100    //TX_DT_BINVAD_TH_3
+356    0x2000    //TX_DT_BINVAD_TH_3
 357    0x36B0    //TX_DT_BINVAD_ENDF
 358    0x0200    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
@@ -3884,18 +8390,18 @@
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
 371    0x01F4    //TX_NOISE_TH_2
-372    0x4E20    //TX_NOISE_TH_3
+372    0x36B0    //TX_NOISE_TH_3
 373    0x2710    //TX_NOISE_TH_4
-374    0x2710    //TX_NOISE_TH_5
+374    0x2CEC    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x0DAC    //TX_NOISE_TH_6
 379    0x0050    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -3903,17 +8409,17 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
+401    0x0005    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
@@ -4021,21 +8527,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -4064,37 +8570,37 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4850    //TX_FDEQ_GAIN_2
 570    0x5050    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x484A    //TX_FDEQ_GAIN_5
-573    0x4E5E    //TX_FDEQ_GAIN_6
-574    0x5850    //TX_FDEQ_GAIN_7
-575    0x5050    //TX_FDEQ_GAIN_8
-576    0x5050    //TX_FDEQ_GAIN_9
-577    0x5064    //TX_FDEQ_GAIN_10
-578    0x5C70    //TX_FDEQ_GAIN_11
-579    0x7088    //TX_FDEQ_GAIN_12
-580    0x8080    //TX_FDEQ_GAIN_13
-581    0x7474    //TX_FDEQ_GAIN_14
-582    0x8080    //TX_FDEQ_GAIN_15
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E5C    //TX_FDEQ_GAIN_6
+574    0x564E    //TX_FDEQ_GAIN_7
+575    0x4C4E    //TX_FDEQ_GAIN_8
+576    0x4E45    //TX_FDEQ_GAIN_9
+577    0x494A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x5C54    //TX_FDEQ_GAIN_12
+580    0x5466    //TX_FDEQ_GAIN_13
+581    0x5C70    //TX_FDEQ_GAIN_14
+582    0x7C84    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
@@ -4128,7 +8634,7 @@
 613    0x0000    //TX_FDEQ_BIN_22
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
 617    0x4848    //TX_PREEQ_GAIN_MIC0_0
 618    0x4848    //TX_PREEQ_GAIN_MIC0_1
 619    0x4848    //TX_PREEQ_GAIN_MIC0_2
@@ -4153,23 +8659,23 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
 647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0808    //TX_PREEQ_BIN_MIC0_7
-649    0x0808    //TX_PREEQ_BIN_MIC0_8
-650    0x0808    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0808    //TX_PREEQ_BIN_MIC0_11
-653    0x0808    //TX_PREEQ_BIN_MIC0_12
-654    0x0808    //TX_PREEQ_BIN_MIC0_13
-655    0x0808    //TX_PREEQ_BIN_MIC0_14
-656    0xF200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
 660    0x0000    //TX_PREEQ_BIN_MIC0_19
@@ -4178,23 +8684,23 @@
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
 665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4846    //TX_PREEQ_GAIN_MIC1_0
-667    0x4544    //TX_PREEQ_GAIN_MIC1_1
-668    0x4240    //TX_PREEQ_GAIN_MIC1_2
-669    0x3E3C    //TX_PREEQ_GAIN_MIC1_3
-670    0x3A38    //TX_PREEQ_GAIN_MIC1_4
-671    0x3635    //TX_PREEQ_GAIN_MIC1_5
-672    0x3330    //TX_PREEQ_GAIN_MIC1_6
-673    0x2E2A    //TX_PREEQ_GAIN_MIC1_7
-674    0x2625    //TX_PREEQ_GAIN_MIC1_8
-675    0x2421    //TX_PREEQ_GAIN_MIC1_9
-676    0x1D19    //TX_PREEQ_GAIN_MIC1_10
-677    0x1820    //TX_PREEQ_GAIN_MIC1_11
-678    0x2830    //TX_PREEQ_GAIN_MIC1_12
-679    0x303C    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
 685    0x4848    //TX_PREEQ_GAIN_MIC1_19
@@ -4202,23 +8708,23 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x251A    //TX_PREEQ_BIN_MIC1_0
-691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
-692    0x0C0C    //TX_PREEQ_BIN_MIC1_2
-693    0x0C0F    //TX_PREEQ_BIN_MIC1_3
-694    0x0F0F    //TX_PREEQ_BIN_MIC1_4
-695    0x0F09    //TX_PREEQ_BIN_MIC1_5
-696    0x0909    //TX_PREEQ_BIN_MIC1_6
-697    0x0908    //TX_PREEQ_BIN_MIC1_7
-698    0x070F    //TX_PREEQ_BIN_MIC1_8
-699    0x1F08    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0920    //TX_PREEQ_BIN_MIC1_11
-702    0x2020    //TX_PREEQ_BIN_MIC1_12
-703    0x2021    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -4233,16 +8739,16 @@
 718    0x4848    //TX_PREEQ_GAIN_MIC2_3
 719    0x4848    //TX_PREEQ_GAIN_MIC2_4
 720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
 731    0x4848    //TX_PREEQ_GAIN_MIC2_16
 732    0x4848    //TX_PREEQ_GAIN_MIC2_17
 733    0x4848    //TX_PREEQ_GAIN_MIC2_18
@@ -4251,22 +8757,22 @@
 736    0x4848    //TX_PREEQ_GAIN_MIC2_21
 737    0x4848    //TX_PREEQ_GAIN_MIC2_22
 738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
 744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0xF200    //TX_PREEQ_BIN_MIC2_15
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
 755    0x0000    //TX_PREEQ_BIN_MIC2_16
 756    0x0000    //TX_PREEQ_BIN_MIC2_17
 757    0x0000    //TX_PREEQ_BIN_MIC2_18
@@ -4278,17 +8784,17 @@
 763    0x0006    //TX_MASKING_ABILITY
 764    0x0800    //TX_NND_WEIGHT
 765    0x0050    //TX_MIC_CALIBRATION_0
-766    0x0056    //TX_MIC_CALIBRATION_1
+766    0x0065    //TX_MIC_CALIBRATION_1
 767    0x0050    //TX_MIC_CALIBRATION_2
 768    0x0050    //TX_MIC_CALIBRATION_3
 769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0042    //TX_MIC_PWR_BIAS_1
+770    0x0046    //TX_MIC_PWR_BIAS_1
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
+773    0x0000    //TX_GAIN_LIMIT_0
 774    0x000F    //TX_GAIN_LIMIT_1
 775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
+776    0x0000    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -4366,8 +8872,8 @@
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
 853    0x0002    //TX_FILTINDX
-854    0x0001    //TX_TDDRC_THRD_0
-855    0x0002    //TX_TDDRC_THRD_1
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0004    //TX_TDDRC_THRD_1
 856    0x1000    //TX_TDDRC_THRD_2
 857    0x1000    //TX_TDDRC_THRD_3
 858    0x6000    //TX_TDDRC_SLANT_0
@@ -4378,7 +8884,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0BE0    //TX_TDDRC_DRC_GAIN
+866    0x1380    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -4409,86 +8915,151 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x01C2    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7918    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x3A98    //TX_DTD_THR1_MICMUTE_2
+914    0x32C8    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0xE4A8    //TX_AMS_RESRV_02
+945    0x1770    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0000    //RX_RECVFUNC_MODE_0
+0    0xA064    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
 4    0x000A    //RX_FRAME_SZ
 5    0x0000    //RX_DELAY_OPT
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-10    0x0000    //RX_PGA
-11    0x0000    //RX_A_HP
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
 12    0x0000    //RX_B_PE
-13    0x0000    //RX_THR_PITCH_DET_0
-14    0x0000    //RX_THR_PITCH_DET_1
-15    0x0000    //RX_THR_PITCH_DET_2
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
 16    0x0008    //RX_PITCH_BFR_LEN
 17    0x0003    //RX_SBD_PITCH_DET
 18    0x0100    //RX_PP_RESRV_0
 19    0x0020    //RX_PP_RESRV_1
-20    0x0000    //RX_N_SN_EST
+20    0x0400    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0000    //RX_NS_LVL_CTRL
-23    0x0000    //RX_THR_SN_EST
-24    0x0000    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 30    0x0002    //RX_EXTRA_NS_L
 31    0x0800    //RX_EXTRA_NS_A
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 35    0x199A    //RX_A_POST_FLT
 36    0x0000    //RX_LMT_THRD
-37    0x0000    //RX_LMT_ALPHA
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -4499,47 +9070,47 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
 111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-125    0x0000    //RX_LAMBDA_PKA_FP
-126    0x0000    //RX_TPKA_FP
-127    0x0000    //RX_MIN_G_FP
-128    0x0000    //RX_MAX_G_FP
-129    0x0000    //RX_SPK_VOL
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -4568,70 +9139,70 @@
 155    0x0000    //RX_BWE_RESRV_1
 156    0x0000    //RX_BWE_RESRV_2
 #VOL    0
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -4642,95 +9213,95 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -4741,95 +9312,95 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -4840,95 +9411,95 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -4939,95 +9510,95 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -5038,95 +9609,95 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -5137,95 +9708,95 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -5236,34 +9807,886 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-FB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -5286,15 +10709,15 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0093    //TX_DIST2REF1
-22    0x001A    //TX_DIST2REF_02
+21    0x00A4    //TX_DIST2REF1
+22    0x0017    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x0A19    //TX_PGA_0
-28    0x0A19    //TX_PGA_1
-29    0x0A19    //TX_PGA_2
+27    0x0FF7    //TX_PGA_0
+28    0x0FF7    //TX_PGA_1
+29    0x0FF7    //TX_PGA_2
 30    0x0000    //TX_PGA_3
 31    0x0000    //TX_PGA_4
 32    0x0000    //TX_PGA_5
@@ -5373,7 +10796,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -5497,13 +10920,13 @@
 229    0x2000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0063    //TX_EPD_OFFSET_00
+232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
 234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -5516,11 +10939,11 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
 254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
+255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0200    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
@@ -5548,11 +10971,11 @@
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
 282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0016    //TX_NS_LVL_CTRL_4
-286    0x0014    //TX_NS_LVL_CTRL_5
-287    0x0011    //TX_NS_LVL_CTRL_6
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000F    //TX_MIN_GAIN_S_0
 290    0x0010    //TX_MIN_GAIN_S_1
@@ -5570,8 +10993,8 @@
 302    0x4000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x50C0    //TX_SNRI_SUP_6
+305    0x50C0    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
@@ -5580,19 +11003,19 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x5000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x4C00    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+315    0x4C00    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
+323    0x2000    //TX_B_POST_FILT_1
 324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
+325    0x4000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
-327    0x4000    //TX_B_POST_FILT_5
+327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
@@ -5600,14 +11023,14 @@
 332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
 333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
 334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x6000    //TX_B_LESSCUT_RTO_S_6
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7C00    //TX_LAMBDA_PFILT
 339    0x7C00    //TX_LAMBDA_PFILT_S_0
 340    0x7C00    //TX_LAMBDA_PFILT_S_1
-341    0x7C00    //TX_LAMBDA_PFILT_S_2
-342    0x7A00    //TX_LAMBDA_PFILT_S_3
+341    0x7A00    //TX_LAMBDA_PFILT_S_2
+342    0x7C00    //TX_LAMBDA_PFILT_S_3
 343    0x7C00    //TX_LAMBDA_PFILT_S_4
 344    0x7C00    //TX_LAMBDA_PFILT_S_5
 345    0x7C00    //TX_LAMBDA_PFILT_S_6
@@ -5645,10 +11068,10 @@
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x2710    //TX_NOISE_TH_6
 379    0x0033    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -5656,15 +11079,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -5779,16 +11202,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -5817,19 +11240,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -5841,11 +11264,11 @@
 573    0x4848    //TX_FDEQ_GAIN_6
 574    0x4848    //TX_FDEQ_GAIN_7
 575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x5B5B    //TX_FDEQ_GAIN_10
-578    0x7373    //TX_FDEQ_GAIN_11
-579    0x739A    //TX_FDEQ_GAIN_12
-580    0x9AC4    //TX_FDEQ_GAIN_13
+576    0x4853    //TX_FDEQ_GAIN_9
+577    0x5450    //TX_FDEQ_GAIN_10
+578    0x7465    //TX_FDEQ_GAIN_11
+579    0x807F    //TX_FDEQ_GAIN_12
+580    0x82C4    //TX_FDEQ_GAIN_13
 581    0xC4C4    //TX_FDEQ_GAIN_14
 582    0xC4C4    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
@@ -5888,15 +11311,15 @@
 620    0x4848    //TX_PREEQ_GAIN_MIC0_3
 621    0x4848    //TX_PREEQ_GAIN_MIC0_4
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+623    0x4A4C    //TX_PREEQ_GAIN_MIC0_6
+624    0x4E50    //TX_PREEQ_GAIN_MIC0_7
+625    0x5456    //TX_PREEQ_GAIN_MIC0_8
+626    0x585C    //TX_PREEQ_GAIN_MIC0_9
+627    0x5C64    //TX_PREEQ_GAIN_MIC0_10
+628    0x7478    //TX_PREEQ_GAIN_MIC0_11
+629    0x705C    //TX_PREEQ_GAIN_MIC0_12
+630    0x4838    //TX_PREEQ_GAIN_MIC0_13
+631    0x3C70    //TX_PREEQ_GAIN_MIC0_14
 632    0x4848    //TX_PREEQ_GAIN_MIC0_15
 633    0x4848    //TX_PREEQ_GAIN_MIC0_16
 634    0x4848    //TX_PREEQ_GAIN_MIC0_17
@@ -5906,22 +11329,22 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x0909    //TX_PREEQ_BIN_MIC0_7
+649    0x090B    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x1414    //TX_PREEQ_BIN_MIC0_12
+654    0x1C1E    //TX_PREEQ_BIN_MIC0_13
+655    0x1E28    //TX_PREEQ_BIN_MIC0_14
+656    0x462C    //TX_PREEQ_BIN_MIC0_15
 657    0x0000    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
@@ -5931,19 +11354,19 @@
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
 665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4846    //TX_PREEQ_GAIN_MIC1_0
-667    0x4544    //TX_PREEQ_GAIN_MIC1_1
-668    0x4240    //TX_PREEQ_GAIN_MIC1_2
-669    0x3E3C    //TX_PREEQ_GAIN_MIC1_3
-670    0x3A38    //TX_PREEQ_GAIN_MIC1_4
-671    0x3635    //TX_PREEQ_GAIN_MIC1_5
-672    0x3330    //TX_PREEQ_GAIN_MIC1_6
-673    0x2E2A    //TX_PREEQ_GAIN_MIC1_7
-674    0x2625    //TX_PREEQ_GAIN_MIC1_8
-675    0x2421    //TX_PREEQ_GAIN_MIC1_9
-676    0x1D19    //TX_PREEQ_GAIN_MIC1_10
-677    0x1820    //TX_PREEQ_GAIN_MIC1_11
-678    0x2830    //TX_PREEQ_GAIN_MIC1_12
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
 679    0x4848    //TX_PREEQ_GAIN_MIC1_13
 680    0x4848    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
@@ -6131,7 +11554,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0CE6    //TX_TDDRC_DRC_GAIN
+866    0x0A98    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -6162,86 +11585,151 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0000    //RX_RECVFUNC_MODE_0
+0    0x0064    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0004    //RX_SAMPLINGFREQ_SIG
 3    0x0004    //RX_SAMPLINGFREQ_PROC
 4    0x000A    //RX_FRAME_SZ
 5    0x0000    //RX_DELAY_OPT
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-10    0x0000    //RX_PGA
-11    0x0000    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x0000    //RX_THR_PITCH_DET_0
-14    0x0000    //RX_THR_PITCH_DET_1
-15    0x0000    //RX_THR_PITCH_DET_2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
 16    0x0008    //RX_PITCH_BFR_LEN
 17    0x0003    //RX_SBD_PITCH_DET
 18    0x0100    //RX_PP_RESRV_0
 19    0x0020    //RX_PP_RESRV_1
-20    0x0000    //RX_N_SN_EST
+20    0x0500    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0000    //RX_NS_LVL_CTRL
-23    0x0000    //RX_THR_SN_EST
-24    0x0000    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+22    0x000A    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7000    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 30    0x0002    //RX_EXTRA_NS_L
 31    0x0800    //RX_EXTRA_NS_A
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 35    0x199A    //RX_A_POST_FLT
 36    0x0000    //RX_LMT_THRD
-37    0x0000    //RX_LMT_ALPHA
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -6252,47 +11740,47 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
 111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-125    0x0000    //RX_LAMBDA_PKA_FP
-126    0x0000    //RX_TPKA_FP
-127    0x0000    //RX_MIN_G_FP
-128    0x0000    //RX_MAX_G_FP
-129    0x0000    //RX_SPK_VOL
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -6321,70 +11809,70 @@
 155    0x0000    //RX_BWE_RESRV_1
 156    0x0000    //RX_BWE_RESRV_2
 #VOL    0
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -6395,95 +11883,95 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -6494,95 +11982,95 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -6593,95 +12081,95 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -6692,95 +12180,95 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -6791,95 +12279,95 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -6890,95 +12378,95 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -6989,39 +12477,891 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0000    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x0064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0500    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000A    //RX_NS_LVL_CTRL
+180    0xF600    //RX_THR_SN_EST
+181    0x7000    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-NB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0008    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x0200    //TX_SENDFUNC_MODE_0
+3    0x0240    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0000    //TX_SAMPLINGFREQ_SIG
@@ -7045,7 +13385,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x0800    //TX_PGA_0
+27    0x0A13    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -7269,20 +13609,20 @@
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -7300,16 +13640,16 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x000F    //TX_NS_LVL_CTRL_1
-283    0x0011    //TX_NS_LVL_CTRL_2
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
 284    0x000F    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
 287    0x000F    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
 292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
@@ -7333,12 +13673,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
@@ -7398,10 +13738,10 @@
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -7409,15 +13749,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -7532,16 +13872,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -7570,19 +13910,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x001C    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -7591,10 +13931,10 @@
 570    0x4848    //TX_FDEQ_GAIN_3
 571    0x4848    //TX_FDEQ_GAIN_4
 572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
+573    0x4242    //TX_FDEQ_GAIN_6
+574    0x423C    //TX_FDEQ_GAIN_7
+575    0x3C3C    //TX_FDEQ_GAIN_8
+576    0x3434    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
 579    0x4848    //TX_FDEQ_GAIN_12
@@ -7915,8 +14255,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0044    //RX_RECVFUNC_MODE_0
+0    0xA06C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -7941,7 +14346,7 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -7961,10 +14366,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -7988,7 +14393,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -8030,9 +14435,9 @@
 111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -8045,7 +14450,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -8086,9 +14491,9 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -8104,10 +14509,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -8131,601 +14536,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -8766,15 +14577,1461 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-WB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0008    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x0200    //TX_SENDFUNC_MODE_0
+3    0x0240    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
@@ -8798,7 +16055,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x0800    //TX_PGA_0
+27    0x0915    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -9022,20 +16279,20 @@
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -9053,16 +16310,16 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x000F    //TX_NS_LVL_CTRL_1
-283    0x0011    //TX_NS_LVL_CTRL_2
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
 284    0x000F    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
 287    0x000F    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
 292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
@@ -9086,12 +16343,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
@@ -9151,10 +16408,10 @@
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -9162,15 +16419,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -9285,16 +16542,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -9323,19 +16580,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x001C    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -9345,13 +16602,13 @@
 571    0x4848    //TX_FDEQ_GAIN_4
 572    0x4848    //TX_FDEQ_GAIN_5
 573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
+574    0x4444    //TX_FDEQ_GAIN_7
+575    0x4444    //TX_FDEQ_GAIN_8
+576    0x3C3C    //TX_FDEQ_GAIN_9
+577    0x3C3C    //TX_FDEQ_GAIN_10
+578    0x3C3C    //TX_FDEQ_GAIN_11
+579    0x3C30    //TX_FDEQ_GAIN_12
+580    0x3030    //TX_FDEQ_GAIN_13
 581    0x4848    //TX_FDEQ_GAIN_14
 582    0x4848    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
@@ -9375,7 +16632,7 @@
 601    0x0E0F    //TX_FDEQ_BIN_10
 602    0x0F10    //TX_FDEQ_BIN_11
 603    0x1011    //TX_FDEQ_BIN_12
-604    0x1104    //TX_FDEQ_BIN_13
+604    0x1112    //TX_FDEQ_BIN_13
 605    0x0000    //TX_FDEQ_BIN_14
 606    0x0000    //TX_FDEQ_BIN_15
 607    0x0000    //TX_FDEQ_BIN_16
@@ -9668,8 +16925,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x004C    //RX_RECVFUNC_MODE_0
+0    0xA06C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -9694,7 +17016,7 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -9717,11 +17039,11 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -9745,7 +17067,7 @@
 73    0x0E0F    //RX_FDEQ_BIN_10
 74    0x0F10    //RX_FDEQ_BIN_11
 75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+76    0x1112    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -9783,22 +17105,22 @@
 111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -9839,17 +17161,17 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -9860,11 +17182,11 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -9888,601 +17210,7 @@
 73    0x0E0F    //RX_FDEQ_BIN_10
 74    0x0F10    //RX_FDEQ_BIN_11
 75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+76    0x1112    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -10519,10 +17247,1456 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-SWB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -10551,7 +18725,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x0800    //TX_PGA_0
+27    0x0915    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -10775,20 +18949,20 @@
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -10806,16 +18980,16 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000B    //TX_NS_LVL_CTRL_0
-282    0x000F    //TX_NS_LVL_CTRL_1
-283    0x0011    //TX_NS_LVL_CTRL_2
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
 284    0x000F    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
 287    0x000F    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
 292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
@@ -10839,12 +19013,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x2000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
@@ -10904,10 +19078,10 @@
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -10915,15 +19089,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -11038,16 +19212,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -11076,19 +19250,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -11421,8 +19595,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0044    //RX_RECVFUNC_MODE_0
+0    0xA064    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -11447,7 +19686,7 @@
 22    0x0003    //RX_NS_LVL_CTRL
 23    0x9000    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -11536,8 +19775,8 @@
 111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -11546,12 +19785,12 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -11592,8 +19831,8 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -11602,601 +19841,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -12272,15 +19917,1461 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-FB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
 2    0x0020    //TX_PATCH_REG
-3    0x286A    //TX_SENDFUNC_MODE_0
+3    0x0200    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0004    //TX_SAMPLINGFREQ_SIG
@@ -12304,7 +21395,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x0800    //TX_PGA_0
+27    0x0915    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0000    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -12528,10 +21619,10 @@
 248    0xF600    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0200    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0400    //TX_DELTA_THR_SN_EST_2
-253    0x0300    //TX_DELTA_THR_SN_EST_3
-254    0x0600    //TX_DELTA_THR_SN_EST_4
+251    0x0400    //TX_DELTA_THR_SN_EST_1
+252    0x0300    //TX_DELTA_THR_SN_EST_2
+253    0x0600    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0200    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
@@ -12559,31 +21650,31 @@
 279    0x2000    //TX_B_POST_FLT_0
 280    0x2000    //TX_B_POST_FLT_1
 281    0x0012    //TX_NS_LVL_CTRL_0
-282    0x0019    //TX_NS_LVL_CTRL_1
+282    0x0016    //TX_NS_LVL_CTRL_1
 283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0019    //TX_NS_LVL_CTRL_4
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
 286    0x0010    //TX_NS_LVL_CTRL_5
-287    0x0010    //TX_NS_LVL_CTRL_6
+287    0x0019    //TX_NS_LVL_CTRL_6
 288    0x0010    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x0011    //TX_MIN_GAIN_S_1
+290    0x000C    //TX_MIN_GAIN_S_1
 291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000F    //TX_MIN_GAIN_S_4
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
+295    0x0011    //TX_MIN_GAIN_S_6
 296    0x000C    //TX_MIN_GAIN_S_7
 297    0x7FFF    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7000    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
+301    0x7000    //TX_SNRI_SUP_1
 302    0x7000    //TX_SNRI_SUP_2
-303    0x7000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
+303    0x6000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
 305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
+306    0x6000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0016    //TX_G_LFNS
@@ -12600,8 +21691,8 @@
 320    0x6000    //TX_A_POST_FILT_S_6
 321    0x6000    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x4000    //TX_B_POST_FILT_2
+323    0x4000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
 325    0x2000    //TX_B_POST_FILT_3
 326    0x2000    //TX_B_POST_FILT_4
 327    0x2000    //TX_B_POST_FILT_5
@@ -12657,10 +21748,10 @@
 377    0x0000    //TX_NOISE_TH_5_4
 378    0x02BC    //TX_NOISE_TH_6
 379    0x0020    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -12668,15 +21759,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -12791,16 +21882,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -12829,19 +21920,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -13130,7 +22221,7 @@
 850    0x0000    //TX_FFP_RESRV_4
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
+853    0x0000    //TX_FILTINDX
 854    0x0001    //TX_TDDRC_THRD_0
 855    0x0001    //TX_TDDRC_THRD_1
 856    0x1900    //TX_TDDRC_THRD_2
@@ -13174,8 +22265,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0004    //RX_RECVFUNC_MODE_0
+0    0x2064    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0004    //RX_SAMPLINGFREQ_SIG
 3    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -13200,7 +22356,7 @@
 22    0x000A    //RX_NS_LVL_CTRL
 23    0xF600    //RX_THR_SN_EST
 24    0x7000    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -13286,25 +22442,25 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
+111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -13345,611 +22501,17 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -14025,15 +22587,1461 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x0064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0500    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000A    //RX_NS_LVL_CTRL
+180    0xF600    //RX_THR_SN_EST
+181    0x7000    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-NB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0008    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x2A28    //TX_SENDFUNC_MODE_0
+3    0x2A68    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0000    //TX_SAMPLINGFREQ_SIG
@@ -14057,7 +24065,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x0800    //TX_PGA_0
+27    0x0A13    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -14281,20 +24289,20 @@
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -14312,16 +24320,16 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x000F    //TX_NS_LVL_CTRL_1
-283    0x0011    //TX_NS_LVL_CTRL_2
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
 284    0x000F    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
 287    0x000F    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
 292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
@@ -14345,12 +24353,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
@@ -14410,10 +24418,10 @@
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -14421,15 +24429,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -14544,16 +24552,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -14582,19 +24590,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x001C    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -14603,10 +24611,10 @@
 570    0x4848    //TX_FDEQ_GAIN_3
 571    0x4848    //TX_FDEQ_GAIN_4
 572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
+573    0x4242    //TX_FDEQ_GAIN_6
+574    0x423C    //TX_FDEQ_GAIN_7
+575    0x3C3C    //TX_FDEQ_GAIN_8
+576    0x3434    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
 579    0x4848    //TX_FDEQ_GAIN_12
@@ -14927,8 +24935,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0044    //RX_RECVFUNC_MODE_0
+0    0xA06C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -14953,7 +25026,7 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -14973,10 +25046,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -15000,7 +25073,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -15042,9 +25115,9 @@
 111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -15057,7 +25130,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -15098,9 +25171,9 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -15116,10 +25189,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -15143,601 +25216,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -15778,15 +25257,1461 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-WB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0008    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x2A28    //TX_SENDFUNC_MODE_0
+3    0x2A68    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
@@ -15810,7 +26735,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x0800    //TX_PGA_0
+27    0x0915    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -16034,20 +26959,20 @@
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -16065,16 +26990,16 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x000F    //TX_NS_LVL_CTRL_1
-283    0x0011    //TX_NS_LVL_CTRL_2
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
 284    0x000F    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
 287    0x000F    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
 292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
@@ -16098,12 +27023,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
@@ -16163,10 +27088,10 @@
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -16174,15 +27099,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -16297,16 +27222,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -16335,19 +27260,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x001C    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -16357,13 +27282,13 @@
 571    0x4848    //TX_FDEQ_GAIN_4
 572    0x4848    //TX_FDEQ_GAIN_5
 573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
+574    0x4444    //TX_FDEQ_GAIN_7
+575    0x4444    //TX_FDEQ_GAIN_8
+576    0x3C3C    //TX_FDEQ_GAIN_9
+577    0x3C3C    //TX_FDEQ_GAIN_10
+578    0x3C3C    //TX_FDEQ_GAIN_11
+579    0x3C30    //TX_FDEQ_GAIN_12
+580    0x3030    //TX_FDEQ_GAIN_13
 581    0x4848    //TX_FDEQ_GAIN_14
 582    0x4848    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
@@ -16387,7 +27312,7 @@
 601    0x0E0F    //TX_FDEQ_BIN_10
 602    0x0F10    //TX_FDEQ_BIN_11
 603    0x1011    //TX_FDEQ_BIN_12
-604    0x1104    //TX_FDEQ_BIN_13
+604    0x1112    //TX_FDEQ_BIN_13
 605    0x0000    //TX_FDEQ_BIN_14
 606    0x0000    //TX_FDEQ_BIN_15
 607    0x0000    //TX_FDEQ_BIN_16
@@ -16680,8 +27605,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x004C    //RX_RECVFUNC_MODE_0
+0    0xA06C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -16706,7 +27696,7 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -16729,11 +27719,11 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -16757,7 +27747,7 @@
 73    0x0E0F    //RX_FDEQ_BIN_10
 74    0x0F10    //RX_FDEQ_BIN_11
 75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+76    0x1112    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -16795,22 +27785,22 @@
 111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -16851,17 +27841,17 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -16872,11 +27862,11 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -16900,601 +27890,7 @@
 73    0x0E0F    //RX_FDEQ_BIN_10
 74    0x0F10    //RX_FDEQ_BIN_11
 75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+76    0x1112    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -17531,10 +27927,1456 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-SWB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -17563,7 +29405,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x0800    //TX_PGA_0
+27    0x0915    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -17787,20 +29629,20 @@
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -17818,16 +29660,16 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000B    //TX_NS_LVL_CTRL_0
-282    0x000F    //TX_NS_LVL_CTRL_1
-283    0x0011    //TX_NS_LVL_CTRL_2
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
 284    0x000F    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
 287    0x000F    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
 292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
@@ -17851,12 +29693,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x2000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
@@ -17916,10 +29758,10 @@
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -17927,15 +29769,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -18050,16 +29892,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -18088,19 +29930,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -18433,8 +30275,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0044    //RX_RECVFUNC_MODE_0
+0    0xA064    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -18459,7 +30366,7 @@
 22    0x0003    //RX_NS_LVL_CTRL
 23    0x9000    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -18548,8 +30455,8 @@
 111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -18558,12 +30465,12 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -18604,8 +30511,8 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -18614,601 +30521,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -19284,10 +30597,1456 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-FB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
@@ -19316,7 +32075,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x0800    //TX_PGA_0
+27    0x0915    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0000    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -19540,10 +32299,10 @@
 248    0xF600    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0200    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0400    //TX_DELTA_THR_SN_EST_2
-253    0x0300    //TX_DELTA_THR_SN_EST_3
-254    0x0600    //TX_DELTA_THR_SN_EST_4
+251    0x0400    //TX_DELTA_THR_SN_EST_1
+252    0x0300    //TX_DELTA_THR_SN_EST_2
+253    0x0600    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0200    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
@@ -19571,31 +32330,31 @@
 279    0x2000    //TX_B_POST_FLT_0
 280    0x2000    //TX_B_POST_FLT_1
 281    0x0012    //TX_NS_LVL_CTRL_0
-282    0x0019    //TX_NS_LVL_CTRL_1
+282    0x0016    //TX_NS_LVL_CTRL_1
 283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0019    //TX_NS_LVL_CTRL_4
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
 286    0x0010    //TX_NS_LVL_CTRL_5
-287    0x0010    //TX_NS_LVL_CTRL_6
+287    0x0019    //TX_NS_LVL_CTRL_6
 288    0x0010    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x0011    //TX_MIN_GAIN_S_1
+290    0x000C    //TX_MIN_GAIN_S_1
 291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000F    //TX_MIN_GAIN_S_4
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
+295    0x0011    //TX_MIN_GAIN_S_6
 296    0x000C    //TX_MIN_GAIN_S_7
 297    0x7FFF    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7000    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
+301    0x7000    //TX_SNRI_SUP_1
 302    0x7000    //TX_SNRI_SUP_2
-303    0x7000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
+303    0x6000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
 305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
+306    0x6000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0016    //TX_G_LFNS
@@ -19612,8 +32371,8 @@
 320    0x6000    //TX_A_POST_FILT_S_6
 321    0x6000    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x4000    //TX_B_POST_FILT_2
+323    0x4000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
 325    0x2000    //TX_B_POST_FILT_3
 326    0x2000    //TX_B_POST_FILT_4
 327    0x2000    //TX_B_POST_FILT_5
@@ -19669,10 +32428,10 @@
 377    0x0000    //TX_NOISE_TH_5_4
 378    0x02BC    //TX_NOISE_TH_6
 379    0x0020    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -19680,15 +32439,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -19803,16 +32562,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -19841,19 +32600,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -20186,8 +32945,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0004    //RX_RECVFUNC_MODE_0
+0    0x2064    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0004    //RX_SAMPLINGFREQ_SIG
 3    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -20212,7 +33036,7 @@
 22    0x000A    //RX_NS_LVL_CTRL
 23    0xF600    //RX_THR_SN_EST
 24    0x7000    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -20298,25 +33122,25 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
+111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -20357,611 +33181,17 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -21037,15 +33267,1461 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x0064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0500    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000A    //RX_NS_LVL_CTRL
+180    0xF600    //RX_THR_SN_EST
+181    0x7000    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-NB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0008    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x0200    //TX_SENDFUNC_MODE_0
+3    0x0240    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0000    //TX_SAMPLINGFREQ_SIG
@@ -21069,7 +34745,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x0800    //TX_PGA_0
+27    0x0A13    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -21293,20 +34969,20 @@
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -21324,16 +35000,16 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x000F    //TX_NS_LVL_CTRL_1
-283    0x0011    //TX_NS_LVL_CTRL_2
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
 284    0x000F    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
 287    0x000F    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
 292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
@@ -21357,12 +35033,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
@@ -21422,10 +35098,10 @@
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -21433,15 +35109,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -21556,16 +35232,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -21594,19 +35270,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x001C    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -21615,10 +35291,10 @@
 570    0x4848    //TX_FDEQ_GAIN_3
 571    0x4848    //TX_FDEQ_GAIN_4
 572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
+573    0x4242    //TX_FDEQ_GAIN_6
+574    0x423C    //TX_FDEQ_GAIN_7
+575    0x3C3C    //TX_FDEQ_GAIN_8
+576    0x3434    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
 579    0x4848    //TX_FDEQ_GAIN_12
@@ -21939,8 +35615,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0044    //RX_RECVFUNC_MODE_0
+0    0xA06C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -21965,7 +35706,7 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -21985,10 +35726,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -22012,7 +35753,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -22054,9 +35795,9 @@
 111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -22069,7 +35810,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -22110,9 +35851,9 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -22128,10 +35869,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -22155,601 +35896,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -22790,15 +35937,1461 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-WB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0008    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x0200    //TX_SENDFUNC_MODE_0
+3    0x0240    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
@@ -22822,7 +37415,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x0800    //TX_PGA_0
+27    0x0915    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -23046,20 +37639,20 @@
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -23077,16 +37670,16 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x000F    //TX_NS_LVL_CTRL_1
-283    0x0011    //TX_NS_LVL_CTRL_2
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
 284    0x000F    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
 287    0x000F    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
 292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
@@ -23110,12 +37703,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
@@ -23175,10 +37768,10 @@
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -23186,15 +37779,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -23309,16 +37902,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -23347,19 +37940,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x001C    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -23369,13 +37962,13 @@
 571    0x4848    //TX_FDEQ_GAIN_4
 572    0x4848    //TX_FDEQ_GAIN_5
 573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
+574    0x4444    //TX_FDEQ_GAIN_7
+575    0x4444    //TX_FDEQ_GAIN_8
+576    0x3C3C    //TX_FDEQ_GAIN_9
+577    0x3C3C    //TX_FDEQ_GAIN_10
+578    0x3C3C    //TX_FDEQ_GAIN_11
+579    0x3C30    //TX_FDEQ_GAIN_12
+580    0x3030    //TX_FDEQ_GAIN_13
 581    0x4848    //TX_FDEQ_GAIN_14
 582    0x4848    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
@@ -23399,7 +37992,7 @@
 601    0x0E0F    //TX_FDEQ_BIN_10
 602    0x0F10    //TX_FDEQ_BIN_11
 603    0x1011    //TX_FDEQ_BIN_12
-604    0x1104    //TX_FDEQ_BIN_13
+604    0x1112    //TX_FDEQ_BIN_13
 605    0x0000    //TX_FDEQ_BIN_14
 606    0x0000    //TX_FDEQ_BIN_15
 607    0x0000    //TX_FDEQ_BIN_16
@@ -23692,8 +38285,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x004C    //RX_RECVFUNC_MODE_0
+0    0xA06C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -23718,7 +38376,7 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -23741,11 +38399,11 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -23769,7 +38427,7 @@
 73    0x0E0F    //RX_FDEQ_BIN_10
 74    0x0F10    //RX_FDEQ_BIN_11
 75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+76    0x1112    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -23807,22 +38465,22 @@
 111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -23863,17 +38521,17 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -23884,11 +38542,11 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -23912,601 +38570,7 @@
 73    0x0E0F    //RX_FDEQ_BIN_10
 74    0x0F10    //RX_FDEQ_BIN_11
 75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+76    0x1112    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -24543,10 +38607,1456 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-SWB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -24575,7 +40085,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x0800    //TX_PGA_0
+27    0x0915    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -24799,20 +40309,20 @@
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -24830,16 +40340,16 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000B    //TX_NS_LVL_CTRL_0
-282    0x000F    //TX_NS_LVL_CTRL_1
-283    0x0011    //TX_NS_LVL_CTRL_2
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
 284    0x000F    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
 287    0x000F    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
 292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
@@ -24863,12 +40373,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x2000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
@@ -24928,10 +40438,10 @@
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -24939,15 +40449,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -25062,16 +40572,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -25100,19 +40610,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -25445,8 +40955,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0044    //RX_RECVFUNC_MODE_0
+0    0xA064    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -25471,7 +41046,7 @@
 22    0x0003    //RX_NS_LVL_CTRL
 23    0x9000    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -25560,8 +41135,8 @@
 111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -25570,12 +41145,12 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -25616,8 +41191,8 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -25626,601 +41201,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -26296,15 +41277,1461 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-FB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
 2    0x0020    //TX_PATCH_REG
-3    0x286A    //TX_SENDFUNC_MODE_0
+3    0x0200    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0004    //TX_SAMPLINGFREQ_SIG
@@ -26328,7 +42755,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x0800    //TX_PGA_0
+27    0x0915    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0000    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -26552,10 +42979,10 @@
 248    0xF600    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0200    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0400    //TX_DELTA_THR_SN_EST_2
-253    0x0300    //TX_DELTA_THR_SN_EST_3
-254    0x0600    //TX_DELTA_THR_SN_EST_4
+251    0x0400    //TX_DELTA_THR_SN_EST_1
+252    0x0300    //TX_DELTA_THR_SN_EST_2
+253    0x0600    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0200    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
@@ -26583,31 +43010,31 @@
 279    0x2000    //TX_B_POST_FLT_0
 280    0x2000    //TX_B_POST_FLT_1
 281    0x0012    //TX_NS_LVL_CTRL_0
-282    0x0019    //TX_NS_LVL_CTRL_1
+282    0x0016    //TX_NS_LVL_CTRL_1
 283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0019    //TX_NS_LVL_CTRL_4
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
 286    0x0010    //TX_NS_LVL_CTRL_5
-287    0x0010    //TX_NS_LVL_CTRL_6
+287    0x0019    //TX_NS_LVL_CTRL_6
 288    0x0010    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x0011    //TX_MIN_GAIN_S_1
+290    0x000C    //TX_MIN_GAIN_S_1
 291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000F    //TX_MIN_GAIN_S_4
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
+295    0x0011    //TX_MIN_GAIN_S_6
 296    0x000C    //TX_MIN_GAIN_S_7
 297    0x7FFF    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7000    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
+301    0x7000    //TX_SNRI_SUP_1
 302    0x7000    //TX_SNRI_SUP_2
-303    0x7000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
+303    0x6000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
 305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
+306    0x6000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0016    //TX_G_LFNS
@@ -26624,8 +43051,8 @@
 320    0x6000    //TX_A_POST_FILT_S_6
 321    0x6000    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x4000    //TX_B_POST_FILT_2
+323    0x4000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
 325    0x2000    //TX_B_POST_FILT_3
 326    0x2000    //TX_B_POST_FILT_4
 327    0x2000    //TX_B_POST_FILT_5
@@ -26681,10 +43108,10 @@
 377    0x0000    //TX_NOISE_TH_5_4
 378    0x02BC    //TX_NOISE_TH_6
 379    0x0020    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -26692,15 +43119,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -26815,16 +43242,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -26853,19 +43280,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -27154,7 +43581,7 @@
 850    0x0000    //TX_FFP_RESRV_4
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
+853    0x0000    //TX_FILTINDX
 854    0x0001    //TX_TDDRC_THRD_0
 855    0x0001    //TX_TDDRC_THRD_1
 856    0x1900    //TX_TDDRC_THRD_2
@@ -27198,8 +43625,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0004    //RX_RECVFUNC_MODE_0
+0    0x2064    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0004    //RX_SAMPLINGFREQ_SIG
 3    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -27224,7 +43716,7 @@
 22    0x000A    //RX_NS_LVL_CTRL
 23    0xF600    //RX_THR_SN_EST
 24    0x7000    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -27310,25 +43802,25 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
+111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -27369,611 +43861,17 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -28049,15 +43947,1461 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x0064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0500    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000A    //RX_NS_LVL_CTRL
+180    0xF600    //RX_THR_SN_EST
+181    0x7000    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-NB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0008    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x2A28    //TX_SENDFUNC_MODE_0
+3    0x2A68    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0000    //TX_SAMPLINGFREQ_SIG
@@ -28081,7 +45425,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x0800    //TX_PGA_0
+27    0x0A13    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -28305,20 +45649,20 @@
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -28336,16 +45680,16 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x000F    //TX_NS_LVL_CTRL_1
-283    0x0011    //TX_NS_LVL_CTRL_2
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
 284    0x000F    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
 287    0x000F    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
 292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
@@ -28369,12 +45713,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
@@ -28434,10 +45778,10 @@
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -28445,15 +45789,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -28568,16 +45912,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -28606,19 +45950,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x001C    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -28627,10 +45971,10 @@
 570    0x4848    //TX_FDEQ_GAIN_3
 571    0x4848    //TX_FDEQ_GAIN_4
 572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
+573    0x4242    //TX_FDEQ_GAIN_6
+574    0x423C    //TX_FDEQ_GAIN_7
+575    0x3C3C    //TX_FDEQ_GAIN_8
+576    0x3434    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
 579    0x4848    //TX_FDEQ_GAIN_12
@@ -28951,8 +46295,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0044    //RX_RECVFUNC_MODE_0
+0    0xA06C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -28977,7 +46386,7 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -28997,10 +46406,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -29024,7 +46433,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -29066,9 +46475,9 @@
 111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -29081,7 +46490,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -29122,9 +46531,9 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -29140,10 +46549,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -29167,601 +46576,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -29802,15 +46617,1461 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-WB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0008    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x2A28    //TX_SENDFUNC_MODE_0
+3    0x2A68    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
@@ -29834,7 +48095,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x0800    //TX_PGA_0
+27    0x0915    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -30058,20 +48319,20 @@
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -30089,16 +48350,16 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x000F    //TX_NS_LVL_CTRL_1
-283    0x0011    //TX_NS_LVL_CTRL_2
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
 284    0x000F    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
 287    0x000F    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
 292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
@@ -30122,12 +48383,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
@@ -30187,10 +48448,10 @@
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -30198,15 +48459,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -30321,16 +48582,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -30359,19 +48620,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x001C    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -30381,13 +48642,13 @@
 571    0x4848    //TX_FDEQ_GAIN_4
 572    0x4848    //TX_FDEQ_GAIN_5
 573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
+574    0x4444    //TX_FDEQ_GAIN_7
+575    0x4444    //TX_FDEQ_GAIN_8
+576    0x3C3C    //TX_FDEQ_GAIN_9
+577    0x3C3C    //TX_FDEQ_GAIN_10
+578    0x3C3C    //TX_FDEQ_GAIN_11
+579    0x3C30    //TX_FDEQ_GAIN_12
+580    0x3030    //TX_FDEQ_GAIN_13
 581    0x4848    //TX_FDEQ_GAIN_14
 582    0x4848    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
@@ -30411,7 +48672,7 @@
 601    0x0E0F    //TX_FDEQ_BIN_10
 602    0x0F10    //TX_FDEQ_BIN_11
 603    0x1011    //TX_FDEQ_BIN_12
-604    0x1104    //TX_FDEQ_BIN_13
+604    0x1112    //TX_FDEQ_BIN_13
 605    0x0000    //TX_FDEQ_BIN_14
 606    0x0000    //TX_FDEQ_BIN_15
 607    0x0000    //TX_FDEQ_BIN_16
@@ -30704,8 +48965,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x004C    //RX_RECVFUNC_MODE_0
+0    0xA06C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -30730,7 +49056,7 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -30753,11 +49079,11 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -30781,7 +49107,7 @@
 73    0x0E0F    //RX_FDEQ_BIN_10
 74    0x0F10    //RX_FDEQ_BIN_11
 75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+76    0x1112    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -30819,22 +49145,22 @@
 111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -30875,17 +49201,17 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -30896,11 +49222,11 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -30924,601 +49250,7 @@
 73    0x0E0F    //RX_FDEQ_BIN_10
 74    0x0F10    //RX_FDEQ_BIN_11
 75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01AE    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+76    0x1112    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -31555,10 +49287,1456 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -31587,7 +50765,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x0800    //TX_PGA_0
+27    0x0915    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -31811,20 +50989,20 @@
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -31842,16 +51020,16 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000B    //TX_NS_LVL_CTRL_0
-282    0x000F    //TX_NS_LVL_CTRL_1
-283    0x0011    //TX_NS_LVL_CTRL_2
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
 284    0x000F    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
 287    0x000F    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
 292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
@@ -31875,12 +51053,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x2000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
@@ -31940,10 +51118,10 @@
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -31951,15 +51129,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -32074,16 +51252,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -32112,19 +51290,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -32457,8 +51635,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0044    //RX_RECVFUNC_MODE_0
+0    0xA064    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -32483,7 +51726,7 @@
 22    0x0003    //RX_NS_LVL_CTRL
 23    0x9000    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -32572,8 +51815,8 @@
 111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -32582,12 +51825,12 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -32628,8 +51871,8 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -32638,601 +51881,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x2000    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -33308,10 +51957,1456 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-FB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
@@ -33340,7 +53435,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x0800    //TX_PGA_0
+27    0x0915    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0000    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -33564,10 +53659,10 @@
 248    0xF600    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0200    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0400    //TX_DELTA_THR_SN_EST_2
-253    0x0300    //TX_DELTA_THR_SN_EST_3
-254    0x0600    //TX_DELTA_THR_SN_EST_4
+251    0x0400    //TX_DELTA_THR_SN_EST_1
+252    0x0300    //TX_DELTA_THR_SN_EST_2
+253    0x0600    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0200    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
@@ -33595,31 +53690,31 @@
 279    0x2000    //TX_B_POST_FLT_0
 280    0x2000    //TX_B_POST_FLT_1
 281    0x0012    //TX_NS_LVL_CTRL_0
-282    0x0019    //TX_NS_LVL_CTRL_1
+282    0x0016    //TX_NS_LVL_CTRL_1
 283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0019    //TX_NS_LVL_CTRL_4
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
 286    0x0010    //TX_NS_LVL_CTRL_5
-287    0x0010    //TX_NS_LVL_CTRL_6
+287    0x0019    //TX_NS_LVL_CTRL_6
 288    0x0010    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x0011    //TX_MIN_GAIN_S_1
+290    0x000C    //TX_MIN_GAIN_S_1
 291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000F    //TX_MIN_GAIN_S_4
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
+295    0x0011    //TX_MIN_GAIN_S_6
 296    0x000C    //TX_MIN_GAIN_S_7
 297    0x7FFF    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7000    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
+301    0x7000    //TX_SNRI_SUP_1
 302    0x7000    //TX_SNRI_SUP_2
-303    0x7000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
+303    0x6000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
 305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
+306    0x6000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0016    //TX_G_LFNS
@@ -33636,8 +53731,8 @@
 320    0x6000    //TX_A_POST_FILT_S_6
 321    0x6000    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x4000    //TX_B_POST_FILT_2
+323    0x4000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
 325    0x2000    //TX_B_POST_FILT_3
 326    0x2000    //TX_B_POST_FILT_4
 327    0x2000    //TX_B_POST_FILT_5
@@ -33693,10 +53788,10 @@
 377    0x0000    //TX_NOISE_TH_5_4
 378    0x02BC    //TX_NOISE_TH_6
 379    0x0020    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -33704,15 +53799,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -33827,16 +53922,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -33865,19 +53960,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -34210,8 +54305,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0004    //RX_RECVFUNC_MODE_0
+0    0x2064    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0004    //RX_SAMPLINGFREQ_SIG
 3    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -34236,7 +54396,7 @@
 22    0x000A    //RX_NS_LVL_CTRL
 23    0xF600    //RX_THR_SN_EST
 24    0x7000    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -34322,25 +54482,25 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
+111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -34381,611 +54541,17 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
+124    0x0155    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -35061,4 +54627,14799 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x0064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0500    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000A    //RX_NS_LVL_CTRL
+180    0xF600    //RX_THR_SN_EST
+181    0x7000    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BT_HAC-RESERVE2-SWB
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00F3    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009C    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7600    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x0600    //TX_MIN_EQ_RE_EST_1
+154    0x3000    //TX_MIN_EQ_RE_EST_2
+155    0x3000    //TX_MIN_EQ_RE_EST_3
+156    0x3000    //TX_MIN_EQ_RE_EST_4
+157    0x3000    //TX_MIN_EQ_RE_EST_5
+158    0x3000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x7800    //TX_MIN_EQ_RE_EST_8
+161    0x7800    //TX_MIN_EQ_RE_EST_9
+162    0x7800    //TX_MIN_EQ_RE_EST_10
+163    0x7800    //TX_MIN_EQ_RE_EST_11
+164    0x7800    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x3000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0680    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7B0C    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x36B0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x01F4    //TX_RATIO_DT_L_TH_HIGH
+226    0x59D8    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x00C8    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0000    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0024    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x7FFF    //TX_A_POST_FILT_S_1
+316    0x7FFF    //TX_A_POST_FILT_S_2
+317    0x7FFF    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x7FFF    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x6000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7F00    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x3E80    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x36B0    //TX_DT_BINVAD_ENDF
+358    0x0200    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x36B0    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x2CEC    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E5C    //TX_FDEQ_GAIN_6
+574    0x564E    //TX_FDEQ_GAIN_7
+575    0x4C4E    //TX_FDEQ_GAIN_8
+576    0x4E45    //TX_FDEQ_GAIN_9
+577    0x494A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x5C54    //TX_FDEQ_GAIN_12
+580    0x5466    //TX_FDEQ_GAIN_13
+581    0x5C70    //TX_FDEQ_GAIN_14
+582    0x7C84    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0004    //TX_TDDRC_THRD_1
+856    0x1000    //TX_TDDRC_THRD_2
+857    0x1000    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x1380    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x01C2    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7918    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x3A98    //TX_DTD_THR1_MICMUTE_2
+914    0x32C8    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0xE4A8    //TX_AMS_RESRV_02
+945    0x1770    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0xA064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB-RESERVE2-SWB
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0000    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0xA064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB_NREC-RESERVE2-SWB
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2A28    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0xA064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB-RESERVE2-SWB
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0000    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0xA064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB_NREC-RESERVE2-SWB
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2A28    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0xA064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
diff --git a/audio/tangorpro/tuning/fortemedia/HANDSET.dat b/audio/tangorpro/tuning/fortemedia/HANDSET.dat
index 28e55eb..534c3b2 100644
Binary files a/audio/tangorpro/tuning/fortemedia/HANDSET.dat and b/audio/tangorpro/tuning/fortemedia/HANDSET.dat differ
diff --git a/audio/tangorpro/tuning/fortemedia/HANDSET.mods b/audio/tangorpro/tuning/fortemedia/HANDSET.mods
index 9860937..4fc81ad 100644
--- a/audio/tangorpro/tuning/fortemedia/HANDSET.mods
+++ b/audio/tangorpro/tuning/fortemedia/HANDSET.mods
@@ -1,17 +1,8028 @@
 #PLATFORM_NAME  gChip
 #EXPORT_FLAG  HANDSET
-#SINGLE_API_VER  1.1.6
-#SAVE_TIME  2021-01-29 12:33:27
+#SINGLE_API_VER  1.2.1
+#SAVE_TIME  2022-06-14 18:44:53
+
+#CASE_NAME  HANDSET-HANDSET-RESERVE1-FB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6B56    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0007    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x00C6    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x47E0    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x39DF    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x051E    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x7FFF    //TX_GSC_RTOL_TH
+522    0x7FFF    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x4C4A    //TX_FDEQ_GAIN_0
+568    0x4B4F    //TX_FDEQ_GAIN_1
+569    0x504B    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4A49    //TX_FDEQ_GAIN_4
+572    0x4F48    //TX_FDEQ_GAIN_5
+573    0x4A4E    //TX_FDEQ_GAIN_6
+574    0x534E    //TX_FDEQ_GAIN_7
+575    0x494F    //TX_FDEQ_GAIN_8
+576    0x5E6E    //TX_FDEQ_GAIN_9
+577    0x787A    //TX_FDEQ_GAIN_10
+578    0x6A58    //TX_FDEQ_GAIN_11
+579    0x5051    //TX_FDEQ_GAIN_12
+580    0x5156    //TX_FDEQ_GAIN_13
+581    0x6168    //TX_FDEQ_GAIN_14
+582    0x7678    //TX_FDEQ_GAIN_15
+583    0x7A87    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0F03    //TX_FDEQ_BIN_0
+592    0x0909    //TX_FDEQ_BIN_1
+593    0x080F    //TX_FDEQ_BIN_2
+594    0x0609    //TX_FDEQ_BIN_3
+595    0x0F03    //TX_FDEQ_BIN_4
+596    0x1402    //TX_FDEQ_BIN_5
+597    0x0E13    //TX_FDEQ_BIN_6
+598    0x110F    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x0E0F    //TX_FDEQ_BIN_9
+601    0x080D    //TX_FDEQ_BIN_10
+602    0x0F0F    //TX_FDEQ_BIN_11
+603    0x0F0F    //TX_FDEQ_BIN_12
+604    0x0A0F    //TX_FDEQ_BIN_13
+605    0x0809    //TX_FDEQ_BIN_14
+606    0x0A0B    //TX_FDEQ_BIN_15
+607    0x0C0D    //TX_FDEQ_BIN_16
+608    0x0E0F    //TX_FDEQ_BIN_17
+609    0x1013    //TX_FDEQ_BIN_18
+610    0x0A00    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x1812    //TX_PREEQ_BIN_MIC0_0
+642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x080A    //TX_PREEQ_BIN_MIC0_3
+645    0x0B09    //TX_PREEQ_BIN_MIC0_4
+646    0x0A06    //TX_PREEQ_BIN_MIC0_5
+647    0x0606    //TX_PREEQ_BIN_MIC0_6
+648    0x0605    //TX_PREEQ_BIN_MIC0_7
+649    0x050A    //TX_PREEQ_BIN_MIC0_8
+650    0x1505    //TX_PREEQ_BIN_MIC0_9
+651    0x0506    //TX_PREEQ_BIN_MIC0_10
+652    0x0615    //TX_PREEQ_BIN_MIC0_11
+653    0x1516    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x2021    //TX_PREEQ_BIN_MIC0_14
+656    0x2021    //TX_PREEQ_BIN_MIC0_15
+657    0x0800    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4A4C    //TX_PREEQ_GAIN_MIC1_6
+673    0x4E50    //TX_PREEQ_GAIN_MIC1_7
+674    0x5456    //TX_PREEQ_GAIN_MIC1_8
+675    0x585C    //TX_PREEQ_GAIN_MIC1_9
+676    0x5C64    //TX_PREEQ_GAIN_MIC1_10
+677    0x7478    //TX_PREEQ_GAIN_MIC1_11
+678    0x705C    //TX_PREEQ_GAIN_MIC1_12
+679    0x4838    //TX_PREEQ_GAIN_MIC1_13
+680    0x3C70    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x1414    //TX_PREEQ_BIN_MIC1_12
+703    0x1C1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x462C    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0504    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x003C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0722    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0016    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0024    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x003A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0059    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0090    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0722    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0016    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0024    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x003A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0059    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0090    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-CUSTOM2-FB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6B5E    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0007    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x00C6    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x47E0    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x39DF    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x051E    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x7FFF    //TX_GSC_RTOL_TH
+522    0x7FFF    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x4C4A    //TX_FDEQ_GAIN_0
+568    0x4B4F    //TX_FDEQ_GAIN_1
+569    0x504B    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4A49    //TX_FDEQ_GAIN_4
+572    0x4F48    //TX_FDEQ_GAIN_5
+573    0x4A4E    //TX_FDEQ_GAIN_6
+574    0x534E    //TX_FDEQ_GAIN_7
+575    0x494F    //TX_FDEQ_GAIN_8
+576    0x5E6E    //TX_FDEQ_GAIN_9
+577    0x787A    //TX_FDEQ_GAIN_10
+578    0x6A58    //TX_FDEQ_GAIN_11
+579    0x5051    //TX_FDEQ_GAIN_12
+580    0x5156    //TX_FDEQ_GAIN_13
+581    0x6168    //TX_FDEQ_GAIN_14
+582    0x7678    //TX_FDEQ_GAIN_15
+583    0x7A87    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0F03    //TX_FDEQ_BIN_0
+592    0x0909    //TX_FDEQ_BIN_1
+593    0x080F    //TX_FDEQ_BIN_2
+594    0x0609    //TX_FDEQ_BIN_3
+595    0x0F03    //TX_FDEQ_BIN_4
+596    0x1402    //TX_FDEQ_BIN_5
+597    0x0E13    //TX_FDEQ_BIN_6
+598    0x110F    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x0E0F    //TX_FDEQ_BIN_9
+601    0x080D    //TX_FDEQ_BIN_10
+602    0x0F0F    //TX_FDEQ_BIN_11
+603    0x0F0F    //TX_FDEQ_BIN_12
+604    0x0A0F    //TX_FDEQ_BIN_13
+605    0x0809    //TX_FDEQ_BIN_14
+606    0x0A0B    //TX_FDEQ_BIN_15
+607    0x0C0D    //TX_FDEQ_BIN_16
+608    0x0E0F    //TX_FDEQ_BIN_17
+609    0x1013    //TX_FDEQ_BIN_18
+610    0x0A00    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x1812    //TX_PREEQ_BIN_MIC0_0
+642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x080A    //TX_PREEQ_BIN_MIC0_3
+645    0x0B09    //TX_PREEQ_BIN_MIC0_4
+646    0x0A06    //TX_PREEQ_BIN_MIC0_5
+647    0x0606    //TX_PREEQ_BIN_MIC0_6
+648    0x0605    //TX_PREEQ_BIN_MIC0_7
+649    0x050A    //TX_PREEQ_BIN_MIC0_8
+650    0x1505    //TX_PREEQ_BIN_MIC0_9
+651    0x0506    //TX_PREEQ_BIN_MIC0_10
+652    0x0615    //TX_PREEQ_BIN_MIC0_11
+653    0x1516    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x2021    //TX_PREEQ_BIN_MIC0_14
+656    0x2021    //TX_PREEQ_BIN_MIC0_15
+657    0x0800    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4A4C    //TX_PREEQ_GAIN_MIC1_6
+673    0x4E50    //TX_PREEQ_GAIN_MIC1_7
+674    0x5456    //TX_PREEQ_GAIN_MIC1_8
+675    0x585C    //TX_PREEQ_GAIN_MIC1_9
+676    0x5C64    //TX_PREEQ_GAIN_MIC1_10
+677    0x7478    //TX_PREEQ_GAIN_MIC1_11
+678    0x705C    //TX_PREEQ_GAIN_MIC1_12
+679    0x4838    //TX_PREEQ_GAIN_MIC1_13
+680    0x3C70    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x1414    //TX_PREEQ_BIN_MIC1_12
+703    0x1C1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x462C    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0504    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x003C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0722    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0016    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0024    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x003A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0059    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0090    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0722    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0016    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0024    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x003A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0059    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0090    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-CUSTOM1-FB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6B76    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0007    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x00C6    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x47E0    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x39DF    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x051E    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x7FFF    //TX_GSC_RTOL_TH
+522    0x7FFF    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x4C4A    //TX_FDEQ_GAIN_0
+568    0x4B4F    //TX_FDEQ_GAIN_1
+569    0x504B    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4A49    //TX_FDEQ_GAIN_4
+572    0x4F48    //TX_FDEQ_GAIN_5
+573    0x4A4E    //TX_FDEQ_GAIN_6
+574    0x534E    //TX_FDEQ_GAIN_7
+575    0x494F    //TX_FDEQ_GAIN_8
+576    0x5E6E    //TX_FDEQ_GAIN_9
+577    0x787A    //TX_FDEQ_GAIN_10
+578    0x6A58    //TX_FDEQ_GAIN_11
+579    0x5051    //TX_FDEQ_GAIN_12
+580    0x5156    //TX_FDEQ_GAIN_13
+581    0x6168    //TX_FDEQ_GAIN_14
+582    0x7678    //TX_FDEQ_GAIN_15
+583    0x7A87    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0F03    //TX_FDEQ_BIN_0
+592    0x0909    //TX_FDEQ_BIN_1
+593    0x080F    //TX_FDEQ_BIN_2
+594    0x0609    //TX_FDEQ_BIN_3
+595    0x0F03    //TX_FDEQ_BIN_4
+596    0x1402    //TX_FDEQ_BIN_5
+597    0x0E13    //TX_FDEQ_BIN_6
+598    0x110F    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x0E0F    //TX_FDEQ_BIN_9
+601    0x080D    //TX_FDEQ_BIN_10
+602    0x0F0F    //TX_FDEQ_BIN_11
+603    0x0F0F    //TX_FDEQ_BIN_12
+604    0x0A0F    //TX_FDEQ_BIN_13
+605    0x0809    //TX_FDEQ_BIN_14
+606    0x0A0B    //TX_FDEQ_BIN_15
+607    0x0C0D    //TX_FDEQ_BIN_16
+608    0x0E0F    //TX_FDEQ_BIN_17
+609    0x1013    //TX_FDEQ_BIN_18
+610    0x0A00    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x1812    //TX_PREEQ_BIN_MIC0_0
+642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x080A    //TX_PREEQ_BIN_MIC0_3
+645    0x0B09    //TX_PREEQ_BIN_MIC0_4
+646    0x0A06    //TX_PREEQ_BIN_MIC0_5
+647    0x0606    //TX_PREEQ_BIN_MIC0_6
+648    0x0605    //TX_PREEQ_BIN_MIC0_7
+649    0x050A    //TX_PREEQ_BIN_MIC0_8
+650    0x1505    //TX_PREEQ_BIN_MIC0_9
+651    0x0506    //TX_PREEQ_BIN_MIC0_10
+652    0x0615    //TX_PREEQ_BIN_MIC0_11
+653    0x1516    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x2021    //TX_PREEQ_BIN_MIC0_14
+656    0x2021    //TX_PREEQ_BIN_MIC0_15
+657    0x0800    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4A4C    //TX_PREEQ_GAIN_MIC1_6
+673    0x4E50    //TX_PREEQ_GAIN_MIC1_7
+674    0x5456    //TX_PREEQ_GAIN_MIC1_8
+675    0x585C    //TX_PREEQ_GAIN_MIC1_9
+676    0x5C64    //TX_PREEQ_GAIN_MIC1_10
+677    0x7478    //TX_PREEQ_GAIN_MIC1_11
+678    0x705C    //TX_PREEQ_GAIN_MIC1_12
+679    0x4838    //TX_PREEQ_GAIN_MIC1_13
+680    0x3C70    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x1414    //TX_PREEQ_BIN_MIC1_12
+703    0x1C1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x462C    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0504    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x003C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0722    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0016    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0024    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x003A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0059    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0090    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0722    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0016    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0024    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x003A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0059    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0090    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-NB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
-2    0x0036    //TX_PATCH_REG
-3    0x6F7A    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0000    //TX_SAMPLINGFREQ_SIG
 7    0x0000    //TX_SAMPLINGFREQ_PROC
@@ -28,7 +8039,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
+21    0x009C    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -49,8 +8060,8 @@
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
 41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
 46    0x0000    //TX_MIC_PAIR_CH_05
@@ -115,7 +8126,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -239,13 +8250,13 @@
 229    0x2000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0025    //TX_EPD_OFFSET_00
+232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
 234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -258,19 +8269,19 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF700    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x01A0    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x01A0    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x01A0    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0000    //TX_DELTA_THR_SN_EST_5
+256    0x01A0    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x3000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
+259    0x3000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x3000    //TX_LAMBDA_NN_EST_3
 262    0x3000    //TX_LAMBDA_NN_EST_4
-263    0x3000    //TX_LAMBDA_NN_EST_5
+263    0x4000    //TX_LAMBDA_NN_EST_5
 264    0x4000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
@@ -289,20 +8300,20 @@
 279    0x4000    //TX_B_POST_FLT_0
 280    0x4000    //TX_B_POST_FLT_1
 281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x001B    //TX_NS_LVL_CTRL_1
-283    0x0019    //TX_NS_LVL_CTRL_2
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x001B    //TX_NS_LVL_CTRL_2
 284    0x0017    //TX_NS_LVL_CTRL_3
-285    0x0017    //TX_NS_LVL_CTRL_4
-286    0x0019    //TX_NS_LVL_CTRL_5
-287    0x0014    //TX_NS_LVL_CTRL_6
+285    0x0019    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x001B    //TX_NS_LVL_CTRL_6
 288    0x0010    //TX_NS_LVL_CTRL_7
 289    0x0010    //TX_MIN_GAIN_S_0
 290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
+291    0x0010    //TX_MIN_GAIN_S_2
 292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x0014    //TX_MIN_GAIN_S_6
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
 296    0x0014    //TX_MIN_GAIN_S_7
 297    0x5000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
@@ -312,8 +8323,8 @@
 302    0x4000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
 307    0x3000    //TX_SNRI_SUP_7
 308    0x3000    //TX_THR_LFNS
 309    0x001A    //TX_G_LFNS
@@ -322,36 +8333,36 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x2000    //TX_A_POST_FILT_S_0
-315    0x7000    //TX_A_POST_FILT_S_1
-316    0x6000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x2000    //TX_A_POST_FILT_S_4
-319    0x6000    //TX_A_POST_FILT_S_5
-320    0x2000    //TX_A_POST_FILT_S_6
+315    0x2000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x2000    //TX_A_POST_FILT_S_5
+320    0x7000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x4000    //TX_B_POST_FILT_0
-323    0x4000    //TX_B_POST_FILT_1
-324    0x7FFF    //TX_B_POST_FILT_2
-325    0x5000    //TX_B_POST_FILT_3
-326    0x7FFF    //TX_B_POST_FILT_4
-327    0x7FFF    //TX_B_POST_FILT_5
+323    0x2000    //TX_B_POST_FILT_1
+324    0x5000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
 328    0x4000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
 338    0x7E14    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7200    //TX_LAMBDA_PFILT_S_2
-342    0x7900    //TX_LAMBDA_PFILT_S_3
-343    0x7400    //TX_LAMBDA_PFILT_S_4
-344    0x7200    //TX_LAMBDA_PFILT_S_5
+340    0x7200    //TX_LAMBDA_PFILT_S_1
+341    0x7800    //TX_LAMBDA_PFILT_S_2
+342    0x7400    //TX_LAMBDA_PFILT_S_3
+343    0x7200    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
 345    0x7C29    //TX_LAMBDA_PFILT_S_6
 346    0x7C29    //TX_LAMBDA_PFILT_S_7
 347    0x0200    //TX_K_PEPPER
@@ -379,18 +8390,18 @@
 369    0x2134    //TX_NOISE_TH_0_3
 370    0x0320    //TX_NOISE_TH_1
 371    0x022C    //TX_NOISE_TH_2
-372    0x2710    //TX_NOISE_TH_3
-373    0x1B58    //TX_NOISE_TH_4
+372    0x2260    //TX_NOISE_TH_3
+373    0x6B6C    //TX_NOISE_TH_4
 374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x0000    //TX_NOISE_TH_5_4
-378    0x0640    //TX_NOISE_TH_6
+378    0x07D0    //TX_NOISE_TH_6
 379    0x0004    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
 385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
@@ -398,15 +8409,15 @@
 388    0x00CE    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0001    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -435,7 +8446,7 @@
 425    0x0280    //TX_SB_RHO_MEAN_TH_NTALK
 426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
 427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0990    //TX_WTA_EN_RTO_TH
+428    0x0100    //TX_WTA_EN_RTO_TH
 429    0x1400    //TX_TOP_ENER_TH_F
 430    0x0100    //TX_DESIRED_TALK_HOLDT
 431    0x0800    //TX_MIC_BLOCK_FACTOR
@@ -447,8 +8458,8 @@
 437    0x0032    //TX_SILENCE_T
 438    0x0000    //TX_A_POST_FLT_WTA
 439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0640    //TX_SB_RHO_MEAN3_TH
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0666    //TX_SB_RHO_MEAN3_TH
 442    0x0000    //TX_HS_RESRV_4
 443    0x0000    //TX_HS_RESRV_5
 444    0x003C    //TX_DOA_VAD_THR_1
@@ -516,21 +8527,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x6000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -559,30 +8570,30 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0018    //TX_FDEQ_SUBNUM
 567    0x6C60    //TX_FDEQ_GAIN_0
 568    0x584F    //TX_FDEQ_GAIN_1
 569    0x4F4E    //TX_FDEQ_GAIN_2
 570    0x474A    //TX_FDEQ_GAIN_3
-571    0x473F    //TX_FDEQ_GAIN_4
-572    0x4240    //TX_FDEQ_GAIN_5
+571    0x433B    //TX_FDEQ_GAIN_4
+572    0x3A40    //TX_FDEQ_GAIN_5
 573    0x4040    //TX_FDEQ_GAIN_6
-574    0x3630    //TX_FDEQ_GAIN_7
-575    0x2020    //TX_FDEQ_GAIN_8
+574    0x3631    //TX_FDEQ_GAIN_7
+575    0x2220    //TX_FDEQ_GAIN_8
 576    0x383C    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
@@ -607,7 +8618,7 @@
 597    0x0808    //TX_FDEQ_BIN_6
 598    0x050E    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0F0F    //TX_FDEQ_BIN_9
+600    0x0F09    //TX_FDEQ_BIN_9
 601    0x0000    //TX_FDEQ_BIN_10
 602    0x0000    //TX_FDEQ_BIN_11
 603    0x0000    //TX_FDEQ_BIN_12
@@ -624,10 +8635,10 @@
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
 616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4846    //TX_PREEQ_GAIN_MIC0_0
-618    0x4544    //TX_PREEQ_GAIN_MIC0_1
-619    0x4240    //TX_PREEQ_GAIN_MIC0_2
-620    0x3E48    //TX_PREEQ_GAIN_MIC0_3
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
 621    0x4848    //TX_PREEQ_GAIN_MIC0_4
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
 623    0x4848    //TX_PREEQ_GAIN_MIC0_6
@@ -679,9 +8690,9 @@
 669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+672    0x4A4A    //TX_PREEQ_GAIN_MIC1_6
+673    0x4B4B    //TX_PREEQ_GAIN_MIC1_7
+674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
 675    0x4848    //TX_PREEQ_GAIN_MIC1_9
 676    0x4848    //TX_PREEQ_GAIN_MIC1_10
 677    0x4848    //TX_PREEQ_GAIN_MIC1_11
@@ -697,22 +8708,22 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
@@ -782,8 +8793,8 @@
 772    0x0044    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
 774    0x0000    //TX_GAIN_LIMIT_1
-775    0x0006    //TX_GAIN_LIMIT_2
-776    0x0006    //TX_GAIN_LIMIT_3
+775    0x0007    //TX_GAIN_LIMIT_2
+776    0x0007    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -873,7 +8884,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0550    //TX_TDDRC_DRC_GAIN
+866    0x0531    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -904,8 +8915,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x00A0    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0012    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7F00    //TX_DTD_THR1_MICMUTE_0
+912    0x7900    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0x3FFF    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x002C    //RX_RECVFUNC_MODE_0
+0    0x243C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -915,7 +8991,7 @@
 7    0x1000    //RX_TDDRC_ALPHA_UP_2
 8    0x1000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0600    //RX_PGA
+10    0x050E    //RX_PGA
 11    0x7FFF    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -930,7 +9006,7 @@
 22    0x0014    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -945,15 +9021,15 @@
 37    0x4000    //RX_LMT_ALPHA
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x4840    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x4E62    //RX_FDEQ_GAIN_2
-42    0x6C7A    //RX_FDEQ_GAIN_3
-43    0x8690    //RX_FDEQ_GAIN_4
-44    0x867E    //RX_FDEQ_GAIN_5
-45    0x7E7E    //RX_FDEQ_GAIN_6
-46    0x8080    //RX_FDEQ_GAIN_7
-47    0x8088    //RX_FDEQ_GAIN_8
-48    0x8890    //RX_FDEQ_GAIN_9
+40    0x3E40    //RX_FDEQ_GAIN_1
+41    0x515E    //RX_FDEQ_GAIN_2
+42    0x6470    //RX_FDEQ_GAIN_3
+43    0x7A84    //RX_FDEQ_GAIN_4
+44    0x7C7A    //RX_FDEQ_GAIN_5
+45    0x7C7C    //RX_FDEQ_GAIN_6
+46    0x7D7C    //RX_FDEQ_GAIN_7
+47    0x7E82    //RX_FDEQ_GAIN_8
+48    0x7C80    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -969,8 +9045,8 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
 66    0x0304    //RX_FDEQ_BIN_3
 67    0x0405    //RX_FDEQ_BIN_4
 68    0x0506    //RX_FDEQ_BIN_5
@@ -1029,12 +9105,12 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05B0    //RX_TDDRC_DRC_GAIN
+124    0x055F    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+126    0x1450    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0700    //RX_MAX_G_FP
+129    0x000A    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -1085,18 +9161,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05B0    //RX_TDDRC_DRC_GAIN
+124    0x0521    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x4E62    //RX_FDEQ_GAIN_2
-42    0x6C7A    //RX_FDEQ_GAIN_3
-43    0x8690    //RX_FDEQ_GAIN_4
-44    0x867E    //RX_FDEQ_GAIN_5
-45    0x7E7E    //RX_FDEQ_GAIN_6
-46    0x8080    //RX_FDEQ_GAIN_7
-47    0x8088    //RX_FDEQ_GAIN_8
-48    0x8890    //RX_FDEQ_GAIN_9
+39    0x483A    //RX_FDEQ_GAIN_0
+40    0x3A3A    //RX_FDEQ_GAIN_1
+41    0x4A58    //RX_FDEQ_GAIN_2
+42    0x5E76    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x8E8A    //RX_FDEQ_GAIN_5
+45    0x827C    //RX_FDEQ_GAIN_6
+46    0x7E7E    //RX_FDEQ_GAIN_7
+47    0x868A    //RX_FDEQ_GAIN_8
+48    0x908C    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1112,8 +9188,8 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
 66    0x0304    //RX_FDEQ_BIN_3
 67    0x0405    //RX_FDEQ_BIN_4
 68    0x0506    //RX_FDEQ_BIN_5
@@ -1159,7 +9235,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -1184,18 +9260,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05B0    //RX_TDDRC_DRC_GAIN
+124    0x0550    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x4E62    //RX_FDEQ_GAIN_2
-42    0x6C7A    //RX_FDEQ_GAIN_3
-43    0x8690    //RX_FDEQ_GAIN_4
-44    0x867E    //RX_FDEQ_GAIN_5
-45    0x7E7E    //RX_FDEQ_GAIN_6
-46    0x8080    //RX_FDEQ_GAIN_7
-47    0x8088    //RX_FDEQ_GAIN_8
-48    0x8890    //RX_FDEQ_GAIN_9
+39    0x483A    //RX_FDEQ_GAIN_0
+40    0x3A3A    //RX_FDEQ_GAIN_1
+41    0x4A58    //RX_FDEQ_GAIN_2
+42    0x5E76    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x8E8A    //RX_FDEQ_GAIN_5
+45    0x827C    //RX_FDEQ_GAIN_6
+46    0x7E7E    //RX_FDEQ_GAIN_7
+47    0x868A    //RX_FDEQ_GAIN_8
+48    0x908C    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1211,8 +9287,8 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
 66    0x0304    //RX_FDEQ_BIN_3
 67    0x0405    //RX_FDEQ_BIN_4
 68    0x0506    //RX_FDEQ_BIN_5
@@ -1258,7 +9334,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0012    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -1283,18 +9359,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05B0    //RX_TDDRC_DRC_GAIN
+124    0x0550    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x4E62    //RX_FDEQ_GAIN_2
-42    0x6C7A    //RX_FDEQ_GAIN_3
-43    0x8690    //RX_FDEQ_GAIN_4
-44    0x867E    //RX_FDEQ_GAIN_5
-45    0x7E7E    //RX_FDEQ_GAIN_6
-46    0x8080    //RX_FDEQ_GAIN_7
-47    0x8088    //RX_FDEQ_GAIN_8
-48    0x8890    //RX_FDEQ_GAIN_9
+39    0x483A    //RX_FDEQ_GAIN_0
+40    0x3A3A    //RX_FDEQ_GAIN_1
+41    0x4A58    //RX_FDEQ_GAIN_2
+42    0x5E76    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x8E8A    //RX_FDEQ_GAIN_5
+45    0x827C    //RX_FDEQ_GAIN_6
+46    0x7E7E    //RX_FDEQ_GAIN_7
+47    0x868A    //RX_FDEQ_GAIN_8
+48    0x908C    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1310,8 +9386,8 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
 66    0x0304    //RX_FDEQ_BIN_3
 67    0x0405    //RX_FDEQ_BIN_4
 68    0x0506    //RX_FDEQ_BIN_5
@@ -1357,7 +9433,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x001F    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -1382,18 +9458,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05B0    //RX_TDDRC_DRC_GAIN
+124    0x0550    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x4E62    //RX_FDEQ_GAIN_2
-42    0x6C7A    //RX_FDEQ_GAIN_3
-43    0x8690    //RX_FDEQ_GAIN_4
-44    0x867E    //RX_FDEQ_GAIN_5
-45    0x7E7E    //RX_FDEQ_GAIN_6
-46    0x8080    //RX_FDEQ_GAIN_7
-47    0x8088    //RX_FDEQ_GAIN_8
-48    0x8890    //RX_FDEQ_GAIN_9
+39    0x483A    //RX_FDEQ_GAIN_0
+40    0x3A3A    //RX_FDEQ_GAIN_1
+41    0x4A58    //RX_FDEQ_GAIN_2
+42    0x5E76    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x8E8A    //RX_FDEQ_GAIN_5
+45    0x827C    //RX_FDEQ_GAIN_6
+46    0x7E7E    //RX_FDEQ_GAIN_7
+47    0x868A    //RX_FDEQ_GAIN_8
+48    0x908C    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1409,8 +9485,8 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
 66    0x0304    //RX_FDEQ_BIN_3
 67    0x0405    //RX_FDEQ_BIN_4
 68    0x0506    //RX_FDEQ_BIN_5
@@ -1456,7 +9532,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0032    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -1481,18 +9557,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05B0    //RX_TDDRC_DRC_GAIN
+124    0x0550    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x4E62    //RX_FDEQ_GAIN_2
-42    0x6C7A    //RX_FDEQ_GAIN_3
-43    0x8690    //RX_FDEQ_GAIN_4
-44    0x867E    //RX_FDEQ_GAIN_5
-45    0x7E7E    //RX_FDEQ_GAIN_6
-46    0x8080    //RX_FDEQ_GAIN_7
-47    0x8088    //RX_FDEQ_GAIN_8
-48    0x8890    //RX_FDEQ_GAIN_9
+39    0x483A    //RX_FDEQ_GAIN_0
+40    0x3A3A    //RX_FDEQ_GAIN_1
+41    0x4A58    //RX_FDEQ_GAIN_2
+42    0x5E76    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x8E8A    //RX_FDEQ_GAIN_5
+45    0x827C    //RX_FDEQ_GAIN_6
+46    0x7E7E    //RX_FDEQ_GAIN_7
+47    0x868A    //RX_FDEQ_GAIN_8
+48    0x908C    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1508,8 +9584,8 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
 66    0x0304    //RX_FDEQ_BIN_3
 67    0x0405    //RX_FDEQ_BIN_4
 68    0x0506    //RX_FDEQ_BIN_5
@@ -1555,7 +9631,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
+129    0x0050    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -1580,18 +9656,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05B0    //RX_TDDRC_DRC_GAIN
+124    0x0550    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x4E62    //RX_FDEQ_GAIN_2
-42    0x6C7A    //RX_FDEQ_GAIN_3
-43    0x8690    //RX_FDEQ_GAIN_4
-44    0x867E    //RX_FDEQ_GAIN_5
-45    0x7E7E    //RX_FDEQ_GAIN_6
-46    0x8080    //RX_FDEQ_GAIN_7
-47    0x8088    //RX_FDEQ_GAIN_8
-48    0x8890    //RX_FDEQ_GAIN_9
+39    0x483A    //RX_FDEQ_GAIN_0
+40    0x3A3A    //RX_FDEQ_GAIN_1
+41    0x4A58    //RX_FDEQ_GAIN_2
+42    0x5E76    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x8E8A    //RX_FDEQ_GAIN_5
+45    0x827C    //RX_FDEQ_GAIN_6
+46    0x7E7E    //RX_FDEQ_GAIN_7
+47    0x868A    //RX_FDEQ_GAIN_8
+48    0x908C    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1607,8 +9683,8 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
 66    0x0304    //RX_FDEQ_BIN_3
 67    0x0405    //RX_FDEQ_BIN_4
 68    0x0506    //RX_FDEQ_BIN_5
@@ -1654,7 +9730,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
+129    0x007F    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -1679,18 +9755,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05B0    //RX_TDDRC_DRC_GAIN
+124    0x0550    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x4E62    //RX_FDEQ_GAIN_2
-42    0x6C7A    //RX_FDEQ_GAIN_3
-43    0x8690    //RX_FDEQ_GAIN_4
-44    0x867E    //RX_FDEQ_GAIN_5
-45    0x7E7E    //RX_FDEQ_GAIN_6
-46    0x8080    //RX_FDEQ_GAIN_7
-47    0x8088    //RX_FDEQ_GAIN_8
-48    0x8890    //RX_FDEQ_GAIN_9
+39    0x483A    //RX_FDEQ_GAIN_0
+40    0x3A3A    //RX_FDEQ_GAIN_1
+41    0x4A58    //RX_FDEQ_GAIN_2
+42    0x5E76    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x8E8A    //RX_FDEQ_GAIN_5
+45    0x827C    //RX_FDEQ_GAIN_6
+46    0x8686    //RX_FDEQ_GAIN_7
+47    0x868A    //RX_FDEQ_GAIN_8
+48    0x908C    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1706,8 +9782,8 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
 66    0x0304    //RX_FDEQ_BIN_3
 67    0x0405    //RX_FDEQ_BIN_4
 68    0x0506    //RX_FDEQ_BIN_5
@@ -1755,16 +9831,868 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0600    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0034    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0045    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0074    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-WB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0036    //TX_PATCH_REG
-3    0x2F7A    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+3    0x2F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
 7    0x0001    //TX_SAMPLINGFREQ_PROC
@@ -1781,7 +10709,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
+21    0x009C    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -1802,8 +10730,8 @@
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
 41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
 46    0x0000    //TX_MIC_PAIR_CH_05
@@ -1867,8 +10795,8 @@
 104    0x0000    //TX_MIC_LOC_23
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -1910,7 +10838,7 @@
 147    0x0800    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
+150    0x6000    //TX_EAD_THR
 151    0x2000    //TX_THR_RE_EST
 152    0x0100    //TX_MIN_EQ_RE_EST_0
 153    0x0100    //TX_MIN_EQ_RE_EST_1
@@ -1992,13 +10920,13 @@
 229    0x2000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0120    //TX_EPD_OFFSET_00
+232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
 234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -2011,16 +10939,16 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF700    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x01A0    //TX_DELTA_THR_SN_EST_2
+251    0x01A0    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x5000    //TX_LAMBDA_NN_EST_2
+259    0x5000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
@@ -2042,18 +10970,18 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x4000    //TX_B_POST_FLT_1
 281    0x0018    //TX_NS_LVL_CTRL_0
-282    0x001C    //TX_NS_LVL_CTRL_1
-283    0x0019    //TX_NS_LVL_CTRL_2
-284    0x001C    //TX_NS_LVL_CTRL_3
-285    0x0019    //TX_NS_LVL_CTRL_4
-286    0x001A    //TX_NS_LVL_CTRL_5
-287    0x001E    //TX_NS_LVL_CTRL_6
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x001A    //TX_NS_LVL_CTRL_4
+286    0x001E    //TX_NS_LVL_CTRL_5
+287    0x001C    //TX_NS_LVL_CTRL_6
 288    0x001C    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0018    //TX_MIN_GAIN_S_1
+290    0x0012    //TX_MIN_GAIN_S_1
 291    0x0012    //TX_MIN_GAIN_S_2
 292    0x0012    //TX_MIN_GAIN_S_3
-293    0x0012    //TX_MIN_GAIN_S_4
+293    0x0018    //TX_MIN_GAIN_S_4
 294    0x0018    //TX_MIN_GAIN_S_5
 295    0x0018    //TX_MIN_GAIN_S_6
 296    0x0018    //TX_MIN_GAIN_S_7
@@ -2061,7 +10989,7 @@
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
+301    0x5000    //TX_SNRI_SUP_1
 302    0x4000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
@@ -2075,28 +11003,28 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x7000    //TX_A_POST_FILT_S_0
-315    0x7000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x2000    //TX_A_POST_FILT_S_4
+315    0x3000    //TX_A_POST_FILT_S_1
+316    0x3000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x7000    //TX_A_POST_FILT_S_4
 319    0x7000    //TX_A_POST_FILT_S_5
 320    0x7000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x4000    //TX_B_POST_FILT_1
-324    0x5000    //TX_B_POST_FILT_2
+324    0x4000    //TX_B_POST_FILT_2
 325    0x4000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x4000    //TX_B_POST_FILT_5
-328    0x4000    //TX_B_POST_FILT_6
+328    0x5000    //TX_B_POST_FILT_6
 329    0x4000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
 331    0x6000    //TX_B_LESSCUT_RTO_S_1
 332    0x6000    //TX_B_LESSCUT_RTO_S_2
 333    0x6000    //TX_B_LESSCUT_RTO_S_3
-334    0x6000    //TX_B_LESSCUT_RTO_S_4
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
 335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7C29    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
@@ -2128,11 +11056,11 @@
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
 367    0x000A    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x0139    //TX_NOISE_TH_1
 371    0x0479    //TX_NOISE_TH_2
-372    0x2E90    //TX_NOISE_TH_3
+372    0x2328    //TX_NOISE_TH_3
 373    0x4422    //TX_NOISE_TH_4
 374    0x5586    //TX_NOISE_TH_5
 375    0x4425    //TX_NOISE_TH_5_2
@@ -2140,10 +11068,10 @@
 377    0x4E20    //TX_NOISE_TH_5_4
 378    0x21E8    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
 385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
@@ -2151,15 +11079,15 @@
 388    0x00CE    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0500    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0004    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -2269,21 +11197,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -2312,19 +11240,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
 567    0x5C54    //TX_FDEQ_GAIN_0
@@ -2336,11 +11264,11 @@
 573    0x4B53    //TX_FDEQ_GAIN_6
 574    0x564A    //TX_FDEQ_GAIN_7
 575    0x3D3A    //TX_FDEQ_GAIN_8
-576    0x3B3C    //TX_FDEQ_GAIN_9
-577    0x3C36    //TX_FDEQ_GAIN_10
-578    0x3636    //TX_FDEQ_GAIN_11
-579    0x3D3E    //TX_FDEQ_GAIN_12
-580    0x4548    //TX_FDEQ_GAIN_13
+576    0x3838    //TX_FDEQ_GAIN_9
+577    0x3836    //TX_FDEQ_GAIN_10
+578    0x3633    //TX_FDEQ_GAIN_11
+579    0x3838    //TX_FDEQ_GAIN_12
+580    0x4048    //TX_FDEQ_GAIN_13
 581    0x4848    //TX_FDEQ_GAIN_14
 582    0x4848    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
@@ -2377,15 +11305,15 @@
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
 616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4846    //TX_PREEQ_GAIN_MIC0_0
-618    0x4544    //TX_PREEQ_GAIN_MIC0_1
-619    0x4240    //TX_PREEQ_GAIN_MIC0_2
-620    0x3E3C    //TX_PREEQ_GAIN_MIC0_3
-621    0x3A38    //TX_PREEQ_GAIN_MIC0_4
-622    0x3635    //TX_PREEQ_GAIN_MIC0_5
-623    0x3330    //TX_PREEQ_GAIN_MIC0_6
-624    0x2E2A    //TX_PREEQ_GAIN_MIC0_7
-625    0x2648    //TX_PREEQ_GAIN_MIC0_8
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
 626    0x4848    //TX_PREEQ_GAIN_MIC0_9
 627    0x4848    //TX_PREEQ_GAIN_MIC0_10
 628    0x4848    //TX_PREEQ_GAIN_MIC0_11
@@ -2433,13 +11361,13 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+673    0x484A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5454    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
 680    0x4848    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
@@ -2450,22 +11378,22 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0F10    //TX_PREEQ_BIN_MIC1_10
+701    0x1011    //TX_PREEQ_BIN_MIC1_11
+702    0x1104    //TX_PREEQ_BIN_MIC1_12
+703    0x101B    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
@@ -2536,7 +11464,7 @@
 773    0x0000    //TX_GAIN_LIMIT_0
 774    0x0000    //TX_GAIN_LIMIT_1
 775    0x0006    //TX_GAIN_LIMIT_2
-776    0x0006    //TX_GAIN_LIMIT_3
+776    0x0007    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -2626,7 +11554,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0550    //TX_TDDRC_DRC_GAIN
+866    0x0504    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -2657,8 +11585,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x000A    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7C00    //TX_DTD_THR1_MICMUTE_0
+912    0x5DC0    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0x3FFF    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x002C    //RX_RECVFUNC_MODE_0
+0    0x243C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -2668,7 +11661,7 @@
 7    0x1000    //RX_TDDRC_ALPHA_UP_2
 8    0x1000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0600    //RX_PGA
+10    0x0480    //RX_PGA
 11    0x7FFF    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -2683,7 +11676,7 @@
 22    0x0014    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -2699,17 +11692,17 @@
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4840    //RX_FDEQ_GAIN_0
 40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x807E    //RX_FDEQ_GAIN_5
-45    0x7E80    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x8890    //RX_FDEQ_GAIN_8
-48    0x929C    //RX_FDEQ_GAIN_9
-49    0xA088    //RX_FDEQ_GAIN_10
-50    0x8888    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
+41    0x4659    //RX_FDEQ_GAIN_2
+42    0x6474    //RX_FDEQ_GAIN_3
+43    0x7A82    //RX_FDEQ_GAIN_4
+44    0x8180    //RX_FDEQ_GAIN_5
+45    0x8084    //RX_FDEQ_GAIN_6
+46    0x8A88    //RX_FDEQ_GAIN_7
+47    0x8C8C    //RX_FDEQ_GAIN_8
+48    0x8A95    //RX_FDEQ_GAIN_9
+49    0x978E    //RX_FDEQ_GAIN_10
+50    0x8C8C    //RX_FDEQ_GAIN_11
+51    0x7068    //RX_FDEQ_GAIN_12
 52    0x6050    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -2732,9 +11725,9 @@
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+74    0x0F0E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -2782,12 +11775,12 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04C0    //RX_TDDRC_DRC_GAIN
+124    0x04E6    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+126    0x1450    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0700    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -2838,21 +11831,21 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04C0    //RX_TDDRC_DRC_GAIN
+124    0x0531    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
+39    0x4836    //RX_FDEQ_GAIN_0
+40    0x3636    //RX_FDEQ_GAIN_1
+41    0x3C4A    //RX_FDEQ_GAIN_2
+42    0x5A70    //RX_FDEQ_GAIN_3
 43    0x8490    //RX_FDEQ_GAIN_4
-44    0x807E    //RX_FDEQ_GAIN_5
-45    0x7E80    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x8890    //RX_FDEQ_GAIN_8
-48    0x929C    //RX_FDEQ_GAIN_9
-49    0xA088    //RX_FDEQ_GAIN_10
-50    0x8888    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
+44    0x928B    //RX_FDEQ_GAIN_5
+45    0x8684    //RX_FDEQ_GAIN_6
+46    0x8886    //RX_FDEQ_GAIN_7
+47    0x8A8C    //RX_FDEQ_GAIN_8
+48    0x929E    //RX_FDEQ_GAIN_9
+49    0xB098    //RX_FDEQ_GAIN_10
+50    0x8185    //RX_FDEQ_GAIN_11
+51    0x7868    //RX_FDEQ_GAIN_12
 52    0x6050    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -2875,9 +11868,9 @@
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+74    0x0F0E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -2912,7 +11905,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -2937,21 +11930,21 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04C0    //RX_TDDRC_DRC_GAIN
+124    0x0531    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
+39    0x4836    //RX_FDEQ_GAIN_0
+40    0x3636    //RX_FDEQ_GAIN_1
+41    0x3C4A    //RX_FDEQ_GAIN_2
+42    0x5A70    //RX_FDEQ_GAIN_3
 43    0x8490    //RX_FDEQ_GAIN_4
-44    0x807E    //RX_FDEQ_GAIN_5
-45    0x7E80    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x8890    //RX_FDEQ_GAIN_8
-48    0x929C    //RX_FDEQ_GAIN_9
-49    0xA088    //RX_FDEQ_GAIN_10
-50    0x8888    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
+44    0x928B    //RX_FDEQ_GAIN_5
+45    0x8684    //RX_FDEQ_GAIN_6
+46    0x8886    //RX_FDEQ_GAIN_7
+47    0x8A8C    //RX_FDEQ_GAIN_8
+48    0x929E    //RX_FDEQ_GAIN_9
+49    0xB098    //RX_FDEQ_GAIN_10
+50    0x8185    //RX_FDEQ_GAIN_11
+51    0x7868    //RX_FDEQ_GAIN_12
 52    0x6050    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -2974,9 +11967,9 @@
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+74    0x0F0E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -3011,7 +12004,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0012    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -3036,21 +12029,21 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04C0    //RX_TDDRC_DRC_GAIN
+124    0x0531    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
+39    0x4836    //RX_FDEQ_GAIN_0
+40    0x3636    //RX_FDEQ_GAIN_1
+41    0x3C4A    //RX_FDEQ_GAIN_2
+42    0x5A70    //RX_FDEQ_GAIN_3
 43    0x8490    //RX_FDEQ_GAIN_4
-44    0x807E    //RX_FDEQ_GAIN_5
-45    0x7E80    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x8890    //RX_FDEQ_GAIN_8
-48    0x929C    //RX_FDEQ_GAIN_9
-49    0xA088    //RX_FDEQ_GAIN_10
-50    0x8888    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
+44    0x928B    //RX_FDEQ_GAIN_5
+45    0x8684    //RX_FDEQ_GAIN_6
+46    0x8886    //RX_FDEQ_GAIN_7
+47    0x8A8C    //RX_FDEQ_GAIN_8
+48    0x929E    //RX_FDEQ_GAIN_9
+49    0xB098    //RX_FDEQ_GAIN_10
+50    0x8185    //RX_FDEQ_GAIN_11
+51    0x7868    //RX_FDEQ_GAIN_12
 52    0x6050    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -3073,9 +12066,9 @@
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+74    0x0F0E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -3110,7 +12103,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x001D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -3135,21 +12128,21 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04C0    //RX_TDDRC_DRC_GAIN
+124    0x0531    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
+39    0x4836    //RX_FDEQ_GAIN_0
+40    0x3636    //RX_FDEQ_GAIN_1
+41    0x3C4A    //RX_FDEQ_GAIN_2
+42    0x5A70    //RX_FDEQ_GAIN_3
 43    0x8490    //RX_FDEQ_GAIN_4
-44    0x807E    //RX_FDEQ_GAIN_5
-45    0x7E80    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x8890    //RX_FDEQ_GAIN_8
-48    0x929C    //RX_FDEQ_GAIN_9
-49    0xA088    //RX_FDEQ_GAIN_10
-50    0x8888    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
+44    0x928B    //RX_FDEQ_GAIN_5
+45    0x8684    //RX_FDEQ_GAIN_6
+46    0x8886    //RX_FDEQ_GAIN_7
+47    0x8A8C    //RX_FDEQ_GAIN_8
+48    0x929E    //RX_FDEQ_GAIN_9
+49    0xB098    //RX_FDEQ_GAIN_10
+50    0x8185    //RX_FDEQ_GAIN_11
+51    0x7868    //RX_FDEQ_GAIN_12
 52    0x6050    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -3172,9 +12165,9 @@
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+74    0x0F0E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -3209,7 +12202,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0032    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -3234,21 +12227,21 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04C0    //RX_TDDRC_DRC_GAIN
+124    0x04E6    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x807E    //RX_FDEQ_GAIN_5
-45    0x7E80    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x8890    //RX_FDEQ_GAIN_8
-48    0x929C    //RX_FDEQ_GAIN_9
-49    0xA088    //RX_FDEQ_GAIN_10
-50    0x8888    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
+39    0x4836    //RX_FDEQ_GAIN_0
+40    0x3636    //RX_FDEQ_GAIN_1
+41    0x3C4A    //RX_FDEQ_GAIN_2
+42    0x5A78    //RX_FDEQ_GAIN_3
+43    0x848E    //RX_FDEQ_GAIN_4
+44    0x8886    //RX_FDEQ_GAIN_5
+45    0x8682    //RX_FDEQ_GAIN_6
+46    0x8886    //RX_FDEQ_GAIN_7
+47    0x8A94    //RX_FDEQ_GAIN_8
+48    0x9AA6    //RX_FDEQ_GAIN_9
+49    0xB0A0    //RX_FDEQ_GAIN_10
+50    0x8685    //RX_FDEQ_GAIN_11
+51    0x7868    //RX_FDEQ_GAIN_12
 52    0x6050    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -3271,9 +12264,9 @@
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+74    0x0F0E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -3308,7 +12301,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
+129    0x0050    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -3333,21 +12326,21 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04C0    //RX_TDDRC_DRC_GAIN
+124    0x04E6    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x807E    //RX_FDEQ_GAIN_5
-45    0x7E80    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x8890    //RX_FDEQ_GAIN_8
-48    0x929C    //RX_FDEQ_GAIN_9
-49    0xA088    //RX_FDEQ_GAIN_10
-50    0x8888    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
+39    0x4836    //RX_FDEQ_GAIN_0
+40    0x3636    //RX_FDEQ_GAIN_1
+41    0x3C4A    //RX_FDEQ_GAIN_2
+42    0x5A78    //RX_FDEQ_GAIN_3
+43    0x848E    //RX_FDEQ_GAIN_4
+44    0x8886    //RX_FDEQ_GAIN_5
+45    0x8682    //RX_FDEQ_GAIN_6
+46    0x8886    //RX_FDEQ_GAIN_7
+47    0x8A94    //RX_FDEQ_GAIN_8
+48    0x9AA6    //RX_FDEQ_GAIN_9
+49    0xB0A0    //RX_FDEQ_GAIN_10
+50    0x8685    //RX_FDEQ_GAIN_11
+51    0x7868    //RX_FDEQ_GAIN_12
 52    0x6050    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -3370,9 +12363,9 @@
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+74    0x0F0E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -3407,7 +12400,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
+129    0x007F    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -3432,21 +12425,21 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04C0    //RX_TDDRC_DRC_GAIN
+124    0x04E6    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x807E    //RX_FDEQ_GAIN_5
-45    0x7E80    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x8890    //RX_FDEQ_GAIN_8
-48    0x929C    //RX_FDEQ_GAIN_9
-49    0xA088    //RX_FDEQ_GAIN_10
-50    0x8888    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
+39    0x4836    //RX_FDEQ_GAIN_0
+40    0x3636    //RX_FDEQ_GAIN_1
+41    0x3C4A    //RX_FDEQ_GAIN_2
+42    0x5A78    //RX_FDEQ_GAIN_3
+43    0x848E    //RX_FDEQ_GAIN_4
+44    0x8886    //RX_FDEQ_GAIN_5
+45    0x8682    //RX_FDEQ_GAIN_6
+46    0x8886    //RX_FDEQ_GAIN_7
+47    0x8A94    //RX_FDEQ_GAIN_8
+48    0x9AA6    //RX_FDEQ_GAIN_9
+49    0xB0A0    //RX_FDEQ_GAIN_10
+50    0x8685    //RX_FDEQ_GAIN_11
+51    0x7868    //RX_FDEQ_GAIN_12
 52    0x6050    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -3469,9 +12462,9 @@
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+74    0x0F0E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -3508,16 +12501,868 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0600    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x1000    //RX_LMT_THRD
+194    0x7FDF    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001E    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0031    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0050    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0086    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-SWB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
-2    0x0026    //TX_PATCH_REG
-3    0x6F7A    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
 7    0x0003    //TX_SAMPLINGFREQ_PROC
@@ -3534,7 +13379,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
+21    0x009C    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -3555,8 +13400,8 @@
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
 41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
 46    0x0000    //TX_MIC_PAIR_CH_05
@@ -3621,7 +13466,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -3745,13 +13590,13 @@
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0240    //TX_EPD_OFFSET_00
+232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
 234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -3764,12 +13609,12 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF700    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -3795,18 +13640,18 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x0016    //TX_NS_LVL_CTRL_1
+282    0x002C    //TX_NS_LVL_CTRL_1
 283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0018    //TX_NS_LVL_CTRL_4
-286    0x0016    //TX_NS_LVL_CTRL_5
-287    0x0012    //TX_NS_LVL_CTRL_6
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
 288    0x0017    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0012    //TX_MIN_GAIN_S_1
-291    0x0007    //TX_MIN_GAIN_S_2
-292    0x0012    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
 294    0x0012    //TX_MIN_GAIN_S_5
 295    0x0012    //TX_MIN_GAIN_S_6
 296    0x0012    //TX_MIN_GAIN_S_7
@@ -3814,12 +13659,12 @@
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
-302    0x6000    //TX_SNRI_SUP_2
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
 303    0x6000    //TX_SNRI_SUP_3
 304    0x6000    //TX_SNRI_SUP_4
 305    0x6000    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
+306    0x3000    //TX_SNRI_SUP_6
 307    0x6000    //TX_SNRI_SUP_7
 308    0x6000    //TX_THR_LFNS
 309    0x0017    //TX_G_LFNS
@@ -3828,29 +13673,29 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
+315    0x4000    //TX_A_POST_FILT_S_1
 316    0x4000    //TX_A_POST_FILT_S_2
 317    0x4000    //TX_A_POST_FILT_S_3
 318    0x4000    //TX_A_POST_FILT_S_4
 319    0x4000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
+320    0x5000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x3000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x5000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x6000    //TX_B_POST_FILT_6
+323    0x5000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
 329    0x3000    //TX_B_POST_FILT_7
 330    0x1000    //TX_B_LESSCUT_RTO_S_0
-331    0x6000    //TX_B_LESSCUT_RTO_S_1
-332    0x6000    //TX_B_LESSCUT_RTO_S_2
-333    0x6000    //TX_B_LESSCUT_RTO_S_3
-334    0x6000    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
 338    0x7E14    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
 340    0x7C29    //TX_LAMBDA_PFILT_S_1
@@ -3881,22 +13726,22 @@
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
 367    0x000A    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
-370    0x00C6    //TX_NOISE_TH_1
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x01F4    //TX_NOISE_TH_1
 371    0x0DAC    //TX_NOISE_TH_2
-372    0x2EE0    //TX_NOISE_TH_3
-373    0x47E0    //TX_NOISE_TH_4
+372    0x2134    //TX_NOISE_TH_3
+373    0x6978    //TX_NOISE_TH_4
 374    0x57E4    //TX_NOISE_TH_5
 375    0x4BD6    //TX_NOISE_TH_5_2
 376    0x0001    //TX_NOISE_TH_5_3
 377    0x4E20    //TX_NOISE_TH_5_4
-378    0x39DF    //TX_NOISE_TH_6
+378    0x1194    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
 385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
@@ -3904,15 +13749,15 @@
 388    0x0200    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0004    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -3923,7 +13768,7 @@
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x2900    //TX_MIN_G_CTRL_SSNS
 409    0x0800    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
+410    0x07D0    //TX_NS_FP_K_METAL
 411    0x3A98    //TX_NOISEDET_BOOST_TH
 412    0x0FA0    //TX_NSMOOTH_TH
 413    0x0000    //TX_NS_RESRV_8
@@ -3953,8 +13798,8 @@
 437    0x0032    //TX_SILENCE_T
 438    0x0000    //TX_A_POST_FLT_WTA
 439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x051E    //TX_SB_RHO_MEAN2_TH
-441    0x02F0    //TX_SB_RHO_MEAN3_TH
+440    0x03E8    //TX_SB_RHO_MEAN2_TH
+441    0x03E8    //TX_SB_RHO_MEAN3_TH
 442    0x0000    //TX_HS_RESRV_4
 443    0x0000    //TX_HS_RESRV_5
 444    0x0001    //TX_DOA_VAD_THR_1
@@ -4022,21 +13867,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -4065,38 +13910,38 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
 567    0x5C54    //TX_FDEQ_GAIN_0
 568    0x5048    //TX_FDEQ_GAIN_1
 569    0x4C4C    //TX_FDEQ_GAIN_2
-570    0x474A    //TX_FDEQ_GAIN_3
-571    0x3F3F    //TX_FDEQ_GAIN_4
-572    0x4245    //TX_FDEQ_GAIN_5
-573    0x4B53    //TX_FDEQ_GAIN_6
-574    0x5F3E    //TX_FDEQ_GAIN_7
-575    0x303A    //TX_FDEQ_GAIN_8
-576    0x3B3C    //TX_FDEQ_GAIN_9
-577    0x3C3E    //TX_FDEQ_GAIN_10
-578    0x4141    //TX_FDEQ_GAIN_11
-579    0x3D3E    //TX_FDEQ_GAIN_12
-580    0x4548    //TX_FDEQ_GAIN_13
-581    0x4F56    //TX_FDEQ_GAIN_14
-582    0x6548    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
+570    0x494D    //TX_FDEQ_GAIN_3
+571    0x4442    //TX_FDEQ_GAIN_4
+572    0x4448    //TX_FDEQ_GAIN_5
+573    0x4C53    //TX_FDEQ_GAIN_6
+574    0x6244    //TX_FDEQ_GAIN_7
+575    0x4348    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x484A    //TX_FDEQ_GAIN_11
+579    0x4840    //TX_FDEQ_GAIN_12
+580    0x4040    //TX_FDEQ_GAIN_13
+581    0x485C    //TX_FDEQ_GAIN_14
+582    0x707E    //TX_FDEQ_GAIN_15
+583    0x5D48    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
 586    0x4848    //TX_FDEQ_GAIN_19
@@ -4130,19 +13975,19 @@
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
 616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4846    //TX_PREEQ_GAIN_MIC0_0
-618    0x4544    //TX_PREEQ_GAIN_MIC0_1
-619    0x4240    //TX_PREEQ_GAIN_MIC0_2
-620    0x3E3C    //TX_PREEQ_GAIN_MIC0_3
-621    0x3A38    //TX_PREEQ_GAIN_MIC0_4
-622    0x3635    //TX_PREEQ_GAIN_MIC0_5
-623    0x3330    //TX_PREEQ_GAIN_MIC0_6
-624    0x2E2A    //TX_PREEQ_GAIN_MIC0_7
-625    0x2625    //TX_PREEQ_GAIN_MIC0_8
-626    0x2421    //TX_PREEQ_GAIN_MIC0_9
-627    0x1D19    //TX_PREEQ_GAIN_MIC0_10
-628    0x1820    //TX_PREEQ_GAIN_MIC0_11
-629    0x2830    //TX_PREEQ_GAIN_MIC0_12
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
 630    0x4848    //TX_PREEQ_GAIN_MIC0_13
 631    0x4848    //TX_PREEQ_GAIN_MIC0_14
 632    0x4848    //TX_PREEQ_GAIN_MIC0_15
@@ -4186,16 +14031,16 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
 685    0x4848    //TX_PREEQ_GAIN_MIC1_19
@@ -4203,23 +14048,23 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
 696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -4410,8 +14255,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x03E8    //TX_MICMUTE_RATIO_THR
+900    0x01A4    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7F00    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0x3FFF    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x002C    //RX_RECVFUNC_MODE_0
+0    0x243C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -4421,7 +14331,7 @@
 7    0x1000    //RX_TDDRC_ALPHA_UP_2
 8    0x1000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0600    //RX_PGA
+10    0x05AA    //RX_PGA
 11    0x7FFF    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x5800    //RX_THR_PITCH_DET_0
@@ -4436,7 +14346,7 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -4450,22 +14360,22 @@
 36    0x0000    //RX_LMT_THRD
 37    0x4000    //RX_LMT_ALPHA
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x8484    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x9094    //RX_FDEQ_GAIN_7
-47    0x98A4    //RX_FDEQ_GAIN_8
-48    0xA4AC    //RX_FDEQ_GAIN_9
-49    0xAC98    //RX_FDEQ_GAIN_10
-50    0x9088    //RX_FDEQ_GAIN_11
-51    0x746C    //RX_FDEQ_GAIN_12
-52    0x7050    //RX_FDEQ_GAIN_13
-53    0x7080    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x5064    //RX_FDEQ_GAIN_3
+43    0x7076    //RX_FDEQ_GAIN_4
+44    0x897A    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8888    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x96A4    //RX_FDEQ_GAIN_9
+49    0xA9A0    //RX_FDEQ_GAIN_10
+50    0x9487    //RX_FDEQ_GAIN_11
+51    0x6F64    //RX_FDEQ_GAIN_12
+52    0x625A    //RX_FDEQ_GAIN_13
+53    0x5D80    //RX_FDEQ_GAIN_14
+54    0x8890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -4476,19 +14386,19 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x1013    //RX_FDEQ_BIN_10
 74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -4527,20 +14437,20 @@
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x0551    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+126    0x1450    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0850    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -4583,31 +14493,31 @@
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x0504    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x8484    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x9094    //RX_FDEQ_GAIN_7
-47    0x98A4    //RX_FDEQ_GAIN_8
-48    0xA4AC    //RX_FDEQ_GAIN_9
-49    0xAC98    //RX_FDEQ_GAIN_10
-50    0x9088    //RX_FDEQ_GAIN_11
-51    0x746C    //RX_FDEQ_GAIN_12
-52    0x7050    //RX_FDEQ_GAIN_13
-53    0x7080    //RX_FDEQ_GAIN_14
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x869A    //RX_FDEQ_GAIN_4
+44    0x9A9E    //RX_FDEQ_GAIN_5
+45    0x8C90    //RX_FDEQ_GAIN_6
+46    0x9490    //RX_FDEQ_GAIN_7
+47    0x9EA6    //RX_FDEQ_GAIN_8
+48    0xA0B0    //RX_FDEQ_GAIN_9
+49    0xC2A6    //RX_FDEQ_GAIN_10
+50    0x8E8D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x4884    //RX_FDEQ_GAIN_14
 54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -4619,20 +14529,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x140D    //RX_FDEQ_BIN_10
+74    0x042D    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1419    //RX_FDEQ_BIN_13
+77    0x2332    //RX_FDEQ_BIN_14
+78    0x372C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -4682,31 +14592,31 @@
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x0504    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x8484    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x9094    //RX_FDEQ_GAIN_7
-47    0x98A4    //RX_FDEQ_GAIN_8
-48    0xA4AC    //RX_FDEQ_GAIN_9
-49    0xAC98    //RX_FDEQ_GAIN_10
-50    0x9088    //RX_FDEQ_GAIN_11
-51    0x746C    //RX_FDEQ_GAIN_12
-52    0x7050    //RX_FDEQ_GAIN_13
-53    0x7080    //RX_FDEQ_GAIN_14
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x869A    //RX_FDEQ_GAIN_4
+44    0x9A9E    //RX_FDEQ_GAIN_5
+45    0x8C90    //RX_FDEQ_GAIN_6
+46    0x9490    //RX_FDEQ_GAIN_7
+47    0x9EA6    //RX_FDEQ_GAIN_8
+48    0xA0B0    //RX_FDEQ_GAIN_9
+49    0xC2A6    //RX_FDEQ_GAIN_10
+50    0x8E8D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x4884    //RX_FDEQ_GAIN_14
 54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -4718,20 +14628,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x140D    //RX_FDEQ_BIN_10
+74    0x042D    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1419    //RX_FDEQ_BIN_13
+77    0x2332    //RX_FDEQ_BIN_14
+78    0x372C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -4781,31 +14691,31 @@
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x0504    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x8484    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x9094    //RX_FDEQ_GAIN_7
-47    0x98A4    //RX_FDEQ_GAIN_8
-48    0xA4AC    //RX_FDEQ_GAIN_9
-49    0xAC98    //RX_FDEQ_GAIN_10
-50    0x9088    //RX_FDEQ_GAIN_11
-51    0x746C    //RX_FDEQ_GAIN_12
-52    0x7050    //RX_FDEQ_GAIN_13
-53    0x7080    //RX_FDEQ_GAIN_14
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x869A    //RX_FDEQ_GAIN_4
+44    0x9A9E    //RX_FDEQ_GAIN_5
+45    0x8C90    //RX_FDEQ_GAIN_6
+46    0x9490    //RX_FDEQ_GAIN_7
+47    0x9EA6    //RX_FDEQ_GAIN_8
+48    0xA0B0    //RX_FDEQ_GAIN_9
+49    0xC2A6    //RX_FDEQ_GAIN_10
+50    0x8E8D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x4884    //RX_FDEQ_GAIN_14
 54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -4817,20 +14727,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x140D    //RX_FDEQ_BIN_10
+74    0x042D    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1419    //RX_FDEQ_BIN_13
+77    0x2332    //RX_FDEQ_BIN_14
+78    0x372C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -4863,7 +14773,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0022    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -4880,31 +14790,31 @@
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x0504    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x8484    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x9094    //RX_FDEQ_GAIN_7
-47    0x98A4    //RX_FDEQ_GAIN_8
-48    0xA4AC    //RX_FDEQ_GAIN_9
-49    0xAC98    //RX_FDEQ_GAIN_10
-50    0x9088    //RX_FDEQ_GAIN_11
-51    0x746C    //RX_FDEQ_GAIN_12
-52    0x7050    //RX_FDEQ_GAIN_13
-53    0x7080    //RX_FDEQ_GAIN_14
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x869A    //RX_FDEQ_GAIN_4
+44    0x9A9E    //RX_FDEQ_GAIN_5
+45    0x8C90    //RX_FDEQ_GAIN_6
+46    0x9490    //RX_FDEQ_GAIN_7
+47    0x9EA6    //RX_FDEQ_GAIN_8
+48    0xA0B0    //RX_FDEQ_GAIN_9
+49    0xC2A6    //RX_FDEQ_GAIN_10
+50    0x8E8D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x4884    //RX_FDEQ_GAIN_14
 54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -4916,20 +14826,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x140D    //RX_FDEQ_BIN_10
+74    0x042D    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1419    //RX_FDEQ_BIN_13
+77    0x2332    //RX_FDEQ_BIN_14
+78    0x372C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -4962,7 +14872,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0038    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -4979,31 +14889,31 @@
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x04A0    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x8484    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x9094    //RX_FDEQ_GAIN_7
-47    0x98A4    //RX_FDEQ_GAIN_8
-48    0xA4AC    //RX_FDEQ_GAIN_9
-49    0xAC98    //RX_FDEQ_GAIN_10
-50    0x9088    //RX_FDEQ_GAIN_11
-51    0x746C    //RX_FDEQ_GAIN_12
-52    0x7050    //RX_FDEQ_GAIN_13
-53    0x7080    //RX_FDEQ_GAIN_14
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x484C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x869A    //RX_FDEQ_GAIN_4
+44    0x9A98    //RX_FDEQ_GAIN_5
+45    0x8C90    //RX_FDEQ_GAIN_6
+46    0x948C    //RX_FDEQ_GAIN_7
+47    0x9EA6    //RX_FDEQ_GAIN_8
+48    0xA0B0    //RX_FDEQ_GAIN_9
+49    0xC2AE    //RX_FDEQ_GAIN_10
+50    0x9797    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x4884    //RX_FDEQ_GAIN_14
 54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -5015,20 +14925,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x140D    //RX_FDEQ_BIN_10
+74    0x0A2D    //RX_FDEQ_BIN_11
+75    0x180F    //RX_FDEQ_BIN_12
+76    0x1419    //RX_FDEQ_BIN_13
+77    0x2332    //RX_FDEQ_BIN_14
+78    0x372C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -5061,7 +14971,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
+129    0x0055    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -5078,31 +14988,31 @@
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x04A0    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x8484    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x9094    //RX_FDEQ_GAIN_7
-47    0x98A4    //RX_FDEQ_GAIN_8
-48    0xA4AC    //RX_FDEQ_GAIN_9
-49    0xAC98    //RX_FDEQ_GAIN_10
-50    0x9088    //RX_FDEQ_GAIN_11
-51    0x746C    //RX_FDEQ_GAIN_12
-52    0x7050    //RX_FDEQ_GAIN_13
-53    0x7080    //RX_FDEQ_GAIN_14
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x484C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x869A    //RX_FDEQ_GAIN_4
+44    0x9A98    //RX_FDEQ_GAIN_5
+45    0x8C90    //RX_FDEQ_GAIN_6
+46    0x948C    //RX_FDEQ_GAIN_7
+47    0x9EA6    //RX_FDEQ_GAIN_8
+48    0xA0B0    //RX_FDEQ_GAIN_9
+49    0xC2AE    //RX_FDEQ_GAIN_10
+50    0x9797    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x4884    //RX_FDEQ_GAIN_14
 54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -5114,20 +15024,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x140D    //RX_FDEQ_BIN_10
+74    0x0A2D    //RX_FDEQ_BIN_11
+75    0x180F    //RX_FDEQ_BIN_12
+76    0x1419    //RX_FDEQ_BIN_13
+77    0x2332    //RX_FDEQ_BIN_14
+78    0x372C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -5160,7 +15070,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
+129    0x0089    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -5177,31 +15087,31 @@
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x04A0    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x8484    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x9094    //RX_FDEQ_GAIN_7
-47    0x98A4    //RX_FDEQ_GAIN_8
-48    0xA4AC    //RX_FDEQ_GAIN_9
-49    0xAC98    //RX_FDEQ_GAIN_10
-50    0x9088    //RX_FDEQ_GAIN_11
-51    0x746C    //RX_FDEQ_GAIN_12
-52    0x7050    //RX_FDEQ_GAIN_13
-53    0x7080    //RX_FDEQ_GAIN_14
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x484C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x869A    //RX_FDEQ_GAIN_4
+44    0x9A98    //RX_FDEQ_GAIN_5
+45    0x8C90    //RX_FDEQ_GAIN_6
+46    0x948C    //RX_FDEQ_GAIN_7
+47    0x9EA6    //RX_FDEQ_GAIN_8
+48    0xA0B0    //RX_FDEQ_GAIN_9
+49    0xC2AE    //RX_FDEQ_GAIN_10
+50    0x9797    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x4884    //RX_FDEQ_GAIN_14
 54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -5213,20 +15123,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x140D    //RX_FDEQ_BIN_10
+74    0x0A2D    //RX_FDEQ_BIN_11
+75    0x180F    //RX_FDEQ_BIN_12
+76    0x1419    //RX_FDEQ_BIN_13
+77    0x2332    //RX_FDEQ_BIN_14
+78    0x372C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -5261,15 +15171,867 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x05AA    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0032    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0047    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0076    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-FB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0026    //TX_PATCH_REG
-3    0x6B7A    //TX_SENDFUNC_MODE_0
+3    0x6B7E    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0004    //TX_SAMPLINGFREQ_SIG
@@ -5287,7 +16049,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
+21    0x009C    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -5308,8 +16070,8 @@
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
 41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
 46    0x0000    //TX_MIC_PAIR_CH_05
@@ -5374,7 +16136,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -5498,13 +16260,13 @@
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0360    //TX_EPD_OFFSET_00
+232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
 234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -5517,12 +16279,12 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF700    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -5550,16 +16312,16 @@
 281    0x0014    //TX_NS_LVL_CTRL_0
 282    0x0016    //TX_NS_LVL_CTRL_1
 283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0018    //TX_NS_LVL_CTRL_4
-286    0x0016    //TX_NS_LVL_CTRL_5
-287    0x0012    //TX_NS_LVL_CTRL_6
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
 288    0x0017    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0012    //TX_MIN_GAIN_S_1
-291    0x0007    //TX_MIN_GAIN_S_2
-292    0x0012    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
+290    0x0007    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
 294    0x0012    //TX_MIN_GAIN_S_5
 295    0x0012    //TX_MIN_GAIN_S_6
 296    0x0012    //TX_MIN_GAIN_S_7
@@ -5581,29 +16343,29 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
+315    0x4000    //TX_A_POST_FILT_S_1
 316    0x4000    //TX_A_POST_FILT_S_2
 317    0x4000    //TX_A_POST_FILT_S_3
 318    0x4000    //TX_A_POST_FILT_S_4
 319    0x4000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
+320    0x5000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x2000    //TX_B_POST_FILT_1
-324    0x3000    //TX_B_POST_FILT_2
+324    0x2000    //TX_B_POST_FILT_2
 325    0x2000    //TX_B_POST_FILT_3
-326    0x5000    //TX_B_POST_FILT_4
+326    0x2000    //TX_B_POST_FILT_4
 327    0x2000    //TX_B_POST_FILT_5
-328    0x6000    //TX_B_POST_FILT_6
+328    0x3000    //TX_B_POST_FILT_6
 329    0x3000    //TX_B_POST_FILT_7
 330    0x1000    //TX_B_LESSCUT_RTO_S_0
-331    0x6000    //TX_B_LESSCUT_RTO_S_1
-332    0x6000    //TX_B_LESSCUT_RTO_S_2
-333    0x6000    //TX_B_LESSCUT_RTO_S_3
-334    0x6000    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
 338    0x7E14    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
 340    0x7C29    //TX_LAMBDA_PFILT_S_1
@@ -5646,10 +16408,10 @@
 377    0x4E20    //TX_NOISE_TH_5_4
 378    0x39DF    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
 384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
 385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
@@ -5657,15 +16419,15 @@
 388    0x0200    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0004    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -5780,16 +16542,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x7FFF    //TX_GSC_RTOL_TH
+522    0x7FFF    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -5818,38 +16580,38 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4854    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x5454    //TX_FDEQ_GAIN_5
-573    0x5454    //TX_FDEQ_GAIN_6
-574    0x6048    //TX_FDEQ_GAIN_7
-575    0x5454    //TX_FDEQ_GAIN_8
-576    0x6464    //TX_FDEQ_GAIN_9
-577    0x6464    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x9898    //TX_FDEQ_GAIN_12
-580    0x9898    //TX_FDEQ_GAIN_13
-581    0x9898    //TX_FDEQ_GAIN_14
-582    0x9898    //TX_FDEQ_GAIN_15
-583    0x9898    //TX_FDEQ_GAIN_16
+567    0x4C4A    //TX_FDEQ_GAIN_0
+568    0x4B4F    //TX_FDEQ_GAIN_1
+569    0x504B    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4A49    //TX_FDEQ_GAIN_4
+572    0x4F48    //TX_FDEQ_GAIN_5
+573    0x4A4E    //TX_FDEQ_GAIN_6
+574    0x534E    //TX_FDEQ_GAIN_7
+575    0x494F    //TX_FDEQ_GAIN_8
+576    0x5E6E    //TX_FDEQ_GAIN_9
+577    0x787A    //TX_FDEQ_GAIN_10
+578    0x6A58    //TX_FDEQ_GAIN_11
+579    0x5051    //TX_FDEQ_GAIN_12
+580    0x5156    //TX_FDEQ_GAIN_13
+581    0x6168    //TX_FDEQ_GAIN_14
+582    0x7678    //TX_FDEQ_GAIN_15
+583    0x7A87    //TX_FDEQ_GAIN_16
 584    0x9898    //TX_FDEQ_GAIN_17
 585    0x9898    //TX_FDEQ_GAIN_18
 586    0x9848    //TX_FDEQ_GAIN_19
@@ -5883,19 +16645,19 @@
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
 616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4846    //TX_PREEQ_GAIN_MIC0_0
-618    0x4544    //TX_PREEQ_GAIN_MIC0_1
-619    0x4240    //TX_PREEQ_GAIN_MIC0_2
-620    0x3E3C    //TX_PREEQ_GAIN_MIC0_3
-621    0x3A38    //TX_PREEQ_GAIN_MIC0_4
-622    0x3635    //TX_PREEQ_GAIN_MIC0_5
-623    0x3330    //TX_PREEQ_GAIN_MIC0_6
-624    0x2E2A    //TX_PREEQ_GAIN_MIC0_7
-625    0x2625    //TX_PREEQ_GAIN_MIC0_8
-626    0x2421    //TX_PREEQ_GAIN_MIC0_9
-627    0x1D19    //TX_PREEQ_GAIN_MIC0_10
-628    0x1820    //TX_PREEQ_GAIN_MIC0_11
-629    0x2830    //TX_PREEQ_GAIN_MIC0_12
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
 630    0x4848    //TX_PREEQ_GAIN_MIC0_13
 631    0x4848    //TX_PREEQ_GAIN_MIC0_14
 632    0x4848    //TX_PREEQ_GAIN_MIC0_15
@@ -5938,15 +16700,15 @@
 669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+672    0x4A4C    //TX_PREEQ_GAIN_MIC1_6
+673    0x4E50    //TX_PREEQ_GAIN_MIC1_7
+674    0x5456    //TX_PREEQ_GAIN_MIC1_8
+675    0x585C    //TX_PREEQ_GAIN_MIC1_9
+676    0x5C64    //TX_PREEQ_GAIN_MIC1_10
+677    0x7478    //TX_PREEQ_GAIN_MIC1_11
+678    0x705C    //TX_PREEQ_GAIN_MIC1_12
+679    0x4838    //TX_PREEQ_GAIN_MIC1_13
+680    0x3C70    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
@@ -5956,22 +16718,22 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x1414    //TX_PREEQ_BIN_MIC1_12
+703    0x1C1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x462C    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
@@ -6132,7 +16894,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x03A0    //TX_TDDRC_DRC_GAIN
+866    0x0504    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -6163,8 +16925,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x001C    //RX_RECVFUNC_MODE_0
+0    0x202C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0004    //RX_SAMPLINGFREQ_SIG
 3    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -6174,7 +17001,7 @@
 7    0x1000    //RX_TDDRC_ALPHA_UP_2
 8    0x1000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x064E    //RX_PGA
+10    0x0722    //RX_PGA
 11    0x7FFF    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x5800    //RX_THR_PITCH_DET_0
@@ -6189,7 +17016,7 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -6203,22 +17030,22 @@
 36    0x0000    //RX_LMT_THRD
 37    0x4000    //RX_LMT_ALPHA
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8549    //RX_FDEQ_GAIN_0
-40    0x494A    //RX_FDEQ_GAIN_1
-41    0x6168    //RX_FDEQ_GAIN_2
-42    0x686E    //RX_FDEQ_GAIN_3
-43    0x746E    //RX_FDEQ_GAIN_4
-44    0x6E62    //RX_FDEQ_GAIN_5
-45    0x686C    //RX_FDEQ_GAIN_6
-46    0x6E82    //RX_FDEQ_GAIN_7
-47    0x8086    //RX_FDEQ_GAIN_8
-48    0x9092    //RX_FDEQ_GAIN_9
-49    0x9C98    //RX_FDEQ_GAIN_10
-50    0x8486    //RX_FDEQ_GAIN_11
-51    0x6858    //RX_FDEQ_GAIN_12
-52    0x5048    //RX_FDEQ_GAIN_13
-53    0x3428    //RX_FDEQ_GAIN_14
-54    0x5484    //RX_FDEQ_GAIN_15
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -6288,12 +17115,12 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+126    0x1964    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x000D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -6344,24 +17171,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8549    //RX_FDEQ_GAIN_0
-40    0x494A    //RX_FDEQ_GAIN_1
-41    0x6168    //RX_FDEQ_GAIN_2
-42    0x686E    //RX_FDEQ_GAIN_3
-43    0x746E    //RX_FDEQ_GAIN_4
-44    0x6E62    //RX_FDEQ_GAIN_5
-45    0x686C    //RX_FDEQ_GAIN_6
-46    0x6E82    //RX_FDEQ_GAIN_7
-47    0x8086    //RX_FDEQ_GAIN_8
-48    0x9092    //RX_FDEQ_GAIN_9
-49    0x9C98    //RX_FDEQ_GAIN_10
-50    0x8486    //RX_FDEQ_GAIN_11
-51    0x6858    //RX_FDEQ_GAIN_12
-52    0x5048    //RX_FDEQ_GAIN_13
-53    0x3428    //RX_FDEQ_GAIN_14
-54    0x5484    //RX_FDEQ_GAIN_15
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -6418,7 +17245,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
+129    0x000D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -6443,24 +17270,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8549    //RX_FDEQ_GAIN_0
-40    0x494A    //RX_FDEQ_GAIN_1
-41    0x6168    //RX_FDEQ_GAIN_2
-42    0x686E    //RX_FDEQ_GAIN_3
-43    0x746E    //RX_FDEQ_GAIN_4
-44    0x6E62    //RX_FDEQ_GAIN_5
-45    0x686C    //RX_FDEQ_GAIN_6
-46    0x6E82    //RX_FDEQ_GAIN_7
-47    0x8086    //RX_FDEQ_GAIN_8
-48    0x9092    //RX_FDEQ_GAIN_9
-49    0x9C98    //RX_FDEQ_GAIN_10
-50    0x8486    //RX_FDEQ_GAIN_11
-51    0x6858    //RX_FDEQ_GAIN_12
-52    0x5048    //RX_FDEQ_GAIN_13
-53    0x3428    //RX_FDEQ_GAIN_14
-54    0x5484    //RX_FDEQ_GAIN_15
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -6517,7 +17344,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0016    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -6542,24 +17369,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8549    //RX_FDEQ_GAIN_0
-40    0x494A    //RX_FDEQ_GAIN_1
-41    0x6168    //RX_FDEQ_GAIN_2
-42    0x686E    //RX_FDEQ_GAIN_3
-43    0x746E    //RX_FDEQ_GAIN_4
-44    0x6E62    //RX_FDEQ_GAIN_5
-45    0x686C    //RX_FDEQ_GAIN_6
-46    0x6E82    //RX_FDEQ_GAIN_7
-47    0x8086    //RX_FDEQ_GAIN_8
-48    0x9092    //RX_FDEQ_GAIN_9
-49    0x9C98    //RX_FDEQ_GAIN_10
-50    0x8486    //RX_FDEQ_GAIN_11
-51    0x6858    //RX_FDEQ_GAIN_12
-52    0x5048    //RX_FDEQ_GAIN_13
-53    0x3428    //RX_FDEQ_GAIN_14
-54    0x5484    //RX_FDEQ_GAIN_15
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -6616,7 +17443,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0024    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -6641,24 +17468,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8549    //RX_FDEQ_GAIN_0
-40    0x494A    //RX_FDEQ_GAIN_1
-41    0x6168    //RX_FDEQ_GAIN_2
-42    0x686E    //RX_FDEQ_GAIN_3
-43    0x746E    //RX_FDEQ_GAIN_4
-44    0x6E62    //RX_FDEQ_GAIN_5
-45    0x686C    //RX_FDEQ_GAIN_6
-46    0x6E82    //RX_FDEQ_GAIN_7
-47    0x8086    //RX_FDEQ_GAIN_8
-48    0x9092    //RX_FDEQ_GAIN_9
-49    0x9C98    //RX_FDEQ_GAIN_10
-50    0x8486    //RX_FDEQ_GAIN_11
-51    0x6858    //RX_FDEQ_GAIN_12
-52    0x5048    //RX_FDEQ_GAIN_13
-53    0x3428    //RX_FDEQ_GAIN_14
-54    0x5484    //RX_FDEQ_GAIN_15
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -6715,7 +17542,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x003A    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -6740,24 +17567,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8549    //RX_FDEQ_GAIN_0
-40    0x494A    //RX_FDEQ_GAIN_1
-41    0x6168    //RX_FDEQ_GAIN_2
-42    0x686E    //RX_FDEQ_GAIN_3
-43    0x746E    //RX_FDEQ_GAIN_4
-44    0x6E62    //RX_FDEQ_GAIN_5
-45    0x686C    //RX_FDEQ_GAIN_6
-46    0x6E82    //RX_FDEQ_GAIN_7
-47    0x8086    //RX_FDEQ_GAIN_8
-48    0x9092    //RX_FDEQ_GAIN_9
-49    0x9C98    //RX_FDEQ_GAIN_10
-50    0x8486    //RX_FDEQ_GAIN_11
-51    0x6858    //RX_FDEQ_GAIN_12
-52    0x5048    //RX_FDEQ_GAIN_13
-53    0x3428    //RX_FDEQ_GAIN_14
-54    0x5484    //RX_FDEQ_GAIN_15
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -6814,7 +17641,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
+129    0x0059    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -6839,24 +17666,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8549    //RX_FDEQ_GAIN_0
-40    0x494A    //RX_FDEQ_GAIN_1
-41    0x6168    //RX_FDEQ_GAIN_2
-42    0x686E    //RX_FDEQ_GAIN_3
-43    0x746E    //RX_FDEQ_GAIN_4
-44    0x6E62    //RX_FDEQ_GAIN_5
-45    0x686C    //RX_FDEQ_GAIN_6
-46    0x6E82    //RX_FDEQ_GAIN_7
-47    0x8086    //RX_FDEQ_GAIN_8
-48    0x9092    //RX_FDEQ_GAIN_9
-49    0x9C98    //RX_FDEQ_GAIN_10
-50    0x8486    //RX_FDEQ_GAIN_11
-51    0x6858    //RX_FDEQ_GAIN_12
-52    0x5048    //RX_FDEQ_GAIN_13
-53    0x3428    //RX_FDEQ_GAIN_14
-54    0x5484    //RX_FDEQ_GAIN_15
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -6913,7 +17740,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
+129    0x0090    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -6938,24 +17765,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8549    //RX_FDEQ_GAIN_0
-40    0x494A    //RX_FDEQ_GAIN_1
-41    0x6168    //RX_FDEQ_GAIN_2
-42    0x686E    //RX_FDEQ_GAIN_3
-43    0x746E    //RX_FDEQ_GAIN_4
-44    0x6E62    //RX_FDEQ_GAIN_5
-45    0x686C    //RX_FDEQ_GAIN_6
-46    0x6E82    //RX_FDEQ_GAIN_7
-47    0x8086    //RX_FDEQ_GAIN_8
-48    0x9092    //RX_FDEQ_GAIN_9
-49    0x9C98    //RX_FDEQ_GAIN_10
-50    0x8486    //RX_FDEQ_GAIN_11
-51    0x6858    //RX_FDEQ_GAIN_12
-52    0x5048    //RX_FDEQ_GAIN_13
-53    0x3428    //RX_FDEQ_GAIN_14
-54    0x5484    //RX_FDEQ_GAIN_15
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -7014,16 +17841,868 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x002C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0722    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x1964    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0016    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0024    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x003A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0059    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0090    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET_HAC-VOICE_GENERIC-NB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
-2    0x0036    //TX_PATCH_REG
-3    0x6F7A    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0000    //TX_SAMPLINGFREQ_SIG
 7    0x0000    //TX_SAMPLINGFREQ_PROC
@@ -7040,7 +18719,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
+21    0x009C    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -7061,8 +18740,8 @@
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
 41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
 46    0x0000    //TX_MIC_PAIR_CH_05
@@ -7127,7 +18806,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -7251,13 +18930,13 @@
 229    0x2000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0025    //TX_EPD_OFFSET_00
+232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
 234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -7270,19 +18949,19 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF700    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x01A0    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x01A0    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x01A0    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0000    //TX_DELTA_THR_SN_EST_5
+256    0x01A0    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x3000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
+259    0x3000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x3000    //TX_LAMBDA_NN_EST_3
 262    0x3000    //TX_LAMBDA_NN_EST_4
-263    0x3000    //TX_LAMBDA_NN_EST_5
+263    0x4000    //TX_LAMBDA_NN_EST_5
 264    0x4000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
@@ -7301,20 +18980,20 @@
 279    0x4000    //TX_B_POST_FLT_0
 280    0x4000    //TX_B_POST_FLT_1
 281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x001B    //TX_NS_LVL_CTRL_1
-283    0x0019    //TX_NS_LVL_CTRL_2
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x001B    //TX_NS_LVL_CTRL_2
 284    0x0017    //TX_NS_LVL_CTRL_3
-285    0x0017    //TX_NS_LVL_CTRL_4
-286    0x0019    //TX_NS_LVL_CTRL_5
-287    0x0014    //TX_NS_LVL_CTRL_6
+285    0x0019    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x001B    //TX_NS_LVL_CTRL_6
 288    0x0010    //TX_NS_LVL_CTRL_7
 289    0x0010    //TX_MIN_GAIN_S_0
 290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
+291    0x0010    //TX_MIN_GAIN_S_2
 292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x0014    //TX_MIN_GAIN_S_6
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
 296    0x0014    //TX_MIN_GAIN_S_7
 297    0x5000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
@@ -7324,8 +19003,8 @@
 302    0x4000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
 307    0x3000    //TX_SNRI_SUP_7
 308    0x3000    //TX_THR_LFNS
 309    0x001A    //TX_G_LFNS
@@ -7334,36 +19013,36 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x2000    //TX_A_POST_FILT_S_0
-315    0x7000    //TX_A_POST_FILT_S_1
-316    0x6000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x2000    //TX_A_POST_FILT_S_4
-319    0x6000    //TX_A_POST_FILT_S_5
-320    0x2000    //TX_A_POST_FILT_S_6
+315    0x2000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x2000    //TX_A_POST_FILT_S_5
+320    0x7000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x4000    //TX_B_POST_FILT_0
-323    0x4000    //TX_B_POST_FILT_1
-324    0x7FFF    //TX_B_POST_FILT_2
-325    0x5000    //TX_B_POST_FILT_3
-326    0x7FFF    //TX_B_POST_FILT_4
-327    0x7FFF    //TX_B_POST_FILT_5
+323    0x2000    //TX_B_POST_FILT_1
+324    0x5000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
 328    0x4000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
 338    0x7E14    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7200    //TX_LAMBDA_PFILT_S_2
-342    0x7900    //TX_LAMBDA_PFILT_S_3
-343    0x7400    //TX_LAMBDA_PFILT_S_4
-344    0x7200    //TX_LAMBDA_PFILT_S_5
+340    0x7200    //TX_LAMBDA_PFILT_S_1
+341    0x7800    //TX_LAMBDA_PFILT_S_2
+342    0x7400    //TX_LAMBDA_PFILT_S_3
+343    0x7200    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
 345    0x7C29    //TX_LAMBDA_PFILT_S_6
 346    0x7C29    //TX_LAMBDA_PFILT_S_7
 347    0x0200    //TX_K_PEPPER
@@ -7391,18 +19070,18 @@
 369    0x2134    //TX_NOISE_TH_0_3
 370    0x0320    //TX_NOISE_TH_1
 371    0x022C    //TX_NOISE_TH_2
-372    0x2710    //TX_NOISE_TH_3
-373    0x1B58    //TX_NOISE_TH_4
+372    0x2260    //TX_NOISE_TH_3
+373    0x6B6C    //TX_NOISE_TH_4
 374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x0000    //TX_NOISE_TH_5_4
-378    0x0640    //TX_NOISE_TH_6
+378    0x07D0    //TX_NOISE_TH_6
 379    0x0004    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
 385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
@@ -7410,15 +19089,15 @@
 388    0x00CE    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0001    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -7447,7 +19126,7 @@
 425    0x0280    //TX_SB_RHO_MEAN_TH_NTALK
 426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
 427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0990    //TX_WTA_EN_RTO_TH
+428    0x0100    //TX_WTA_EN_RTO_TH
 429    0x1400    //TX_TOP_ENER_TH_F
 430    0x0100    //TX_DESIRED_TALK_HOLDT
 431    0x0800    //TX_MIC_BLOCK_FACTOR
@@ -7459,8 +19138,8 @@
 437    0x0032    //TX_SILENCE_T
 438    0x0000    //TX_A_POST_FLT_WTA
 439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0640    //TX_SB_RHO_MEAN3_TH
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0666    //TX_SB_RHO_MEAN3_TH
 442    0x0000    //TX_HS_RESRV_4
 443    0x0000    //TX_HS_RESRV_5
 444    0x003C    //TX_DOA_VAD_THR_1
@@ -7528,21 +19207,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x6000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -7571,30 +19250,30 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0018    //TX_FDEQ_SUBNUM
 567    0x6C60    //TX_FDEQ_GAIN_0
 568    0x584F    //TX_FDEQ_GAIN_1
 569    0x4F4E    //TX_FDEQ_GAIN_2
 570    0x474A    //TX_FDEQ_GAIN_3
-571    0x473F    //TX_FDEQ_GAIN_4
-572    0x4240    //TX_FDEQ_GAIN_5
+571    0x433B    //TX_FDEQ_GAIN_4
+572    0x3A40    //TX_FDEQ_GAIN_5
 573    0x4040    //TX_FDEQ_GAIN_6
-574    0x3630    //TX_FDEQ_GAIN_7
-575    0x2020    //TX_FDEQ_GAIN_8
+574    0x3631    //TX_FDEQ_GAIN_7
+575    0x2220    //TX_FDEQ_GAIN_8
 576    0x383C    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
@@ -7619,7 +19298,7 @@
 597    0x0808    //TX_FDEQ_BIN_6
 598    0x050E    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0F0F    //TX_FDEQ_BIN_9
+600    0x0F09    //TX_FDEQ_BIN_9
 601    0x0000    //TX_FDEQ_BIN_10
 602    0x0000    //TX_FDEQ_BIN_11
 603    0x0000    //TX_FDEQ_BIN_12
@@ -7636,10 +19315,10 @@
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
 616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4846    //TX_PREEQ_GAIN_MIC0_0
-618    0x4544    //TX_PREEQ_GAIN_MIC0_1
-619    0x4240    //TX_PREEQ_GAIN_MIC0_2
-620    0x3E48    //TX_PREEQ_GAIN_MIC0_3
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
 621    0x4848    //TX_PREEQ_GAIN_MIC0_4
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
 623    0x4848    //TX_PREEQ_GAIN_MIC0_6
@@ -7691,9 +19370,9 @@
 669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+672    0x4A4A    //TX_PREEQ_GAIN_MIC1_6
+673    0x4B4B    //TX_PREEQ_GAIN_MIC1_7
+674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
 675    0x4848    //TX_PREEQ_GAIN_MIC1_9
 676    0x4848    //TX_PREEQ_GAIN_MIC1_10
 677    0x4848    //TX_PREEQ_GAIN_MIC1_11
@@ -7709,22 +19388,22 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
@@ -7794,8 +19473,8 @@
 772    0x0044    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
 774    0x0000    //TX_GAIN_LIMIT_1
-775    0x0006    //TX_GAIN_LIMIT_2
-776    0x0006    //TX_GAIN_LIMIT_3
+775    0x0007    //TX_GAIN_LIMIT_2
+776    0x0007    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -7885,7 +19564,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0550    //TX_TDDRC_DRC_GAIN
+866    0x0531    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -7916,6 +19595,71 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x00A0    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0012    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7F00    //TX_DTD_THR1_MICMUTE_0
+912    0x7900    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0x3FFF    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
 0    0x000C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -7942,7 +19686,7 @@
 22    0x0014    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -8767,16 +20511,868 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x000C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C48    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0303    //RX_FDEQ_BIN_3
+224    0x0303    //RX_FDEQ_BIN_4
+225    0x0303    //RX_FDEQ_BIN_5
+226    0x0303    //RX_FDEQ_BIN_6
+227    0x0303    //RX_FDEQ_BIN_7
+228    0x0A0A    //RX_FDEQ_BIN_8
+229    0x0A0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0360    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0360    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C48    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0303    //RX_FDEQ_BIN_3
+224    0x0303    //RX_FDEQ_BIN_4
+225    0x0303    //RX_FDEQ_BIN_5
+226    0x0303    //RX_FDEQ_BIN_6
+227    0x0303    //RX_FDEQ_BIN_7
+228    0x0A0A    //RX_FDEQ_BIN_8
+229    0x0A0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0360    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C48    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0303    //RX_FDEQ_BIN_3
+224    0x0303    //RX_FDEQ_BIN_4
+225    0x0303    //RX_FDEQ_BIN_5
+226    0x0303    //RX_FDEQ_BIN_6
+227    0x0303    //RX_FDEQ_BIN_7
+228    0x0A0A    //RX_FDEQ_BIN_8
+229    0x0A0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0360    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C48    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0303    //RX_FDEQ_BIN_3
+224    0x0303    //RX_FDEQ_BIN_4
+225    0x0303    //RX_FDEQ_BIN_5
+226    0x0303    //RX_FDEQ_BIN_6
+227    0x0303    //RX_FDEQ_BIN_7
+228    0x0A0A    //RX_FDEQ_BIN_8
+229    0x0A0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0360    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C48    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0303    //RX_FDEQ_BIN_3
+224    0x0303    //RX_FDEQ_BIN_4
+225    0x0303    //RX_FDEQ_BIN_5
+226    0x0303    //RX_FDEQ_BIN_6
+227    0x0303    //RX_FDEQ_BIN_7
+228    0x0A0A    //RX_FDEQ_BIN_8
+229    0x0A0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0360    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C48    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0303    //RX_FDEQ_BIN_3
+224    0x0303    //RX_FDEQ_BIN_4
+225    0x0303    //RX_FDEQ_BIN_5
+226    0x0303    //RX_FDEQ_BIN_6
+227    0x0303    //RX_FDEQ_BIN_7
+228    0x0A0A    //RX_FDEQ_BIN_8
+229    0x0A0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0360    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C48    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0303    //RX_FDEQ_BIN_3
+224    0x0303    //RX_FDEQ_BIN_4
+225    0x0303    //RX_FDEQ_BIN_5
+226    0x0303    //RX_FDEQ_BIN_6
+227    0x0303    //RX_FDEQ_BIN_7
+228    0x0A0A    //RX_FDEQ_BIN_8
+229    0x0A0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0360    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C48    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0303    //RX_FDEQ_BIN_3
+224    0x0303    //RX_FDEQ_BIN_4
+225    0x0303    //RX_FDEQ_BIN_5
+226    0x0303    //RX_FDEQ_BIN_6
+227    0x0303    //RX_FDEQ_BIN_7
+228    0x0A0A    //RX_FDEQ_BIN_8
+229    0x0A0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET_HAC-VOICE_GENERIC-WB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0036    //TX_PATCH_REG
-3    0x2F7A    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+3    0x2F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
 7    0x0001    //TX_SAMPLINGFREQ_PROC
@@ -8793,7 +21389,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
+21    0x009C    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -8814,8 +21410,8 @@
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
 41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
 46    0x0000    //TX_MIC_PAIR_CH_05
@@ -8879,8 +21475,8 @@
 104    0x0000    //TX_MIC_LOC_23
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -8922,7 +21518,7 @@
 147    0x0800    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
+150    0x6000    //TX_EAD_THR
 151    0x2000    //TX_THR_RE_EST
 152    0x0100    //TX_MIN_EQ_RE_EST_0
 153    0x0100    //TX_MIN_EQ_RE_EST_1
@@ -9004,13 +21600,13 @@
 229    0x2000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0120    //TX_EPD_OFFSET_00
+232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
 234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -9023,16 +21619,16 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF700    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x01A0    //TX_DELTA_THR_SN_EST_2
+251    0x01A0    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x5000    //TX_LAMBDA_NN_EST_2
+259    0x5000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
@@ -9054,18 +21650,18 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x4000    //TX_B_POST_FLT_1
 281    0x0018    //TX_NS_LVL_CTRL_0
-282    0x001C    //TX_NS_LVL_CTRL_1
-283    0x0019    //TX_NS_LVL_CTRL_2
-284    0x001C    //TX_NS_LVL_CTRL_3
-285    0x0019    //TX_NS_LVL_CTRL_4
-286    0x001A    //TX_NS_LVL_CTRL_5
-287    0x001E    //TX_NS_LVL_CTRL_6
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x001A    //TX_NS_LVL_CTRL_4
+286    0x001E    //TX_NS_LVL_CTRL_5
+287    0x001C    //TX_NS_LVL_CTRL_6
 288    0x001C    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0018    //TX_MIN_GAIN_S_1
+290    0x0012    //TX_MIN_GAIN_S_1
 291    0x0012    //TX_MIN_GAIN_S_2
 292    0x0012    //TX_MIN_GAIN_S_3
-293    0x0012    //TX_MIN_GAIN_S_4
+293    0x0018    //TX_MIN_GAIN_S_4
 294    0x0018    //TX_MIN_GAIN_S_5
 295    0x0018    //TX_MIN_GAIN_S_6
 296    0x0018    //TX_MIN_GAIN_S_7
@@ -9073,7 +21669,7 @@
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
+301    0x5000    //TX_SNRI_SUP_1
 302    0x4000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
@@ -9087,28 +21683,28 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x7000    //TX_A_POST_FILT_S_0
-315    0x7000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x2000    //TX_A_POST_FILT_S_4
+315    0x3000    //TX_A_POST_FILT_S_1
+316    0x3000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x7000    //TX_A_POST_FILT_S_4
 319    0x7000    //TX_A_POST_FILT_S_5
 320    0x7000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x4000    //TX_B_POST_FILT_1
-324    0x5000    //TX_B_POST_FILT_2
+324    0x4000    //TX_B_POST_FILT_2
 325    0x4000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x4000    //TX_B_POST_FILT_5
-328    0x4000    //TX_B_POST_FILT_6
+328    0x5000    //TX_B_POST_FILT_6
 329    0x4000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
 331    0x6000    //TX_B_LESSCUT_RTO_S_1
 332    0x6000    //TX_B_LESSCUT_RTO_S_2
 333    0x6000    //TX_B_LESSCUT_RTO_S_3
-334    0x6000    //TX_B_LESSCUT_RTO_S_4
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
 335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7C29    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
@@ -9140,11 +21736,11 @@
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
 367    0x000A    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x0139    //TX_NOISE_TH_1
 371    0x0479    //TX_NOISE_TH_2
-372    0x2E90    //TX_NOISE_TH_3
+372    0x2328    //TX_NOISE_TH_3
 373    0x4422    //TX_NOISE_TH_4
 374    0x5586    //TX_NOISE_TH_5
 375    0x4425    //TX_NOISE_TH_5_2
@@ -9152,10 +21748,10 @@
 377    0x4E20    //TX_NOISE_TH_5_4
 378    0x21E8    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
 385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
@@ -9163,15 +21759,15 @@
 388    0x00CE    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0500    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0004    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -9281,21 +21877,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -9324,19 +21920,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
 567    0x5C54    //TX_FDEQ_GAIN_0
@@ -9348,11 +21944,11 @@
 573    0x4B53    //TX_FDEQ_GAIN_6
 574    0x564A    //TX_FDEQ_GAIN_7
 575    0x3D3A    //TX_FDEQ_GAIN_8
-576    0x3B3C    //TX_FDEQ_GAIN_9
-577    0x3C36    //TX_FDEQ_GAIN_10
-578    0x3636    //TX_FDEQ_GAIN_11
-579    0x3D3E    //TX_FDEQ_GAIN_12
-580    0x4548    //TX_FDEQ_GAIN_13
+576    0x3838    //TX_FDEQ_GAIN_9
+577    0x3836    //TX_FDEQ_GAIN_10
+578    0x3633    //TX_FDEQ_GAIN_11
+579    0x3838    //TX_FDEQ_GAIN_12
+580    0x4048    //TX_FDEQ_GAIN_13
 581    0x4848    //TX_FDEQ_GAIN_14
 582    0x4848    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
@@ -9389,15 +21985,15 @@
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
 616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4846    //TX_PREEQ_GAIN_MIC0_0
-618    0x4544    //TX_PREEQ_GAIN_MIC0_1
-619    0x4240    //TX_PREEQ_GAIN_MIC0_2
-620    0x3E3C    //TX_PREEQ_GAIN_MIC0_3
-621    0x3A38    //TX_PREEQ_GAIN_MIC0_4
-622    0x3635    //TX_PREEQ_GAIN_MIC0_5
-623    0x3330    //TX_PREEQ_GAIN_MIC0_6
-624    0x2E2A    //TX_PREEQ_GAIN_MIC0_7
-625    0x2648    //TX_PREEQ_GAIN_MIC0_8
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
 626    0x4848    //TX_PREEQ_GAIN_MIC0_9
 627    0x4848    //TX_PREEQ_GAIN_MIC0_10
 628    0x4848    //TX_PREEQ_GAIN_MIC0_11
@@ -9445,13 +22041,13 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+673    0x484A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5454    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
 680    0x4848    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
@@ -9462,22 +22058,22 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0F10    //TX_PREEQ_BIN_MIC1_10
+701    0x1011    //TX_PREEQ_BIN_MIC1_11
+702    0x1104    //TX_PREEQ_BIN_MIC1_12
+703    0x101B    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
@@ -9548,7 +22144,7 @@
 773    0x0000    //TX_GAIN_LIMIT_0
 774    0x0000    //TX_GAIN_LIMIT_1
 775    0x0006    //TX_GAIN_LIMIT_2
-776    0x0006    //TX_GAIN_LIMIT_3
+776    0x0007    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -9638,7 +22234,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0550    //TX_TDDRC_DRC_GAIN
+866    0x0504    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -9669,6 +22265,71 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x000A    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7C00    //TX_DTD_THR1_MICMUTE_0
+912    0x5DC0    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0x3FFF    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
 0    0x000C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -9695,7 +22356,7 @@
 22    0x0014    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -10520,16 +23181,868 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x000C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C5C    //RX_FDEQ_GAIN_11
+208    0x5C5C    //RX_FDEQ_GAIN_12
+209    0x5C5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0505    //RX_FDEQ_BIN_3
+224    0x0505    //RX_FDEQ_BIN_4
+225    0x0505    //RX_FDEQ_BIN_5
+226    0x0505    //RX_FDEQ_BIN_6
+227    0x0505    //RX_FDEQ_BIN_7
+228    0x160C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0400    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0400    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C5C    //RX_FDEQ_GAIN_11
+208    0x5C5C    //RX_FDEQ_GAIN_12
+209    0x5C5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0505    //RX_FDEQ_BIN_3
+224    0x0505    //RX_FDEQ_BIN_4
+225    0x0505    //RX_FDEQ_BIN_5
+226    0x0505    //RX_FDEQ_BIN_6
+227    0x0505    //RX_FDEQ_BIN_7
+228    0x160C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0400    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C5C    //RX_FDEQ_GAIN_11
+208    0x5C5C    //RX_FDEQ_GAIN_12
+209    0x5C5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0505    //RX_FDEQ_BIN_3
+224    0x0505    //RX_FDEQ_BIN_4
+225    0x0505    //RX_FDEQ_BIN_5
+226    0x0505    //RX_FDEQ_BIN_6
+227    0x0505    //RX_FDEQ_BIN_7
+228    0x160C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0400    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C5C    //RX_FDEQ_GAIN_11
+208    0x5C5C    //RX_FDEQ_GAIN_12
+209    0x5C5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0505    //RX_FDEQ_BIN_3
+224    0x0505    //RX_FDEQ_BIN_4
+225    0x0505    //RX_FDEQ_BIN_5
+226    0x0505    //RX_FDEQ_BIN_6
+227    0x0505    //RX_FDEQ_BIN_7
+228    0x160C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0400    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C5C    //RX_FDEQ_GAIN_11
+208    0x5C5C    //RX_FDEQ_GAIN_12
+209    0x5C5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0505    //RX_FDEQ_BIN_3
+224    0x0505    //RX_FDEQ_BIN_4
+225    0x0505    //RX_FDEQ_BIN_5
+226    0x0505    //RX_FDEQ_BIN_6
+227    0x0505    //RX_FDEQ_BIN_7
+228    0x160C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0400    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C5C    //RX_FDEQ_GAIN_11
+208    0x5C5C    //RX_FDEQ_GAIN_12
+209    0x5C5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0505    //RX_FDEQ_BIN_3
+224    0x0505    //RX_FDEQ_BIN_4
+225    0x0505    //RX_FDEQ_BIN_5
+226    0x0505    //RX_FDEQ_BIN_6
+227    0x0505    //RX_FDEQ_BIN_7
+228    0x160C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0400    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C5C    //RX_FDEQ_GAIN_11
+208    0x5C5C    //RX_FDEQ_GAIN_12
+209    0x5C5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0505    //RX_FDEQ_BIN_3
+224    0x0505    //RX_FDEQ_BIN_4
+225    0x0505    //RX_FDEQ_BIN_5
+226    0x0505    //RX_FDEQ_BIN_6
+227    0x0505    //RX_FDEQ_BIN_7
+228    0x160C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0400    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C5C    //RX_FDEQ_GAIN_11
+208    0x5C5C    //RX_FDEQ_GAIN_12
+209    0x5C5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0505    //RX_FDEQ_BIN_3
+224    0x0505    //RX_FDEQ_BIN_4
+225    0x0505    //RX_FDEQ_BIN_5
+226    0x0505    //RX_FDEQ_BIN_6
+227    0x0505    //RX_FDEQ_BIN_7
+228    0x160C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET_HAC-VOICE_GENERIC-SWB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
-2    0x0026    //TX_PATCH_REG
-3    0x6F7A    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
 7    0x0003    //TX_SAMPLINGFREQ_PROC
@@ -10546,7 +24059,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
+21    0x009C    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -10567,8 +24080,8 @@
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
 41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
 46    0x0000    //TX_MIC_PAIR_CH_05
@@ -10633,7 +24146,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -10757,13 +24270,13 @@
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0240    //TX_EPD_OFFSET_00
+232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
 234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -10776,12 +24289,12 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF700    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -10807,18 +24320,18 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x0016    //TX_NS_LVL_CTRL_1
+282    0x002C    //TX_NS_LVL_CTRL_1
 283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0018    //TX_NS_LVL_CTRL_4
-286    0x0016    //TX_NS_LVL_CTRL_5
-287    0x0012    //TX_NS_LVL_CTRL_6
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
 288    0x0017    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0012    //TX_MIN_GAIN_S_1
-291    0x0007    //TX_MIN_GAIN_S_2
-292    0x0012    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
 294    0x0012    //TX_MIN_GAIN_S_5
 295    0x0012    //TX_MIN_GAIN_S_6
 296    0x0012    //TX_MIN_GAIN_S_7
@@ -10826,12 +24339,12 @@
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
-302    0x6000    //TX_SNRI_SUP_2
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
 303    0x6000    //TX_SNRI_SUP_3
 304    0x6000    //TX_SNRI_SUP_4
 305    0x6000    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
+306    0x3000    //TX_SNRI_SUP_6
 307    0x6000    //TX_SNRI_SUP_7
 308    0x6000    //TX_THR_LFNS
 309    0x0017    //TX_G_LFNS
@@ -10840,29 +24353,29 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
+315    0x4000    //TX_A_POST_FILT_S_1
 316    0x4000    //TX_A_POST_FILT_S_2
 317    0x4000    //TX_A_POST_FILT_S_3
 318    0x4000    //TX_A_POST_FILT_S_4
 319    0x4000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
+320    0x5000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x3000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x5000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x6000    //TX_B_POST_FILT_6
+323    0x5000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
 329    0x3000    //TX_B_POST_FILT_7
 330    0x1000    //TX_B_LESSCUT_RTO_S_0
-331    0x6000    //TX_B_LESSCUT_RTO_S_1
-332    0x6000    //TX_B_LESSCUT_RTO_S_2
-333    0x6000    //TX_B_LESSCUT_RTO_S_3
-334    0x6000    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
 338    0x7E14    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
 340    0x7C29    //TX_LAMBDA_PFILT_S_1
@@ -10893,22 +24406,22 @@
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
 367    0x000A    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
-370    0x00C6    //TX_NOISE_TH_1
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x01F4    //TX_NOISE_TH_1
 371    0x0DAC    //TX_NOISE_TH_2
-372    0x2EE0    //TX_NOISE_TH_3
-373    0x47E0    //TX_NOISE_TH_4
+372    0x2134    //TX_NOISE_TH_3
+373    0x6978    //TX_NOISE_TH_4
 374    0x57E4    //TX_NOISE_TH_5
 375    0x4BD6    //TX_NOISE_TH_5_2
 376    0x0001    //TX_NOISE_TH_5_3
 377    0x4E20    //TX_NOISE_TH_5_4
-378    0x39DF    //TX_NOISE_TH_6
+378    0x1194    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
 385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
@@ -10916,15 +24429,15 @@
 388    0x0200    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0004    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -10935,7 +24448,7 @@
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x2900    //TX_MIN_G_CTRL_SSNS
 409    0x0800    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
+410    0x07D0    //TX_NS_FP_K_METAL
 411    0x3A98    //TX_NOISEDET_BOOST_TH
 412    0x0FA0    //TX_NSMOOTH_TH
 413    0x0000    //TX_NS_RESRV_8
@@ -10965,8 +24478,8 @@
 437    0x0032    //TX_SILENCE_T
 438    0x0000    //TX_A_POST_FLT_WTA
 439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x051E    //TX_SB_RHO_MEAN2_TH
-441    0x02F0    //TX_SB_RHO_MEAN3_TH
+440    0x03E8    //TX_SB_RHO_MEAN2_TH
+441    0x03E8    //TX_SB_RHO_MEAN3_TH
 442    0x0000    //TX_HS_RESRV_4
 443    0x0000    //TX_HS_RESRV_5
 444    0x0001    //TX_DOA_VAD_THR_1
@@ -11034,21 +24547,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -11077,38 +24590,38 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
 567    0x5C54    //TX_FDEQ_GAIN_0
 568    0x5048    //TX_FDEQ_GAIN_1
 569    0x4C4C    //TX_FDEQ_GAIN_2
-570    0x474A    //TX_FDEQ_GAIN_3
-571    0x3F3F    //TX_FDEQ_GAIN_4
-572    0x4245    //TX_FDEQ_GAIN_5
-573    0x4B53    //TX_FDEQ_GAIN_6
-574    0x5F3E    //TX_FDEQ_GAIN_7
-575    0x303A    //TX_FDEQ_GAIN_8
-576    0x3B3C    //TX_FDEQ_GAIN_9
-577    0x3C3E    //TX_FDEQ_GAIN_10
-578    0x4141    //TX_FDEQ_GAIN_11
-579    0x3D3E    //TX_FDEQ_GAIN_12
-580    0x4548    //TX_FDEQ_GAIN_13
-581    0x4F56    //TX_FDEQ_GAIN_14
-582    0x6548    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
+570    0x494D    //TX_FDEQ_GAIN_3
+571    0x4442    //TX_FDEQ_GAIN_4
+572    0x4448    //TX_FDEQ_GAIN_5
+573    0x4C53    //TX_FDEQ_GAIN_6
+574    0x6244    //TX_FDEQ_GAIN_7
+575    0x4348    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x484A    //TX_FDEQ_GAIN_11
+579    0x4840    //TX_FDEQ_GAIN_12
+580    0x4040    //TX_FDEQ_GAIN_13
+581    0x485C    //TX_FDEQ_GAIN_14
+582    0x707E    //TX_FDEQ_GAIN_15
+583    0x5D48    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
 586    0x4848    //TX_FDEQ_GAIN_19
@@ -11142,19 +24655,19 @@
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
 616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4846    //TX_PREEQ_GAIN_MIC0_0
-618    0x4544    //TX_PREEQ_GAIN_MIC0_1
-619    0x4240    //TX_PREEQ_GAIN_MIC0_2
-620    0x3E3C    //TX_PREEQ_GAIN_MIC0_3
-621    0x3A38    //TX_PREEQ_GAIN_MIC0_4
-622    0x3635    //TX_PREEQ_GAIN_MIC0_5
-623    0x3330    //TX_PREEQ_GAIN_MIC0_6
-624    0x2E2A    //TX_PREEQ_GAIN_MIC0_7
-625    0x2625    //TX_PREEQ_GAIN_MIC0_8
-626    0x2421    //TX_PREEQ_GAIN_MIC0_9
-627    0x1D19    //TX_PREEQ_GAIN_MIC0_10
-628    0x1820    //TX_PREEQ_GAIN_MIC0_11
-629    0x2830    //TX_PREEQ_GAIN_MIC0_12
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
 630    0x4848    //TX_PREEQ_GAIN_MIC0_13
 631    0x4848    //TX_PREEQ_GAIN_MIC0_14
 632    0x4848    //TX_PREEQ_GAIN_MIC0_15
@@ -11198,16 +24711,16 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
 685    0x4848    //TX_PREEQ_GAIN_MIC1_19
@@ -11215,23 +24728,23 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
 696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -11422,6 +24935,71 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x03E8    //TX_MICMUTE_RATIO_THR
+900    0x01A4    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7F00    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0x3FFF    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
 0    0x000C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -11448,7 +25026,7 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -12273,15 +25851,867 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x000C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET_HAC-VOICE_GENERIC-FB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0026    //TX_PATCH_REG
-3    0x6B7A    //TX_SENDFUNC_MODE_0
+3    0x6B7E    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0004    //TX_SAMPLINGFREQ_SIG
@@ -12299,7 +26729,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
+21    0x009C    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -12320,8 +26750,8 @@
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
 41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
 46    0x0000    //TX_MIC_PAIR_CH_05
@@ -12386,7 +26816,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -12510,13 +26940,13 @@
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0360    //TX_EPD_OFFSET_00
+232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
 234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -12529,12 +26959,12 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF700    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -12562,16 +26992,16 @@
 281    0x0014    //TX_NS_LVL_CTRL_0
 282    0x0016    //TX_NS_LVL_CTRL_1
 283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0018    //TX_NS_LVL_CTRL_4
-286    0x0016    //TX_NS_LVL_CTRL_5
-287    0x0012    //TX_NS_LVL_CTRL_6
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
 288    0x0017    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0012    //TX_MIN_GAIN_S_1
-291    0x0007    //TX_MIN_GAIN_S_2
-292    0x0012    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
+290    0x0007    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
 294    0x0012    //TX_MIN_GAIN_S_5
 295    0x0012    //TX_MIN_GAIN_S_6
 296    0x0012    //TX_MIN_GAIN_S_7
@@ -12593,29 +27023,29 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
+315    0x4000    //TX_A_POST_FILT_S_1
 316    0x4000    //TX_A_POST_FILT_S_2
 317    0x4000    //TX_A_POST_FILT_S_3
 318    0x4000    //TX_A_POST_FILT_S_4
 319    0x4000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
+320    0x5000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x2000    //TX_B_POST_FILT_1
-324    0x3000    //TX_B_POST_FILT_2
+324    0x2000    //TX_B_POST_FILT_2
 325    0x2000    //TX_B_POST_FILT_3
-326    0x5000    //TX_B_POST_FILT_4
+326    0x2000    //TX_B_POST_FILT_4
 327    0x2000    //TX_B_POST_FILT_5
-328    0x6000    //TX_B_POST_FILT_6
+328    0x3000    //TX_B_POST_FILT_6
 329    0x3000    //TX_B_POST_FILT_7
 330    0x1000    //TX_B_LESSCUT_RTO_S_0
-331    0x6000    //TX_B_LESSCUT_RTO_S_1
-332    0x6000    //TX_B_LESSCUT_RTO_S_2
-333    0x6000    //TX_B_LESSCUT_RTO_S_3
-334    0x6000    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
 338    0x7E14    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
 340    0x7C29    //TX_LAMBDA_PFILT_S_1
@@ -12658,10 +27088,10 @@
 377    0x4E20    //TX_NOISE_TH_5_4
 378    0x39DF    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
 384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
 385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
@@ -12669,15 +27099,15 @@
 388    0x0200    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0004    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -12792,16 +27222,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x7FFF    //TX_GSC_RTOL_TH
+522    0x7FFF    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -12830,38 +27260,38 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4854    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x5454    //TX_FDEQ_GAIN_5
-573    0x5454    //TX_FDEQ_GAIN_6
-574    0x6048    //TX_FDEQ_GAIN_7
-575    0x5454    //TX_FDEQ_GAIN_8
-576    0x6464    //TX_FDEQ_GAIN_9
-577    0x6464    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x9898    //TX_FDEQ_GAIN_12
-580    0x9898    //TX_FDEQ_GAIN_13
-581    0x9898    //TX_FDEQ_GAIN_14
-582    0x9898    //TX_FDEQ_GAIN_15
-583    0x9898    //TX_FDEQ_GAIN_16
+567    0x4C4A    //TX_FDEQ_GAIN_0
+568    0x4B4F    //TX_FDEQ_GAIN_1
+569    0x504B    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4A49    //TX_FDEQ_GAIN_4
+572    0x4F48    //TX_FDEQ_GAIN_5
+573    0x4A4E    //TX_FDEQ_GAIN_6
+574    0x534E    //TX_FDEQ_GAIN_7
+575    0x494F    //TX_FDEQ_GAIN_8
+576    0x5E6E    //TX_FDEQ_GAIN_9
+577    0x787A    //TX_FDEQ_GAIN_10
+578    0x6A58    //TX_FDEQ_GAIN_11
+579    0x5051    //TX_FDEQ_GAIN_12
+580    0x5156    //TX_FDEQ_GAIN_13
+581    0x6168    //TX_FDEQ_GAIN_14
+582    0x7678    //TX_FDEQ_GAIN_15
+583    0x7A87    //TX_FDEQ_GAIN_16
 584    0x9898    //TX_FDEQ_GAIN_17
 585    0x9898    //TX_FDEQ_GAIN_18
 586    0x9848    //TX_FDEQ_GAIN_19
@@ -12895,19 +27325,19 @@
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
 616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4846    //TX_PREEQ_GAIN_MIC0_0
-618    0x4544    //TX_PREEQ_GAIN_MIC0_1
-619    0x4240    //TX_PREEQ_GAIN_MIC0_2
-620    0x3E3C    //TX_PREEQ_GAIN_MIC0_3
-621    0x3A38    //TX_PREEQ_GAIN_MIC0_4
-622    0x3635    //TX_PREEQ_GAIN_MIC0_5
-623    0x3330    //TX_PREEQ_GAIN_MIC0_6
-624    0x2E2A    //TX_PREEQ_GAIN_MIC0_7
-625    0x2625    //TX_PREEQ_GAIN_MIC0_8
-626    0x2421    //TX_PREEQ_GAIN_MIC0_9
-627    0x1D19    //TX_PREEQ_GAIN_MIC0_10
-628    0x1820    //TX_PREEQ_GAIN_MIC0_11
-629    0x2830    //TX_PREEQ_GAIN_MIC0_12
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
 630    0x4848    //TX_PREEQ_GAIN_MIC0_13
 631    0x4848    //TX_PREEQ_GAIN_MIC0_14
 632    0x4848    //TX_PREEQ_GAIN_MIC0_15
@@ -12950,15 +27380,15 @@
 669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+672    0x4A4C    //TX_PREEQ_GAIN_MIC1_6
+673    0x4E50    //TX_PREEQ_GAIN_MIC1_7
+674    0x5456    //TX_PREEQ_GAIN_MIC1_8
+675    0x585C    //TX_PREEQ_GAIN_MIC1_9
+676    0x5C64    //TX_PREEQ_GAIN_MIC1_10
+677    0x7478    //TX_PREEQ_GAIN_MIC1_11
+678    0x705C    //TX_PREEQ_GAIN_MIC1_12
+679    0x4838    //TX_PREEQ_GAIN_MIC1_13
+680    0x3C70    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
@@ -12968,22 +27398,22 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x1414    //TX_PREEQ_BIN_MIC1_12
+703    0x1C1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x462C    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
@@ -13144,7 +27574,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x03A0    //TX_TDDRC_DRC_GAIN
+866    0x0504    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -13175,6 +27605,71 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
 0    0x000C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -13201,7 +27696,7 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -14026,16 +28521,868 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x000C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET-TMOBILE_US-NB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
-2    0x0036    //TX_PATCH_REG
-3    0x6F7A    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0000    //TX_SAMPLINGFREQ_SIG
 7    0x0000    //TX_SAMPLINGFREQ_PROC
@@ -14052,7 +29399,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
+21    0x009C    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -14073,8 +29420,8 @@
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
 41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
 46    0x0000    //TX_MIC_PAIR_CH_05
@@ -14139,7 +29486,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -14263,13 +29610,13 @@
 229    0x2000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0025    //TX_EPD_OFFSET_00
+232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
 234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -14282,19 +29629,19 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF700    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x01A0    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x01A0    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x01A0    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0000    //TX_DELTA_THR_SN_EST_5
+256    0x01A0    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x3000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
+259    0x3000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x3000    //TX_LAMBDA_NN_EST_3
 262    0x3000    //TX_LAMBDA_NN_EST_4
-263    0x3000    //TX_LAMBDA_NN_EST_5
+263    0x4000    //TX_LAMBDA_NN_EST_5
 264    0x4000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
@@ -14313,20 +29660,20 @@
 279    0x4000    //TX_B_POST_FLT_0
 280    0x4000    //TX_B_POST_FLT_1
 281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x001B    //TX_NS_LVL_CTRL_1
-283    0x0019    //TX_NS_LVL_CTRL_2
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x001B    //TX_NS_LVL_CTRL_2
 284    0x0017    //TX_NS_LVL_CTRL_3
-285    0x0017    //TX_NS_LVL_CTRL_4
-286    0x0019    //TX_NS_LVL_CTRL_5
-287    0x0014    //TX_NS_LVL_CTRL_6
+285    0x0019    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x001B    //TX_NS_LVL_CTRL_6
 288    0x0010    //TX_NS_LVL_CTRL_7
 289    0x0010    //TX_MIN_GAIN_S_0
 290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
+291    0x0010    //TX_MIN_GAIN_S_2
 292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x0014    //TX_MIN_GAIN_S_6
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
 296    0x0014    //TX_MIN_GAIN_S_7
 297    0x5000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
@@ -14336,8 +29683,8 @@
 302    0x4000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
 307    0x3000    //TX_SNRI_SUP_7
 308    0x3000    //TX_THR_LFNS
 309    0x001A    //TX_G_LFNS
@@ -14346,36 +29693,36 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x2000    //TX_A_POST_FILT_S_0
-315    0x7000    //TX_A_POST_FILT_S_1
-316    0x6000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x2000    //TX_A_POST_FILT_S_4
-319    0x6000    //TX_A_POST_FILT_S_5
-320    0x2000    //TX_A_POST_FILT_S_6
+315    0x2000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x2000    //TX_A_POST_FILT_S_5
+320    0x7000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x4000    //TX_B_POST_FILT_0
-323    0x4000    //TX_B_POST_FILT_1
-324    0x7FFF    //TX_B_POST_FILT_2
-325    0x5000    //TX_B_POST_FILT_3
-326    0x7FFF    //TX_B_POST_FILT_4
-327    0x7FFF    //TX_B_POST_FILT_5
+323    0x2000    //TX_B_POST_FILT_1
+324    0x5000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
 328    0x4000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
 338    0x7E14    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7200    //TX_LAMBDA_PFILT_S_2
-342    0x7900    //TX_LAMBDA_PFILT_S_3
-343    0x7400    //TX_LAMBDA_PFILT_S_4
-344    0x7200    //TX_LAMBDA_PFILT_S_5
+340    0x7200    //TX_LAMBDA_PFILT_S_1
+341    0x7800    //TX_LAMBDA_PFILT_S_2
+342    0x7400    //TX_LAMBDA_PFILT_S_3
+343    0x7200    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
 345    0x7C29    //TX_LAMBDA_PFILT_S_6
 346    0x7C29    //TX_LAMBDA_PFILT_S_7
 347    0x0200    //TX_K_PEPPER
@@ -14403,18 +29750,18 @@
 369    0x2134    //TX_NOISE_TH_0_3
 370    0x0320    //TX_NOISE_TH_1
 371    0x022C    //TX_NOISE_TH_2
-372    0x2710    //TX_NOISE_TH_3
-373    0x1B58    //TX_NOISE_TH_4
+372    0x2260    //TX_NOISE_TH_3
+373    0x6B6C    //TX_NOISE_TH_4
 374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x0000    //TX_NOISE_TH_5_4
-378    0x0640    //TX_NOISE_TH_6
+378    0x07D0    //TX_NOISE_TH_6
 379    0x0004    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
 385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
@@ -14422,15 +29769,15 @@
 388    0x00CE    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0001    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -14459,7 +29806,7 @@
 425    0x0280    //TX_SB_RHO_MEAN_TH_NTALK
 426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
 427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0990    //TX_WTA_EN_RTO_TH
+428    0x0100    //TX_WTA_EN_RTO_TH
 429    0x1400    //TX_TOP_ENER_TH_F
 430    0x0100    //TX_DESIRED_TALK_HOLDT
 431    0x0800    //TX_MIC_BLOCK_FACTOR
@@ -14471,8 +29818,8 @@
 437    0x0032    //TX_SILENCE_T
 438    0x0000    //TX_A_POST_FLT_WTA
 439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0640    //TX_SB_RHO_MEAN3_TH
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0666    //TX_SB_RHO_MEAN3_TH
 442    0x0000    //TX_HS_RESRV_4
 443    0x0000    //TX_HS_RESRV_5
 444    0x003C    //TX_DOA_VAD_THR_1
@@ -14540,21 +29887,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x6000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -14583,19 +29930,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0018    //TX_FDEQ_SUBNUM
 567    0x6C60    //TX_FDEQ_GAIN_0
@@ -14603,10 +29950,10 @@
 569    0x4F4E    //TX_FDEQ_GAIN_2
 570    0x474A    //TX_FDEQ_GAIN_3
 571    0x473F    //TX_FDEQ_GAIN_4
-572    0x4240    //TX_FDEQ_GAIN_5
-573    0x4040    //TX_FDEQ_GAIN_6
-574    0x3630    //TX_FDEQ_GAIN_7
-575    0x2020    //TX_FDEQ_GAIN_8
+572    0x3E40    //TX_FDEQ_GAIN_5
+573    0x403C    //TX_FDEQ_GAIN_6
+574    0x3431    //TX_FDEQ_GAIN_7
+575    0x2424    //TX_FDEQ_GAIN_8
 576    0x383C    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
@@ -14631,7 +29978,7 @@
 597    0x0808    //TX_FDEQ_BIN_6
 598    0x050E    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0F0F    //TX_FDEQ_BIN_9
+600    0x0F09    //TX_FDEQ_BIN_9
 601    0x0000    //TX_FDEQ_BIN_10
 602    0x0000    //TX_FDEQ_BIN_11
 603    0x0000    //TX_FDEQ_BIN_12
@@ -14648,10 +29995,10 @@
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
 616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4846    //TX_PREEQ_GAIN_MIC0_0
-618    0x4544    //TX_PREEQ_GAIN_MIC0_1
-619    0x4240    //TX_PREEQ_GAIN_MIC0_2
-620    0x3E48    //TX_PREEQ_GAIN_MIC0_3
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
 621    0x4848    //TX_PREEQ_GAIN_MIC0_4
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
 623    0x4848    //TX_PREEQ_GAIN_MIC0_6
@@ -14703,9 +30050,9 @@
 669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+672    0x4A4A    //TX_PREEQ_GAIN_MIC1_6
+673    0x4B4B    //TX_PREEQ_GAIN_MIC1_7
+674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
 675    0x4848    //TX_PREEQ_GAIN_MIC1_9
 676    0x4848    //TX_PREEQ_GAIN_MIC1_10
 677    0x4848    //TX_PREEQ_GAIN_MIC1_11
@@ -14721,22 +30068,22 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
@@ -14806,8 +30153,8 @@
 772    0x0044    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
 774    0x0000    //TX_GAIN_LIMIT_1
-775    0x0006    //TX_GAIN_LIMIT_2
-776    0x0006    //TX_GAIN_LIMIT_3
+775    0x0007    //TX_GAIN_LIMIT_2
+776    0x0007    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -14897,7 +30244,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0550    //TX_TDDRC_DRC_GAIN
+866    0x0650    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -14928,8 +30275,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x00A0    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0012    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7F00    //TX_DTD_THR1_MICMUTE_0
+912    0x7900    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0x3FFF    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x002C    //RX_RECVFUNC_MODE_0
+0    0x243C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -14939,7 +30351,7 @@
 7    0x1000    //RX_TDDRC_ALPHA_UP_2
 8    0x1000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0600    //RX_PGA
+10    0x050E    //RX_PGA
 11    0x7FFF    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -14954,7 +30366,7 @@
 22    0x0014    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -14969,15 +30381,15 @@
 37    0x4000    //RX_LMT_ALPHA
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x4840    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x4E62    //RX_FDEQ_GAIN_2
-42    0x6C7A    //RX_FDEQ_GAIN_3
-43    0x8690    //RX_FDEQ_GAIN_4
-44    0x867E    //RX_FDEQ_GAIN_5
-45    0x7E7E    //RX_FDEQ_GAIN_6
-46    0x8080    //RX_FDEQ_GAIN_7
-47    0x8088    //RX_FDEQ_GAIN_8
-48    0x8890    //RX_FDEQ_GAIN_9
+40    0x3E40    //RX_FDEQ_GAIN_1
+41    0x515E    //RX_FDEQ_GAIN_2
+42    0x6470    //RX_FDEQ_GAIN_3
+43    0x7A84    //RX_FDEQ_GAIN_4
+44    0x7C7A    //RX_FDEQ_GAIN_5
+45    0x7C7C    //RX_FDEQ_GAIN_6
+46    0x7D7C    //RX_FDEQ_GAIN_7
+47    0x7E82    //RX_FDEQ_GAIN_8
+48    0x7C80    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -14993,8 +30405,8 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
 66    0x0304    //RX_FDEQ_BIN_3
 67    0x0405    //RX_FDEQ_BIN_4
 68    0x0506    //RX_FDEQ_BIN_5
@@ -15053,12 +30465,12 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05B0    //RX_TDDRC_DRC_GAIN
+124    0x055F    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
+126    0x1450    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0700    //RX_MAX_G_FP
+129    0x000A    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -15109,18 +30521,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05B0    //RX_TDDRC_DRC_GAIN
+124    0x0321    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
+39    0x483E    //RX_FDEQ_GAIN_0
 40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x4E62    //RX_FDEQ_GAIN_2
-42    0x6C7A    //RX_FDEQ_GAIN_3
-43    0x8690    //RX_FDEQ_GAIN_4
-44    0x867E    //RX_FDEQ_GAIN_5
-45    0x7E7E    //RX_FDEQ_GAIN_6
-46    0x8080    //RX_FDEQ_GAIN_7
-47    0x8088    //RX_FDEQ_GAIN_8
-48    0x8890    //RX_FDEQ_GAIN_9
+41    0x4A54    //RX_FDEQ_GAIN_2
+42    0x5E7E    //RX_FDEQ_GAIN_3
+43    0x909E    //RX_FDEQ_GAIN_4
+44    0x9686    //RX_FDEQ_GAIN_5
+45    0x8078    //RX_FDEQ_GAIN_6
+46    0x7978    //RX_FDEQ_GAIN_7
+47    0x808A    //RX_FDEQ_GAIN_8
+48    0x96A0    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -15136,8 +30548,8 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
 66    0x0304    //RX_FDEQ_BIN_3
 67    0x0405    //RX_FDEQ_BIN_4
 68    0x0506    //RX_FDEQ_BIN_5
@@ -15183,7 +30595,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
+129    0x000D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -15208,18 +30620,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05B0    //RX_TDDRC_DRC_GAIN
+124    0x030F    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
+39    0x483E    //RX_FDEQ_GAIN_0
 40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x4E62    //RX_FDEQ_GAIN_2
-42    0x6C7A    //RX_FDEQ_GAIN_3
-43    0x8690    //RX_FDEQ_GAIN_4
-44    0x867E    //RX_FDEQ_GAIN_5
-45    0x7E7E    //RX_FDEQ_GAIN_6
-46    0x8080    //RX_FDEQ_GAIN_7
-47    0x8088    //RX_FDEQ_GAIN_8
-48    0x8890    //RX_FDEQ_GAIN_9
+41    0x4A54    //RX_FDEQ_GAIN_2
+42    0x5E7E    //RX_FDEQ_GAIN_3
+43    0x909E    //RX_FDEQ_GAIN_4
+44    0x9686    //RX_FDEQ_GAIN_5
+45    0x8078    //RX_FDEQ_GAIN_6
+46    0x7978    //RX_FDEQ_GAIN_7
+47    0x808A    //RX_FDEQ_GAIN_8
+48    0x96A0    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -15235,8 +30647,8 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
 66    0x0304    //RX_FDEQ_BIN_3
 67    0x0405    //RX_FDEQ_BIN_4
 68    0x0506    //RX_FDEQ_BIN_5
@@ -15282,7 +30694,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0016    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -15307,18 +30719,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05B0    //RX_TDDRC_DRC_GAIN
+124    0x0321    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
+39    0x483E    //RX_FDEQ_GAIN_0
 40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x4E62    //RX_FDEQ_GAIN_2
-42    0x6C7A    //RX_FDEQ_GAIN_3
-43    0x8690    //RX_FDEQ_GAIN_4
-44    0x867E    //RX_FDEQ_GAIN_5
-45    0x7E7E    //RX_FDEQ_GAIN_6
-46    0x8080    //RX_FDEQ_GAIN_7
-47    0x8088    //RX_FDEQ_GAIN_8
-48    0x8890    //RX_FDEQ_GAIN_9
+41    0x4A54    //RX_FDEQ_GAIN_2
+42    0x5E7E    //RX_FDEQ_GAIN_3
+43    0x909E    //RX_FDEQ_GAIN_4
+44    0x9686    //RX_FDEQ_GAIN_5
+45    0x8078    //RX_FDEQ_GAIN_6
+46    0x7978    //RX_FDEQ_GAIN_7
+47    0x808A    //RX_FDEQ_GAIN_8
+48    0x96A0    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -15334,8 +30746,8 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
 66    0x0304    //RX_FDEQ_BIN_3
 67    0x0405    //RX_FDEQ_BIN_4
 68    0x0506    //RX_FDEQ_BIN_5
@@ -15381,7 +30793,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0024    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -15406,18 +30818,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05B0    //RX_TDDRC_DRC_GAIN
+124    0x0321    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
+39    0x483E    //RX_FDEQ_GAIN_0
 40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x4E62    //RX_FDEQ_GAIN_2
-42    0x6C7A    //RX_FDEQ_GAIN_3
-43    0x8690    //RX_FDEQ_GAIN_4
-44    0x867E    //RX_FDEQ_GAIN_5
-45    0x7E7E    //RX_FDEQ_GAIN_6
-46    0x8080    //RX_FDEQ_GAIN_7
-47    0x8088    //RX_FDEQ_GAIN_8
-48    0x8890    //RX_FDEQ_GAIN_9
+41    0x4A54    //RX_FDEQ_GAIN_2
+42    0x5E7E    //RX_FDEQ_GAIN_3
+43    0x909E    //RX_FDEQ_GAIN_4
+44    0x9686    //RX_FDEQ_GAIN_5
+45    0x8078    //RX_FDEQ_GAIN_6
+46    0x7978    //RX_FDEQ_GAIN_7
+47    0x808A    //RX_FDEQ_GAIN_8
+48    0x96A0    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -15433,8 +30845,8 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
 66    0x0304    //RX_FDEQ_BIN_3
 67    0x0405    //RX_FDEQ_BIN_4
 68    0x0506    //RX_FDEQ_BIN_5
@@ -15480,7 +30892,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x003C    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -15505,18 +30917,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05B0    //RX_TDDRC_DRC_GAIN
+124    0x0321    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
+39    0x483E    //RX_FDEQ_GAIN_0
 40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x4E62    //RX_FDEQ_GAIN_2
-42    0x6C7A    //RX_FDEQ_GAIN_3
-43    0x8690    //RX_FDEQ_GAIN_4
-44    0x867E    //RX_FDEQ_GAIN_5
-45    0x7E7E    //RX_FDEQ_GAIN_6
-46    0x8080    //RX_FDEQ_GAIN_7
-47    0x8088    //RX_FDEQ_GAIN_8
-48    0x8890    //RX_FDEQ_GAIN_9
+41    0x4A54    //RX_FDEQ_GAIN_2
+42    0x5E7E    //RX_FDEQ_GAIN_3
+43    0x909E    //RX_FDEQ_GAIN_4
+44    0x9686    //RX_FDEQ_GAIN_5
+45    0x8078    //RX_FDEQ_GAIN_6
+46    0x7978    //RX_FDEQ_GAIN_7
+47    0x808A    //RX_FDEQ_GAIN_8
+48    0x96A0    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -15532,8 +30944,8 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
 66    0x0304    //RX_FDEQ_BIN_3
 67    0x0405    //RX_FDEQ_BIN_4
 68    0x0506    //RX_FDEQ_BIN_5
@@ -15579,7 +30991,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
+129    0x0060    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -15604,18 +31016,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05B0    //RX_TDDRC_DRC_GAIN
+124    0x0321    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
+39    0x483E    //RX_FDEQ_GAIN_0
 40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x4E62    //RX_FDEQ_GAIN_2
-42    0x6C7A    //RX_FDEQ_GAIN_3
-43    0x8690    //RX_FDEQ_GAIN_4
-44    0x867E    //RX_FDEQ_GAIN_5
-45    0x7E7E    //RX_FDEQ_GAIN_6
-46    0x8080    //RX_FDEQ_GAIN_7
-47    0x8088    //RX_FDEQ_GAIN_8
-48    0x8890    //RX_FDEQ_GAIN_9
+41    0x4A54    //RX_FDEQ_GAIN_2
+42    0x5E7E    //RX_FDEQ_GAIN_3
+43    0x909E    //RX_FDEQ_GAIN_4
+44    0x9686    //RX_FDEQ_GAIN_5
+45    0x8078    //RX_FDEQ_GAIN_6
+46    0x7978    //RX_FDEQ_GAIN_7
+47    0x808A    //RX_FDEQ_GAIN_8
+48    0x96A0    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -15631,8 +31043,8 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
 66    0x0304    //RX_FDEQ_BIN_3
 67    0x0405    //RX_FDEQ_BIN_4
 68    0x0506    //RX_FDEQ_BIN_5
@@ -15678,7 +31090,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
+129    0x0098    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -15703,18 +31115,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05B0    //RX_TDDRC_DRC_GAIN
+124    0x0321    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
+39    0x483E    //RX_FDEQ_GAIN_0
 40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x4E62    //RX_FDEQ_GAIN_2
-42    0x6C7A    //RX_FDEQ_GAIN_3
-43    0x8690    //RX_FDEQ_GAIN_4
-44    0x867E    //RX_FDEQ_GAIN_5
-45    0x7E7E    //RX_FDEQ_GAIN_6
-46    0x8080    //RX_FDEQ_GAIN_7
-47    0x8088    //RX_FDEQ_GAIN_8
-48    0x8890    //RX_FDEQ_GAIN_9
+41    0x4A54    //RX_FDEQ_GAIN_2
+42    0x5E7E    //RX_FDEQ_GAIN_3
+43    0x909E    //RX_FDEQ_GAIN_4
+44    0x9686    //RX_FDEQ_GAIN_5
+45    0x8078    //RX_FDEQ_GAIN_6
+46    0x7978    //RX_FDEQ_GAIN_7
+47    0x808A    //RX_FDEQ_GAIN_8
+48    0x96A0    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -15730,8 +31142,8 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
 66    0x0304    //RX_FDEQ_BIN_3
 67    0x0405    //RX_FDEQ_BIN_4
 68    0x0506    //RX_FDEQ_BIN_5
@@ -15779,16 +31191,868 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0600    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0034    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0045    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0074    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET-TMOBILE_US-WB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0036    //TX_PATCH_REG
-3    0x2F7A    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+3    0x2F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
 7    0x0001    //TX_SAMPLINGFREQ_PROC
@@ -15805,7 +32069,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
+21    0x009C    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -15826,8 +32090,8 @@
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
 41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
 46    0x0000    //TX_MIC_PAIR_CH_05
@@ -15891,8 +32155,8 @@
 104    0x0000    //TX_MIC_LOC_23
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -15934,7 +32198,7 @@
 147    0x0800    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
+150    0x6000    //TX_EAD_THR
 151    0x2000    //TX_THR_RE_EST
 152    0x0100    //TX_MIN_EQ_RE_EST_0
 153    0x0100    //TX_MIN_EQ_RE_EST_1
@@ -16016,13 +32280,13 @@
 229    0x2000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0120    //TX_EPD_OFFSET_00
+232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
 234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -16035,16 +32299,16 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF700    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x01A0    //TX_DELTA_THR_SN_EST_2
+251    0x01A0    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x5000    //TX_LAMBDA_NN_EST_2
+259    0x5000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
@@ -16066,18 +32330,18 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x4000    //TX_B_POST_FLT_1
 281    0x0018    //TX_NS_LVL_CTRL_0
-282    0x001C    //TX_NS_LVL_CTRL_1
-283    0x0019    //TX_NS_LVL_CTRL_2
-284    0x001C    //TX_NS_LVL_CTRL_3
-285    0x0019    //TX_NS_LVL_CTRL_4
-286    0x001A    //TX_NS_LVL_CTRL_5
-287    0x001E    //TX_NS_LVL_CTRL_6
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x001A    //TX_NS_LVL_CTRL_4
+286    0x001E    //TX_NS_LVL_CTRL_5
+287    0x001C    //TX_NS_LVL_CTRL_6
 288    0x001C    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0018    //TX_MIN_GAIN_S_1
+290    0x0012    //TX_MIN_GAIN_S_1
 291    0x0012    //TX_MIN_GAIN_S_2
 292    0x0012    //TX_MIN_GAIN_S_3
-293    0x0012    //TX_MIN_GAIN_S_4
+293    0x0018    //TX_MIN_GAIN_S_4
 294    0x0018    //TX_MIN_GAIN_S_5
 295    0x0018    //TX_MIN_GAIN_S_6
 296    0x0018    //TX_MIN_GAIN_S_7
@@ -16085,7 +32349,7 @@
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
+301    0x5000    //TX_SNRI_SUP_1
 302    0x4000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
@@ -16099,28 +32363,28 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x7000    //TX_A_POST_FILT_S_0
-315    0x7000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x2000    //TX_A_POST_FILT_S_4
+315    0x3000    //TX_A_POST_FILT_S_1
+316    0x3000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x7000    //TX_A_POST_FILT_S_4
 319    0x7000    //TX_A_POST_FILT_S_5
 320    0x7000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x4000    //TX_B_POST_FILT_1
-324    0x5000    //TX_B_POST_FILT_2
+324    0x4000    //TX_B_POST_FILT_2
 325    0x4000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x4000    //TX_B_POST_FILT_5
-328    0x4000    //TX_B_POST_FILT_6
+328    0x5000    //TX_B_POST_FILT_6
 329    0x4000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
 331    0x6000    //TX_B_LESSCUT_RTO_S_1
 332    0x6000    //TX_B_LESSCUT_RTO_S_2
 333    0x6000    //TX_B_LESSCUT_RTO_S_3
-334    0x6000    //TX_B_LESSCUT_RTO_S_4
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
 335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7C29    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
@@ -16152,11 +32416,11 @@
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
 367    0x000A    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x0139    //TX_NOISE_TH_1
 371    0x0479    //TX_NOISE_TH_2
-372    0x2E90    //TX_NOISE_TH_3
+372    0x2328    //TX_NOISE_TH_3
 373    0x4422    //TX_NOISE_TH_4
 374    0x5586    //TX_NOISE_TH_5
 375    0x4425    //TX_NOISE_TH_5_2
@@ -16164,10 +32428,10 @@
 377    0x4E20    //TX_NOISE_TH_5_4
 378    0x21E8    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
 385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
@@ -16175,15 +32439,15 @@
 388    0x00CE    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0500    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0004    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -16293,21 +32557,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -16336,19 +32600,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
 567    0x5C54    //TX_FDEQ_GAIN_0
@@ -16360,11 +32624,11 @@
 573    0x4B53    //TX_FDEQ_GAIN_6
 574    0x564A    //TX_FDEQ_GAIN_7
 575    0x3D3A    //TX_FDEQ_GAIN_8
-576    0x3B3C    //TX_FDEQ_GAIN_9
-577    0x3C36    //TX_FDEQ_GAIN_10
-578    0x3636    //TX_FDEQ_GAIN_11
-579    0x3D3E    //TX_FDEQ_GAIN_12
-580    0x4548    //TX_FDEQ_GAIN_13
+576    0x3838    //TX_FDEQ_GAIN_9
+577    0x3836    //TX_FDEQ_GAIN_10
+578    0x3633    //TX_FDEQ_GAIN_11
+579    0x3838    //TX_FDEQ_GAIN_12
+580    0x4048    //TX_FDEQ_GAIN_13
 581    0x4848    //TX_FDEQ_GAIN_14
 582    0x4848    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
@@ -16401,15 +32665,15 @@
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
 616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4846    //TX_PREEQ_GAIN_MIC0_0
-618    0x4544    //TX_PREEQ_GAIN_MIC0_1
-619    0x4240    //TX_PREEQ_GAIN_MIC0_2
-620    0x3E3C    //TX_PREEQ_GAIN_MIC0_3
-621    0x3A38    //TX_PREEQ_GAIN_MIC0_4
-622    0x3635    //TX_PREEQ_GAIN_MIC0_5
-623    0x3330    //TX_PREEQ_GAIN_MIC0_6
-624    0x2E2A    //TX_PREEQ_GAIN_MIC0_7
-625    0x2648    //TX_PREEQ_GAIN_MIC0_8
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
 626    0x4848    //TX_PREEQ_GAIN_MIC0_9
 627    0x4848    //TX_PREEQ_GAIN_MIC0_10
 628    0x4848    //TX_PREEQ_GAIN_MIC0_11
@@ -16457,13 +32721,13 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+673    0x484A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5454    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
 680    0x4848    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
@@ -16474,22 +32738,22 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0F10    //TX_PREEQ_BIN_MIC1_10
+701    0x1011    //TX_PREEQ_BIN_MIC1_11
+702    0x1104    //TX_PREEQ_BIN_MIC1_12
+703    0x101B    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
@@ -16560,7 +32824,7 @@
 773    0x0000    //TX_GAIN_LIMIT_0
 774    0x0000    //TX_GAIN_LIMIT_1
 775    0x0006    //TX_GAIN_LIMIT_2
-776    0x0006    //TX_GAIN_LIMIT_3
+776    0x0007    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -16650,7 +32914,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0550    //TX_TDDRC_DRC_GAIN
+866    0x0652    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -16681,8 +32945,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x000A    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7C00    //TX_DTD_THR1_MICMUTE_0
+912    0x5DC0    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0x3FFF    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x002C    //RX_RECVFUNC_MODE_0
+0    0x243C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -16692,7 +33021,7 @@
 7    0x1000    //RX_TDDRC_ALPHA_UP_2
 8    0x1000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0600    //RX_PGA
+10    0x0480    //RX_PGA
 11    0x7FFF    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -16707,7 +33036,7 @@
 22    0x0014    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -16723,17 +33052,17 @@
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4840    //RX_FDEQ_GAIN_0
 40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x807E    //RX_FDEQ_GAIN_5
-45    0x7E80    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x8890    //RX_FDEQ_GAIN_8
-48    0x929C    //RX_FDEQ_GAIN_9
-49    0xA088    //RX_FDEQ_GAIN_10
-50    0x8888    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
+41    0x4659    //RX_FDEQ_GAIN_2
+42    0x6474    //RX_FDEQ_GAIN_3
+43    0x7A82    //RX_FDEQ_GAIN_4
+44    0x8180    //RX_FDEQ_GAIN_5
+45    0x8084    //RX_FDEQ_GAIN_6
+46    0x8A88    //RX_FDEQ_GAIN_7
+47    0x8C8C    //RX_FDEQ_GAIN_8
+48    0x8A95    //RX_FDEQ_GAIN_9
+49    0x978E    //RX_FDEQ_GAIN_10
+50    0x8C8C    //RX_FDEQ_GAIN_11
+51    0x7068    //RX_FDEQ_GAIN_12
 52    0x6050    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -16756,9 +33085,9 @@
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+74    0x0F0E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -16806,12 +33135,12 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04C0    //RX_TDDRC_DRC_GAIN
+124    0x04E6    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
+126    0x1450    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0700    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -16862,21 +33191,21 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04C0    //RX_TDDRC_DRC_GAIN
+124    0x0378    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x807E    //RX_FDEQ_GAIN_5
-45    0x7E80    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x8890    //RX_FDEQ_GAIN_8
-48    0x929C    //RX_FDEQ_GAIN_9
-49    0xA088    //RX_FDEQ_GAIN_10
-50    0x8888    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
+39    0x4836    //RX_FDEQ_GAIN_0
+40    0x3636    //RX_FDEQ_GAIN_1
+41    0x3C4A    //RX_FDEQ_GAIN_2
+42    0x5A78    //RX_FDEQ_GAIN_3
+43    0x849A    //RX_FDEQ_GAIN_4
+44    0x9C9A    //RX_FDEQ_GAIN_5
+45    0x948E    //RX_FDEQ_GAIN_6
+46    0x9086    //RX_FDEQ_GAIN_7
+47    0x8A94    //RX_FDEQ_GAIN_8
+48    0x929E    //RX_FDEQ_GAIN_9
+49    0x9080    //RX_FDEQ_GAIN_10
+50    0x7285    //RX_FDEQ_GAIN_11
+51    0x7868    //RX_FDEQ_GAIN_12
 52    0x6050    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -16899,9 +33228,9 @@
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+74    0x0F0E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -16961,21 +33290,21 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04C0    //RX_TDDRC_DRC_GAIN
+124    0x0378    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x807E    //RX_FDEQ_GAIN_5
-45    0x7E80    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x8890    //RX_FDEQ_GAIN_8
-48    0x929C    //RX_FDEQ_GAIN_9
-49    0xA088    //RX_FDEQ_GAIN_10
-50    0x8888    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
+39    0x4836    //RX_FDEQ_GAIN_0
+40    0x3636    //RX_FDEQ_GAIN_1
+41    0x3C4A    //RX_FDEQ_GAIN_2
+42    0x5A78    //RX_FDEQ_GAIN_3
+43    0x849A    //RX_FDEQ_GAIN_4
+44    0x9C9A    //RX_FDEQ_GAIN_5
+45    0x948E    //RX_FDEQ_GAIN_6
+46    0x9086    //RX_FDEQ_GAIN_7
+47    0x8A94    //RX_FDEQ_GAIN_8
+48    0x929E    //RX_FDEQ_GAIN_9
+49    0x9080    //RX_FDEQ_GAIN_10
+50    0x7285    //RX_FDEQ_GAIN_11
+51    0x7868    //RX_FDEQ_GAIN_12
 52    0x6050    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -16998,9 +33327,9 @@
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+74    0x0F0E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -17060,21 +33389,21 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04C0    //RX_TDDRC_DRC_GAIN
+124    0x0378    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x807E    //RX_FDEQ_GAIN_5
-45    0x7E80    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x8890    //RX_FDEQ_GAIN_8
-48    0x929C    //RX_FDEQ_GAIN_9
-49    0xA088    //RX_FDEQ_GAIN_10
-50    0x8888    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
+39    0x4836    //RX_FDEQ_GAIN_0
+40    0x3636    //RX_FDEQ_GAIN_1
+41    0x3C4A    //RX_FDEQ_GAIN_2
+42    0x5A78    //RX_FDEQ_GAIN_3
+43    0x849A    //RX_FDEQ_GAIN_4
+44    0x9C9A    //RX_FDEQ_GAIN_5
+45    0x948E    //RX_FDEQ_GAIN_6
+46    0x9086    //RX_FDEQ_GAIN_7
+47    0x8A94    //RX_FDEQ_GAIN_8
+48    0x929E    //RX_FDEQ_GAIN_9
+49    0x9080    //RX_FDEQ_GAIN_10
+50    0x7285    //RX_FDEQ_GAIN_11
+51    0x7868    //RX_FDEQ_GAIN_12
 52    0x6050    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -17097,9 +33426,9 @@
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+74    0x0F0E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -17134,7 +33463,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0022    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -17159,21 +33488,21 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04C0    //RX_TDDRC_DRC_GAIN
+124    0x0378    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x807E    //RX_FDEQ_GAIN_5
-45    0x7E80    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x8890    //RX_FDEQ_GAIN_8
-48    0x929C    //RX_FDEQ_GAIN_9
-49    0xA088    //RX_FDEQ_GAIN_10
-50    0x8888    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
+39    0x4836    //RX_FDEQ_GAIN_0
+40    0x3636    //RX_FDEQ_GAIN_1
+41    0x3C4A    //RX_FDEQ_GAIN_2
+42    0x5A78    //RX_FDEQ_GAIN_3
+43    0x849A    //RX_FDEQ_GAIN_4
+44    0x9C9A    //RX_FDEQ_GAIN_5
+45    0x948E    //RX_FDEQ_GAIN_6
+46    0x9086    //RX_FDEQ_GAIN_7
+47    0x8A94    //RX_FDEQ_GAIN_8
+48    0x929E    //RX_FDEQ_GAIN_9
+49    0x9080    //RX_FDEQ_GAIN_10
+50    0x7285    //RX_FDEQ_GAIN_11
+51    0x7868    //RX_FDEQ_GAIN_12
 52    0x6050    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -17196,9 +33525,9 @@
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+74    0x0F0E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -17233,7 +33562,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0039    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -17258,21 +33587,21 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04C0    //RX_TDDRC_DRC_GAIN
+124    0x0378    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x807E    //RX_FDEQ_GAIN_5
-45    0x7E80    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x8890    //RX_FDEQ_GAIN_8
-48    0x929C    //RX_FDEQ_GAIN_9
-49    0xA088    //RX_FDEQ_GAIN_10
-50    0x8888    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
+39    0x4836    //RX_FDEQ_GAIN_0
+40    0x3636    //RX_FDEQ_GAIN_1
+41    0x3C4A    //RX_FDEQ_GAIN_2
+42    0x5A78    //RX_FDEQ_GAIN_3
+43    0x849A    //RX_FDEQ_GAIN_4
+44    0x9C9A    //RX_FDEQ_GAIN_5
+45    0x948E    //RX_FDEQ_GAIN_6
+46    0x9086    //RX_FDEQ_GAIN_7
+47    0x8A94    //RX_FDEQ_GAIN_8
+48    0x929E    //RX_FDEQ_GAIN_9
+49    0x9080    //RX_FDEQ_GAIN_10
+50    0x7285    //RX_FDEQ_GAIN_11
+51    0x7868    //RX_FDEQ_GAIN_12
 52    0x6050    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -17295,9 +33624,9 @@
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+74    0x0F0E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -17332,7 +33661,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
+129    0x005D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -17357,21 +33686,21 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04C0    //RX_TDDRC_DRC_GAIN
+124    0x0378    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x807E    //RX_FDEQ_GAIN_5
-45    0x7E80    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x8890    //RX_FDEQ_GAIN_8
-48    0x929C    //RX_FDEQ_GAIN_9
-49    0xA088    //RX_FDEQ_GAIN_10
-50    0x8888    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
+39    0x4836    //RX_FDEQ_GAIN_0
+40    0x3636    //RX_FDEQ_GAIN_1
+41    0x3C4A    //RX_FDEQ_GAIN_2
+42    0x5A78    //RX_FDEQ_GAIN_3
+43    0x849A    //RX_FDEQ_GAIN_4
+44    0x9C9A    //RX_FDEQ_GAIN_5
+45    0x948E    //RX_FDEQ_GAIN_6
+46    0x9086    //RX_FDEQ_GAIN_7
+47    0x8A94    //RX_FDEQ_GAIN_8
+48    0x929E    //RX_FDEQ_GAIN_9
+49    0x9080    //RX_FDEQ_GAIN_10
+50    0x7285    //RX_FDEQ_GAIN_11
+51    0x7868    //RX_FDEQ_GAIN_12
 52    0x6050    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -17394,9 +33723,9 @@
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+74    0x0F0E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -17431,7 +33760,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
+129    0x0094    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -17456,21 +33785,21 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04C0    //RX_TDDRC_DRC_GAIN
+124    0x0378    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x807E    //RX_FDEQ_GAIN_5
-45    0x7E80    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x8890    //RX_FDEQ_GAIN_8
-48    0x929C    //RX_FDEQ_GAIN_9
-49    0xA088    //RX_FDEQ_GAIN_10
-50    0x8888    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
+39    0x4836    //RX_FDEQ_GAIN_0
+40    0x3636    //RX_FDEQ_GAIN_1
+41    0x3C4A    //RX_FDEQ_GAIN_2
+42    0x5A78    //RX_FDEQ_GAIN_3
+43    0x849A    //RX_FDEQ_GAIN_4
+44    0x9C9A    //RX_FDEQ_GAIN_5
+45    0x948E    //RX_FDEQ_GAIN_6
+46    0x9086    //RX_FDEQ_GAIN_7
+47    0x8A94    //RX_FDEQ_GAIN_8
+48    0x929E    //RX_FDEQ_GAIN_9
+49    0x9080    //RX_FDEQ_GAIN_10
+50    0x7285    //RX_FDEQ_GAIN_11
+51    0x7868    //RX_FDEQ_GAIN_12
 52    0x6050    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -17493,9 +33822,9 @@
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+74    0x0F0E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -17532,16 +33861,868 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0600    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x1000    //RX_LMT_THRD
+194    0x7FDF    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001E    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0031    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0050    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0086    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET-TMOBILE_US-SWB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
-2    0x0026    //TX_PATCH_REG
-3    0x6F7A    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
 7    0x0003    //TX_SAMPLINGFREQ_PROC
@@ -17558,7 +34739,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
+21    0x009C    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -17579,8 +34760,8 @@
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
 41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
 46    0x0000    //TX_MIC_PAIR_CH_05
@@ -17645,7 +34826,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -17769,13 +34950,13 @@
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0240    //TX_EPD_OFFSET_00
+232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
 234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -17788,12 +34969,12 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF700    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -17819,18 +35000,18 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x0016    //TX_NS_LVL_CTRL_1
+282    0x002C    //TX_NS_LVL_CTRL_1
 283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0018    //TX_NS_LVL_CTRL_4
-286    0x0016    //TX_NS_LVL_CTRL_5
-287    0x0012    //TX_NS_LVL_CTRL_6
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
 288    0x0017    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0012    //TX_MIN_GAIN_S_1
-291    0x0007    //TX_MIN_GAIN_S_2
-292    0x0012    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
 294    0x0012    //TX_MIN_GAIN_S_5
 295    0x0012    //TX_MIN_GAIN_S_6
 296    0x0012    //TX_MIN_GAIN_S_7
@@ -17838,12 +35019,12 @@
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
-302    0x6000    //TX_SNRI_SUP_2
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
 303    0x6000    //TX_SNRI_SUP_3
 304    0x6000    //TX_SNRI_SUP_4
 305    0x6000    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
+306    0x3000    //TX_SNRI_SUP_6
 307    0x6000    //TX_SNRI_SUP_7
 308    0x6000    //TX_THR_LFNS
 309    0x0017    //TX_G_LFNS
@@ -17852,29 +35033,29 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
+315    0x4000    //TX_A_POST_FILT_S_1
 316    0x4000    //TX_A_POST_FILT_S_2
 317    0x4000    //TX_A_POST_FILT_S_3
 318    0x4000    //TX_A_POST_FILT_S_4
 319    0x4000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
+320    0x5000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x3000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x5000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x6000    //TX_B_POST_FILT_6
+323    0x5000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
 329    0x3000    //TX_B_POST_FILT_7
 330    0x1000    //TX_B_LESSCUT_RTO_S_0
-331    0x6000    //TX_B_LESSCUT_RTO_S_1
-332    0x6000    //TX_B_LESSCUT_RTO_S_2
-333    0x6000    //TX_B_LESSCUT_RTO_S_3
-334    0x6000    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
 338    0x7E14    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
 340    0x7C29    //TX_LAMBDA_PFILT_S_1
@@ -17905,22 +35086,22 @@
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
 367    0x000A    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
-370    0x00C6    //TX_NOISE_TH_1
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x01F4    //TX_NOISE_TH_1
 371    0x0DAC    //TX_NOISE_TH_2
-372    0x2EE0    //TX_NOISE_TH_3
-373    0x47E0    //TX_NOISE_TH_4
+372    0x2134    //TX_NOISE_TH_3
+373    0x6978    //TX_NOISE_TH_4
 374    0x57E4    //TX_NOISE_TH_5
 375    0x4BD6    //TX_NOISE_TH_5_2
 376    0x0001    //TX_NOISE_TH_5_3
 377    0x4E20    //TX_NOISE_TH_5_4
-378    0x39DF    //TX_NOISE_TH_6
+378    0x1194    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
 385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
@@ -17928,15 +35109,15 @@
 388    0x0200    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0004    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -17947,7 +35128,7 @@
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x2900    //TX_MIN_G_CTRL_SSNS
 409    0x0800    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
+410    0x07D0    //TX_NS_FP_K_METAL
 411    0x3A98    //TX_NOISEDET_BOOST_TH
 412    0x0FA0    //TX_NSMOOTH_TH
 413    0x0000    //TX_NS_RESRV_8
@@ -17977,8 +35158,8 @@
 437    0x0032    //TX_SILENCE_T
 438    0x0000    //TX_A_POST_FLT_WTA
 439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x051E    //TX_SB_RHO_MEAN2_TH
-441    0x02F0    //TX_SB_RHO_MEAN3_TH
+440    0x03E8    //TX_SB_RHO_MEAN2_TH
+441    0x03E8    //TX_SB_RHO_MEAN3_TH
 442    0x0000    //TX_HS_RESRV_4
 443    0x0000    //TX_HS_RESRV_5
 444    0x0001    //TX_DOA_VAD_THR_1
@@ -18046,21 +35227,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -18089,37 +35270,37 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
 567    0x5C54    //TX_FDEQ_GAIN_0
 568    0x5048    //TX_FDEQ_GAIN_1
 569    0x4C4C    //TX_FDEQ_GAIN_2
-570    0x474A    //TX_FDEQ_GAIN_3
-571    0x3F3F    //TX_FDEQ_GAIN_4
-572    0x4245    //TX_FDEQ_GAIN_5
-573    0x4B53    //TX_FDEQ_GAIN_6
-574    0x5F3E    //TX_FDEQ_GAIN_7
-575    0x303A    //TX_FDEQ_GAIN_8
-576    0x3B3C    //TX_FDEQ_GAIN_9
-577    0x3C3E    //TX_FDEQ_GAIN_10
-578    0x4141    //TX_FDEQ_GAIN_11
-579    0x3D3E    //TX_FDEQ_GAIN_12
-580    0x4548    //TX_FDEQ_GAIN_13
-581    0x4F56    //TX_FDEQ_GAIN_14
-582    0x6548    //TX_FDEQ_GAIN_15
+570    0x494D    //TX_FDEQ_GAIN_3
+571    0x4846    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4C53    //TX_FDEQ_GAIN_6
+574    0x5C44    //TX_FDEQ_GAIN_7
+575    0x4348    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4A44    //TX_FDEQ_GAIN_10
+578    0x4442    //TX_FDEQ_GAIN_11
+579    0x443E    //TX_FDEQ_GAIN_12
+580    0x3E3D    //TX_FDEQ_GAIN_13
+581    0x3D54    //TX_FDEQ_GAIN_14
+582    0x6882    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
@@ -18154,19 +35335,19 @@
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
 616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4846    //TX_PREEQ_GAIN_MIC0_0
-618    0x4544    //TX_PREEQ_GAIN_MIC0_1
-619    0x4240    //TX_PREEQ_GAIN_MIC0_2
-620    0x3E3C    //TX_PREEQ_GAIN_MIC0_3
-621    0x3A38    //TX_PREEQ_GAIN_MIC0_4
-622    0x3635    //TX_PREEQ_GAIN_MIC0_5
-623    0x3330    //TX_PREEQ_GAIN_MIC0_6
-624    0x2E2A    //TX_PREEQ_GAIN_MIC0_7
-625    0x2625    //TX_PREEQ_GAIN_MIC0_8
-626    0x2421    //TX_PREEQ_GAIN_MIC0_9
-627    0x1D19    //TX_PREEQ_GAIN_MIC0_10
-628    0x1820    //TX_PREEQ_GAIN_MIC0_11
-629    0x2830    //TX_PREEQ_GAIN_MIC0_12
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
 630    0x4848    //TX_PREEQ_GAIN_MIC0_13
 631    0x4848    //TX_PREEQ_GAIN_MIC0_14
 632    0x4848    //TX_PREEQ_GAIN_MIC0_15
@@ -18210,16 +35391,16 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
 685    0x4848    //TX_PREEQ_GAIN_MIC1_19
@@ -18227,23 +35408,23 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
 696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -18403,7 +35584,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0550    //TX_TDDRC_DRC_GAIN
+866    0x0715    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -18434,8 +35615,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x03E8    //TX_MICMUTE_RATIO_THR
+900    0x01A4    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7F00    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0x3FFF    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x002C    //RX_RECVFUNC_MODE_0
+0    0x243C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -18445,7 +35691,7 @@
 7    0x1000    //RX_TDDRC_ALPHA_UP_2
 8    0x1000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0600    //RX_PGA
+10    0x05AA    //RX_PGA
 11    0x7FFF    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x5800    //RX_THR_PITCH_DET_0
@@ -18460,7 +35706,7 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -18474,22 +35720,22 @@
 36    0x0000    //RX_LMT_THRD
 37    0x4000    //RX_LMT_ALPHA
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x8484    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x9094    //RX_FDEQ_GAIN_7
-47    0x98A4    //RX_FDEQ_GAIN_8
-48    0xA4AC    //RX_FDEQ_GAIN_9
-49    0xAC98    //RX_FDEQ_GAIN_10
-50    0x9088    //RX_FDEQ_GAIN_11
-51    0x746C    //RX_FDEQ_GAIN_12
-52    0x7050    //RX_FDEQ_GAIN_13
-53    0x7080    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x5064    //RX_FDEQ_GAIN_3
+43    0x7076    //RX_FDEQ_GAIN_4
+44    0x897A    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8888    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x96A4    //RX_FDEQ_GAIN_9
+49    0xA9A0    //RX_FDEQ_GAIN_10
+50    0x9487    //RX_FDEQ_GAIN_11
+51    0x6F64    //RX_FDEQ_GAIN_12
+52    0x625A    //RX_FDEQ_GAIN_13
+53    0x5D80    //RX_FDEQ_GAIN_14
+54    0x8890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -18500,19 +35746,19 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x1013    //RX_FDEQ_BIN_10
 74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -18551,20 +35797,20 @@
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x0551    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+126    0x1450    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0850    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -18607,32 +35853,32 @@
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03B8    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x8484    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x9094    //RX_FDEQ_GAIN_7
-47    0x98A4    //RX_FDEQ_GAIN_8
-48    0xA4AC    //RX_FDEQ_GAIN_9
-49    0xAC98    //RX_FDEQ_GAIN_10
-50    0x9088    //RX_FDEQ_GAIN_11
-51    0x746C    //RX_FDEQ_GAIN_12
-52    0x7050    //RX_FDEQ_GAIN_13
-53    0x7080    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x4654    //RX_FDEQ_GAIN_2
+42    0x6076    //RX_FDEQ_GAIN_3
+43    0x8EA2    //RX_FDEQ_GAIN_4
+44    0xA2A0    //RX_FDEQ_GAIN_5
+45    0x9498    //RX_FDEQ_GAIN_6
+46    0x9C94    //RX_FDEQ_GAIN_7
+47    0xAAB2    //RX_FDEQ_GAIN_8
+48    0xB0B4    //RX_FDEQ_GAIN_9
+49    0xC5C2    //RX_FDEQ_GAIN_10
+50    0x998D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x484B    //RX_FDEQ_GAIN_14
+54    0x4E90    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -18643,19 +35889,19 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -18706,32 +35952,32 @@
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03B8    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x8484    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x9094    //RX_FDEQ_GAIN_7
-47    0x98A4    //RX_FDEQ_GAIN_8
-48    0xA4AC    //RX_FDEQ_GAIN_9
-49    0xAC98    //RX_FDEQ_GAIN_10
-50    0x9088    //RX_FDEQ_GAIN_11
-51    0x746C    //RX_FDEQ_GAIN_12
-52    0x7050    //RX_FDEQ_GAIN_13
-53    0x7080    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x4654    //RX_FDEQ_GAIN_2
+42    0x6076    //RX_FDEQ_GAIN_3
+43    0x8EA2    //RX_FDEQ_GAIN_4
+44    0xA2A0    //RX_FDEQ_GAIN_5
+45    0x9498    //RX_FDEQ_GAIN_6
+46    0x9C94    //RX_FDEQ_GAIN_7
+47    0xAAB2    //RX_FDEQ_GAIN_8
+48    0xB0B4    //RX_FDEQ_GAIN_9
+49    0xC5C2    //RX_FDEQ_GAIN_10
+50    0x998D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x484B    //RX_FDEQ_GAIN_14
+54    0x4E90    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -18742,19 +35988,19 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -18805,32 +36051,32 @@
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03B8    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x8484    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x9094    //RX_FDEQ_GAIN_7
-47    0x98A4    //RX_FDEQ_GAIN_8
-48    0xA4AC    //RX_FDEQ_GAIN_9
-49    0xAC98    //RX_FDEQ_GAIN_10
-50    0x9088    //RX_FDEQ_GAIN_11
-51    0x746C    //RX_FDEQ_GAIN_12
-52    0x7050    //RX_FDEQ_GAIN_13
-53    0x7080    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x4654    //RX_FDEQ_GAIN_2
+42    0x6076    //RX_FDEQ_GAIN_3
+43    0x8EA2    //RX_FDEQ_GAIN_4
+44    0xA2A0    //RX_FDEQ_GAIN_5
+45    0x9498    //RX_FDEQ_GAIN_6
+46    0x9C94    //RX_FDEQ_GAIN_7
+47    0xAAB2    //RX_FDEQ_GAIN_8
+48    0xB0B4    //RX_FDEQ_GAIN_9
+49    0xC5C2    //RX_FDEQ_GAIN_10
+50    0x998D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x484B    //RX_FDEQ_GAIN_14
+54    0x4E90    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -18841,19 +36087,19 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -18887,7 +36133,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0022    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -18904,32 +36150,32 @@
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03B8    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x8484    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x9094    //RX_FDEQ_GAIN_7
-47    0x98A4    //RX_FDEQ_GAIN_8
-48    0xA4AC    //RX_FDEQ_GAIN_9
-49    0xAC98    //RX_FDEQ_GAIN_10
-50    0x9088    //RX_FDEQ_GAIN_11
-51    0x746C    //RX_FDEQ_GAIN_12
-52    0x7050    //RX_FDEQ_GAIN_13
-53    0x7080    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x4654    //RX_FDEQ_GAIN_2
+42    0x6076    //RX_FDEQ_GAIN_3
+43    0x8EA2    //RX_FDEQ_GAIN_4
+44    0xA2A0    //RX_FDEQ_GAIN_5
+45    0x9498    //RX_FDEQ_GAIN_6
+46    0x9C94    //RX_FDEQ_GAIN_7
+47    0xAAB2    //RX_FDEQ_GAIN_8
+48    0xB0B4    //RX_FDEQ_GAIN_9
+49    0xC5C2    //RX_FDEQ_GAIN_10
+50    0x998D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x484B    //RX_FDEQ_GAIN_14
+54    0x4E90    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -18940,19 +36186,19 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -18986,7 +36232,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0039    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -19003,32 +36249,32 @@
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03B8    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x8484    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x9094    //RX_FDEQ_GAIN_7
-47    0x98A4    //RX_FDEQ_GAIN_8
-48    0xA4AC    //RX_FDEQ_GAIN_9
-49    0xAC98    //RX_FDEQ_GAIN_10
-50    0x9088    //RX_FDEQ_GAIN_11
-51    0x746C    //RX_FDEQ_GAIN_12
-52    0x7050    //RX_FDEQ_GAIN_13
-53    0x7080    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x4654    //RX_FDEQ_GAIN_2
+42    0x6076    //RX_FDEQ_GAIN_3
+43    0x8EA2    //RX_FDEQ_GAIN_4
+44    0xA2A0    //RX_FDEQ_GAIN_5
+45    0x9498    //RX_FDEQ_GAIN_6
+46    0x9C94    //RX_FDEQ_GAIN_7
+47    0xAAB2    //RX_FDEQ_GAIN_8
+48    0xB0B4    //RX_FDEQ_GAIN_9
+49    0xC5C2    //RX_FDEQ_GAIN_10
+50    0x998D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x484B    //RX_FDEQ_GAIN_14
+54    0x4E90    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -19039,19 +36285,19 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -19085,7 +36331,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
+129    0x005D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -19102,32 +36348,32 @@
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03B8    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x8484    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x9094    //RX_FDEQ_GAIN_7
-47    0x98A4    //RX_FDEQ_GAIN_8
-48    0xA4AC    //RX_FDEQ_GAIN_9
-49    0xAC98    //RX_FDEQ_GAIN_10
-50    0x9088    //RX_FDEQ_GAIN_11
-51    0x746C    //RX_FDEQ_GAIN_12
-52    0x7050    //RX_FDEQ_GAIN_13
-53    0x7080    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x4654    //RX_FDEQ_GAIN_2
+42    0x6076    //RX_FDEQ_GAIN_3
+43    0x8EA2    //RX_FDEQ_GAIN_4
+44    0xA2A0    //RX_FDEQ_GAIN_5
+45    0x9498    //RX_FDEQ_GAIN_6
+46    0x9C94    //RX_FDEQ_GAIN_7
+47    0xAAB2    //RX_FDEQ_GAIN_8
+48    0xB0B4    //RX_FDEQ_GAIN_9
+49    0xC5C2    //RX_FDEQ_GAIN_10
+50    0x998D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x484B    //RX_FDEQ_GAIN_14
+54    0x4E90    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -19138,19 +36384,19 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -19184,7 +36430,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
+129    0x0094    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -19201,32 +36447,32 @@
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03B8    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x485C    //RX_FDEQ_GAIN_2
-42    0x6C78    //RX_FDEQ_GAIN_3
-43    0x8490    //RX_FDEQ_GAIN_4
-44    0x8484    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x9094    //RX_FDEQ_GAIN_7
-47    0x98A4    //RX_FDEQ_GAIN_8
-48    0xA4AC    //RX_FDEQ_GAIN_9
-49    0xAC98    //RX_FDEQ_GAIN_10
-50    0x9088    //RX_FDEQ_GAIN_11
-51    0x746C    //RX_FDEQ_GAIN_12
-52    0x7050    //RX_FDEQ_GAIN_13
-53    0x7080    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x4654    //RX_FDEQ_GAIN_2
+42    0x6076    //RX_FDEQ_GAIN_3
+43    0x8EA2    //RX_FDEQ_GAIN_4
+44    0xA2A0    //RX_FDEQ_GAIN_5
+45    0x9498    //RX_FDEQ_GAIN_6
+46    0x9C94    //RX_FDEQ_GAIN_7
+47    0xAAB2    //RX_FDEQ_GAIN_8
+48    0xB0B4    //RX_FDEQ_GAIN_9
+49    0xC5C2    //RX_FDEQ_GAIN_10
+50    0x998D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x484B    //RX_FDEQ_GAIN_14
+54    0x4E90    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -19237,19 +36483,19 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -19285,15 +36531,867 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x05AA    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0032    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0047    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0076    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET-TMOBILE_US-FB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0026    //TX_PATCH_REG
-3    0x6B7A    //TX_SENDFUNC_MODE_0
+3    0x6B7E    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0004    //TX_SAMPLINGFREQ_SIG
@@ -19311,7 +37409,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
+21    0x009C    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -19332,8 +37430,8 @@
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
 41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
 46    0x0000    //TX_MIC_PAIR_CH_05
@@ -19398,7 +37496,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -19522,13 +37620,13 @@
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0360    //TX_EPD_OFFSET_00
+232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
 234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -19541,12 +37639,12 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF700    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -19574,16 +37672,16 @@
 281    0x0014    //TX_NS_LVL_CTRL_0
 282    0x0016    //TX_NS_LVL_CTRL_1
 283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0018    //TX_NS_LVL_CTRL_4
-286    0x0016    //TX_NS_LVL_CTRL_5
-287    0x0012    //TX_NS_LVL_CTRL_6
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
 288    0x0017    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0012    //TX_MIN_GAIN_S_1
-291    0x0007    //TX_MIN_GAIN_S_2
-292    0x0012    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
+290    0x0007    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
 294    0x0012    //TX_MIN_GAIN_S_5
 295    0x0012    //TX_MIN_GAIN_S_6
 296    0x0012    //TX_MIN_GAIN_S_7
@@ -19605,29 +37703,29 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
+315    0x4000    //TX_A_POST_FILT_S_1
 316    0x4000    //TX_A_POST_FILT_S_2
 317    0x4000    //TX_A_POST_FILT_S_3
 318    0x4000    //TX_A_POST_FILT_S_4
 319    0x4000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
+320    0x5000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x2000    //TX_B_POST_FILT_1
-324    0x3000    //TX_B_POST_FILT_2
+324    0x2000    //TX_B_POST_FILT_2
 325    0x2000    //TX_B_POST_FILT_3
-326    0x5000    //TX_B_POST_FILT_4
+326    0x2000    //TX_B_POST_FILT_4
 327    0x2000    //TX_B_POST_FILT_5
-328    0x6000    //TX_B_POST_FILT_6
+328    0x3000    //TX_B_POST_FILT_6
 329    0x3000    //TX_B_POST_FILT_7
 330    0x1000    //TX_B_LESSCUT_RTO_S_0
-331    0x6000    //TX_B_LESSCUT_RTO_S_1
-332    0x6000    //TX_B_LESSCUT_RTO_S_2
-333    0x6000    //TX_B_LESSCUT_RTO_S_3
-334    0x6000    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
 338    0x7E14    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
 340    0x7C29    //TX_LAMBDA_PFILT_S_1
@@ -19670,10 +37768,10 @@
 377    0x4E20    //TX_NOISE_TH_5_4
 378    0x39DF    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
 384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
 385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
@@ -19681,15 +37779,15 @@
 388    0x0200    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0004    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -19804,16 +37902,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x7FFF    //TX_GSC_RTOL_TH
+522    0x7FFF    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -19842,38 +37940,38 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4854    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x5454    //TX_FDEQ_GAIN_5
-573    0x5454    //TX_FDEQ_GAIN_6
-574    0x6048    //TX_FDEQ_GAIN_7
-575    0x5454    //TX_FDEQ_GAIN_8
-576    0x6464    //TX_FDEQ_GAIN_9
-577    0x6464    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x9898    //TX_FDEQ_GAIN_12
-580    0x9898    //TX_FDEQ_GAIN_13
-581    0x9898    //TX_FDEQ_GAIN_14
-582    0x9898    //TX_FDEQ_GAIN_15
-583    0x9898    //TX_FDEQ_GAIN_16
+567    0x4C4A    //TX_FDEQ_GAIN_0
+568    0x4B4F    //TX_FDEQ_GAIN_1
+569    0x504B    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4A49    //TX_FDEQ_GAIN_4
+572    0x4F48    //TX_FDEQ_GAIN_5
+573    0x4A4E    //TX_FDEQ_GAIN_6
+574    0x534E    //TX_FDEQ_GAIN_7
+575    0x494F    //TX_FDEQ_GAIN_8
+576    0x5E6E    //TX_FDEQ_GAIN_9
+577    0x787A    //TX_FDEQ_GAIN_10
+578    0x6A58    //TX_FDEQ_GAIN_11
+579    0x5051    //TX_FDEQ_GAIN_12
+580    0x5156    //TX_FDEQ_GAIN_13
+581    0x6168    //TX_FDEQ_GAIN_14
+582    0x7678    //TX_FDEQ_GAIN_15
+583    0x7A87    //TX_FDEQ_GAIN_16
 584    0x9898    //TX_FDEQ_GAIN_17
 585    0x9898    //TX_FDEQ_GAIN_18
 586    0x9848    //TX_FDEQ_GAIN_19
@@ -19907,19 +38005,19 @@
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
 616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4846    //TX_PREEQ_GAIN_MIC0_0
-618    0x4544    //TX_PREEQ_GAIN_MIC0_1
-619    0x4240    //TX_PREEQ_GAIN_MIC0_2
-620    0x3E3C    //TX_PREEQ_GAIN_MIC0_3
-621    0x3A38    //TX_PREEQ_GAIN_MIC0_4
-622    0x3635    //TX_PREEQ_GAIN_MIC0_5
-623    0x3330    //TX_PREEQ_GAIN_MIC0_6
-624    0x2E2A    //TX_PREEQ_GAIN_MIC0_7
-625    0x2625    //TX_PREEQ_GAIN_MIC0_8
-626    0x2421    //TX_PREEQ_GAIN_MIC0_9
-627    0x1D19    //TX_PREEQ_GAIN_MIC0_10
-628    0x1820    //TX_PREEQ_GAIN_MIC0_11
-629    0x2830    //TX_PREEQ_GAIN_MIC0_12
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
 630    0x4848    //TX_PREEQ_GAIN_MIC0_13
 631    0x4848    //TX_PREEQ_GAIN_MIC0_14
 632    0x4848    //TX_PREEQ_GAIN_MIC0_15
@@ -19962,15 +38060,15 @@
 669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+672    0x4A4C    //TX_PREEQ_GAIN_MIC1_6
+673    0x4E50    //TX_PREEQ_GAIN_MIC1_7
+674    0x5456    //TX_PREEQ_GAIN_MIC1_8
+675    0x585C    //TX_PREEQ_GAIN_MIC1_9
+676    0x5C64    //TX_PREEQ_GAIN_MIC1_10
+677    0x7478    //TX_PREEQ_GAIN_MIC1_11
+678    0x705C    //TX_PREEQ_GAIN_MIC1_12
+679    0x4838    //TX_PREEQ_GAIN_MIC1_13
+680    0x3C70    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
@@ -19980,22 +38078,22 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x1414    //TX_PREEQ_BIN_MIC1_12
+703    0x1C1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x462C    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
@@ -20156,7 +38254,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x03A0    //TX_TDDRC_DRC_GAIN
+866    0x0504    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -20187,8 +38285,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x001C    //RX_RECVFUNC_MODE_0
+0    0x202C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0004    //RX_SAMPLINGFREQ_SIG
 3    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -20198,7 +38361,7 @@
 7    0x1000    //RX_TDDRC_ALPHA_UP_2
 8    0x1000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x064E    //RX_PGA
+10    0x0722    //RX_PGA
 11    0x7FFF    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x5800    //RX_THR_PITCH_DET_0
@@ -20213,7 +38376,7 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -20227,22 +38390,22 @@
 36    0x0000    //RX_LMT_THRD
 37    0x4000    //RX_LMT_ALPHA
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8549    //RX_FDEQ_GAIN_0
-40    0x494A    //RX_FDEQ_GAIN_1
-41    0x6168    //RX_FDEQ_GAIN_2
-42    0x686E    //RX_FDEQ_GAIN_3
-43    0x746E    //RX_FDEQ_GAIN_4
-44    0x6E62    //RX_FDEQ_GAIN_5
-45    0x686C    //RX_FDEQ_GAIN_6
-46    0x6E82    //RX_FDEQ_GAIN_7
-47    0x8086    //RX_FDEQ_GAIN_8
-48    0x9092    //RX_FDEQ_GAIN_9
-49    0x9C98    //RX_FDEQ_GAIN_10
-50    0x8486    //RX_FDEQ_GAIN_11
-51    0x6858    //RX_FDEQ_GAIN_12
-52    0x5048    //RX_FDEQ_GAIN_13
-53    0x3428    //RX_FDEQ_GAIN_14
-54    0x5484    //RX_FDEQ_GAIN_15
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -20312,12 +38475,12 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+126    0x1964    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x000D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -20368,24 +38531,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8549    //RX_FDEQ_GAIN_0
-40    0x494A    //RX_FDEQ_GAIN_1
-41    0x6168    //RX_FDEQ_GAIN_2
-42    0x686E    //RX_FDEQ_GAIN_3
-43    0x746E    //RX_FDEQ_GAIN_4
-44    0x6E62    //RX_FDEQ_GAIN_5
-45    0x686C    //RX_FDEQ_GAIN_6
-46    0x6E82    //RX_FDEQ_GAIN_7
-47    0x8086    //RX_FDEQ_GAIN_8
-48    0x9092    //RX_FDEQ_GAIN_9
-49    0x9C98    //RX_FDEQ_GAIN_10
-50    0x8486    //RX_FDEQ_GAIN_11
-51    0x6858    //RX_FDEQ_GAIN_12
-52    0x5048    //RX_FDEQ_GAIN_13
-53    0x3428    //RX_FDEQ_GAIN_14
-54    0x5484    //RX_FDEQ_GAIN_15
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -20442,7 +38605,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
+129    0x000D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -20467,24 +38630,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8549    //RX_FDEQ_GAIN_0
-40    0x494A    //RX_FDEQ_GAIN_1
-41    0x6168    //RX_FDEQ_GAIN_2
-42    0x686E    //RX_FDEQ_GAIN_3
-43    0x746E    //RX_FDEQ_GAIN_4
-44    0x6E62    //RX_FDEQ_GAIN_5
-45    0x686C    //RX_FDEQ_GAIN_6
-46    0x6E82    //RX_FDEQ_GAIN_7
-47    0x8086    //RX_FDEQ_GAIN_8
-48    0x9092    //RX_FDEQ_GAIN_9
-49    0x9C98    //RX_FDEQ_GAIN_10
-50    0x8486    //RX_FDEQ_GAIN_11
-51    0x6858    //RX_FDEQ_GAIN_12
-52    0x5048    //RX_FDEQ_GAIN_13
-53    0x3428    //RX_FDEQ_GAIN_14
-54    0x5484    //RX_FDEQ_GAIN_15
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -20541,7 +38704,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0016    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -20566,24 +38729,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8549    //RX_FDEQ_GAIN_0
-40    0x494A    //RX_FDEQ_GAIN_1
-41    0x6168    //RX_FDEQ_GAIN_2
-42    0x686E    //RX_FDEQ_GAIN_3
-43    0x746E    //RX_FDEQ_GAIN_4
-44    0x6E62    //RX_FDEQ_GAIN_5
-45    0x686C    //RX_FDEQ_GAIN_6
-46    0x6E82    //RX_FDEQ_GAIN_7
-47    0x8086    //RX_FDEQ_GAIN_8
-48    0x9092    //RX_FDEQ_GAIN_9
-49    0x9C98    //RX_FDEQ_GAIN_10
-50    0x8486    //RX_FDEQ_GAIN_11
-51    0x6858    //RX_FDEQ_GAIN_12
-52    0x5048    //RX_FDEQ_GAIN_13
-53    0x3428    //RX_FDEQ_GAIN_14
-54    0x5484    //RX_FDEQ_GAIN_15
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -20640,7 +38803,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0024    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -20665,24 +38828,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8549    //RX_FDEQ_GAIN_0
-40    0x494A    //RX_FDEQ_GAIN_1
-41    0x6168    //RX_FDEQ_GAIN_2
-42    0x686E    //RX_FDEQ_GAIN_3
-43    0x746E    //RX_FDEQ_GAIN_4
-44    0x6E62    //RX_FDEQ_GAIN_5
-45    0x686C    //RX_FDEQ_GAIN_6
-46    0x6E82    //RX_FDEQ_GAIN_7
-47    0x8086    //RX_FDEQ_GAIN_8
-48    0x9092    //RX_FDEQ_GAIN_9
-49    0x9C98    //RX_FDEQ_GAIN_10
-50    0x8486    //RX_FDEQ_GAIN_11
-51    0x6858    //RX_FDEQ_GAIN_12
-52    0x5048    //RX_FDEQ_GAIN_13
-53    0x3428    //RX_FDEQ_GAIN_14
-54    0x5484    //RX_FDEQ_GAIN_15
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -20739,7 +38902,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x003A    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -20764,24 +38927,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8549    //RX_FDEQ_GAIN_0
-40    0x494A    //RX_FDEQ_GAIN_1
-41    0x6168    //RX_FDEQ_GAIN_2
-42    0x686E    //RX_FDEQ_GAIN_3
-43    0x746E    //RX_FDEQ_GAIN_4
-44    0x6E62    //RX_FDEQ_GAIN_5
-45    0x686C    //RX_FDEQ_GAIN_6
-46    0x6E82    //RX_FDEQ_GAIN_7
-47    0x8086    //RX_FDEQ_GAIN_8
-48    0x9092    //RX_FDEQ_GAIN_9
-49    0x9C98    //RX_FDEQ_GAIN_10
-50    0x8486    //RX_FDEQ_GAIN_11
-51    0x6858    //RX_FDEQ_GAIN_12
-52    0x5048    //RX_FDEQ_GAIN_13
-53    0x3428    //RX_FDEQ_GAIN_14
-54    0x5484    //RX_FDEQ_GAIN_15
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -20838,7 +39001,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
+129    0x0059    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -20863,24 +39026,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8549    //RX_FDEQ_GAIN_0
-40    0x494A    //RX_FDEQ_GAIN_1
-41    0x6168    //RX_FDEQ_GAIN_2
-42    0x686E    //RX_FDEQ_GAIN_3
-43    0x746E    //RX_FDEQ_GAIN_4
-44    0x6E62    //RX_FDEQ_GAIN_5
-45    0x686C    //RX_FDEQ_GAIN_6
-46    0x6E82    //RX_FDEQ_GAIN_7
-47    0x8086    //RX_FDEQ_GAIN_8
-48    0x9092    //RX_FDEQ_GAIN_9
-49    0x9C98    //RX_FDEQ_GAIN_10
-50    0x8486    //RX_FDEQ_GAIN_11
-51    0x6858    //RX_FDEQ_GAIN_12
-52    0x5048    //RX_FDEQ_GAIN_13
-53    0x3428    //RX_FDEQ_GAIN_14
-54    0x5484    //RX_FDEQ_GAIN_15
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -20937,7 +39100,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
+129    0x0090    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -20962,24 +39125,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8549    //RX_FDEQ_GAIN_0
-40    0x494A    //RX_FDEQ_GAIN_1
-41    0x6168    //RX_FDEQ_GAIN_2
-42    0x686E    //RX_FDEQ_GAIN_3
-43    0x746E    //RX_FDEQ_GAIN_4
-44    0x6E62    //RX_FDEQ_GAIN_5
-45    0x686C    //RX_FDEQ_GAIN_6
-46    0x6E82    //RX_FDEQ_GAIN_7
-47    0x8086    //RX_FDEQ_GAIN_8
-48    0x9092    //RX_FDEQ_GAIN_9
-49    0x9C98    //RX_FDEQ_GAIN_10
-50    0x8486    //RX_FDEQ_GAIN_11
-51    0x6858    //RX_FDEQ_GAIN_12
-52    0x5048    //RX_FDEQ_GAIN_13
-53    0x3428    //RX_FDEQ_GAIN_14
-54    0x5484    //RX_FDEQ_GAIN_15
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -21038,16 +39201,868 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x002C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0722    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x1964    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0016    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0024    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x003A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0059    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0090    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET_HAC-TMOBILE_US-NB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
-2    0x0036    //TX_PATCH_REG
-3    0x6F7A    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0000    //TX_SAMPLINGFREQ_SIG
 7    0x0000    //TX_SAMPLINGFREQ_PROC
@@ -21064,7 +40079,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
+21    0x009C    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -21085,8 +40100,8 @@
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
 41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
 46    0x0000    //TX_MIC_PAIR_CH_05
@@ -21151,7 +40166,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -21275,13 +40290,13 @@
 229    0x2000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0025    //TX_EPD_OFFSET_00
+232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
 234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -21294,19 +40309,19 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF700    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x01A0    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x01A0    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x01A0    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0000    //TX_DELTA_THR_SN_EST_5
+256    0x01A0    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x3000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
+259    0x3000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x3000    //TX_LAMBDA_NN_EST_3
 262    0x3000    //TX_LAMBDA_NN_EST_4
-263    0x3000    //TX_LAMBDA_NN_EST_5
+263    0x4000    //TX_LAMBDA_NN_EST_5
 264    0x4000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
@@ -21325,20 +40340,20 @@
 279    0x4000    //TX_B_POST_FLT_0
 280    0x4000    //TX_B_POST_FLT_1
 281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x001B    //TX_NS_LVL_CTRL_1
-283    0x0019    //TX_NS_LVL_CTRL_2
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x001B    //TX_NS_LVL_CTRL_2
 284    0x0017    //TX_NS_LVL_CTRL_3
-285    0x0017    //TX_NS_LVL_CTRL_4
-286    0x0019    //TX_NS_LVL_CTRL_5
-287    0x0014    //TX_NS_LVL_CTRL_6
+285    0x0019    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x001B    //TX_NS_LVL_CTRL_6
 288    0x0010    //TX_NS_LVL_CTRL_7
 289    0x0010    //TX_MIN_GAIN_S_0
 290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
+291    0x0010    //TX_MIN_GAIN_S_2
 292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x0014    //TX_MIN_GAIN_S_6
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
 296    0x0014    //TX_MIN_GAIN_S_7
 297    0x5000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
@@ -21348,8 +40363,8 @@
 302    0x4000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
 307    0x3000    //TX_SNRI_SUP_7
 308    0x3000    //TX_THR_LFNS
 309    0x001A    //TX_G_LFNS
@@ -21358,36 +40373,36 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x2000    //TX_A_POST_FILT_S_0
-315    0x7000    //TX_A_POST_FILT_S_1
-316    0x6000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x2000    //TX_A_POST_FILT_S_4
-319    0x6000    //TX_A_POST_FILT_S_5
-320    0x2000    //TX_A_POST_FILT_S_6
+315    0x2000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x2000    //TX_A_POST_FILT_S_5
+320    0x7000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x4000    //TX_B_POST_FILT_0
-323    0x4000    //TX_B_POST_FILT_1
-324    0x7FFF    //TX_B_POST_FILT_2
-325    0x5000    //TX_B_POST_FILT_3
-326    0x7FFF    //TX_B_POST_FILT_4
-327    0x7FFF    //TX_B_POST_FILT_5
+323    0x2000    //TX_B_POST_FILT_1
+324    0x5000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
 328    0x4000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
 338    0x7E14    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7200    //TX_LAMBDA_PFILT_S_2
-342    0x7900    //TX_LAMBDA_PFILT_S_3
-343    0x7400    //TX_LAMBDA_PFILT_S_4
-344    0x7200    //TX_LAMBDA_PFILT_S_5
+340    0x7200    //TX_LAMBDA_PFILT_S_1
+341    0x7800    //TX_LAMBDA_PFILT_S_2
+342    0x7400    //TX_LAMBDA_PFILT_S_3
+343    0x7200    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
 345    0x7C29    //TX_LAMBDA_PFILT_S_6
 346    0x7C29    //TX_LAMBDA_PFILT_S_7
 347    0x0200    //TX_K_PEPPER
@@ -21415,18 +40430,18 @@
 369    0x2134    //TX_NOISE_TH_0_3
 370    0x0320    //TX_NOISE_TH_1
 371    0x022C    //TX_NOISE_TH_2
-372    0x2710    //TX_NOISE_TH_3
-373    0x1B58    //TX_NOISE_TH_4
+372    0x2260    //TX_NOISE_TH_3
+373    0x6B6C    //TX_NOISE_TH_4
 374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x0000    //TX_NOISE_TH_5_4
-378    0x0640    //TX_NOISE_TH_6
+378    0x07D0    //TX_NOISE_TH_6
 379    0x0004    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
 385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
@@ -21434,15 +40449,15 @@
 388    0x00CE    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0001    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -21471,7 +40486,7 @@
 425    0x0280    //TX_SB_RHO_MEAN_TH_NTALK
 426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
 427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0990    //TX_WTA_EN_RTO_TH
+428    0x0100    //TX_WTA_EN_RTO_TH
 429    0x1400    //TX_TOP_ENER_TH_F
 430    0x0100    //TX_DESIRED_TALK_HOLDT
 431    0x0800    //TX_MIC_BLOCK_FACTOR
@@ -21483,8 +40498,8 @@
 437    0x0032    //TX_SILENCE_T
 438    0x0000    //TX_A_POST_FLT_WTA
 439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0640    //TX_SB_RHO_MEAN3_TH
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0666    //TX_SB_RHO_MEAN3_TH
 442    0x0000    //TX_HS_RESRV_4
 443    0x0000    //TX_HS_RESRV_5
 444    0x003C    //TX_DOA_VAD_THR_1
@@ -21552,21 +40567,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x6000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -21595,19 +40610,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0018    //TX_FDEQ_SUBNUM
 567    0x6C60    //TX_FDEQ_GAIN_0
@@ -21615,10 +40630,10 @@
 569    0x4F4E    //TX_FDEQ_GAIN_2
 570    0x474A    //TX_FDEQ_GAIN_3
 571    0x473F    //TX_FDEQ_GAIN_4
-572    0x4240    //TX_FDEQ_GAIN_5
-573    0x4040    //TX_FDEQ_GAIN_6
-574    0x3630    //TX_FDEQ_GAIN_7
-575    0x2020    //TX_FDEQ_GAIN_8
+572    0x3E40    //TX_FDEQ_GAIN_5
+573    0x403C    //TX_FDEQ_GAIN_6
+574    0x3431    //TX_FDEQ_GAIN_7
+575    0x2424    //TX_FDEQ_GAIN_8
 576    0x383C    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
@@ -21643,7 +40658,7 @@
 597    0x0808    //TX_FDEQ_BIN_6
 598    0x050E    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0F0F    //TX_FDEQ_BIN_9
+600    0x0F09    //TX_FDEQ_BIN_9
 601    0x0000    //TX_FDEQ_BIN_10
 602    0x0000    //TX_FDEQ_BIN_11
 603    0x0000    //TX_FDEQ_BIN_12
@@ -21660,10 +40675,10 @@
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
 616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4846    //TX_PREEQ_GAIN_MIC0_0
-618    0x4544    //TX_PREEQ_GAIN_MIC0_1
-619    0x4240    //TX_PREEQ_GAIN_MIC0_2
-620    0x3E48    //TX_PREEQ_GAIN_MIC0_3
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
 621    0x4848    //TX_PREEQ_GAIN_MIC0_4
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
 623    0x4848    //TX_PREEQ_GAIN_MIC0_6
@@ -21715,9 +40730,9 @@
 669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+672    0x4A4A    //TX_PREEQ_GAIN_MIC1_6
+673    0x4B4B    //TX_PREEQ_GAIN_MIC1_7
+674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
 675    0x4848    //TX_PREEQ_GAIN_MIC1_9
 676    0x4848    //TX_PREEQ_GAIN_MIC1_10
 677    0x4848    //TX_PREEQ_GAIN_MIC1_11
@@ -21733,22 +40748,22 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
@@ -21818,8 +40833,8 @@
 772    0x0044    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
 774    0x0000    //TX_GAIN_LIMIT_1
-775    0x0006    //TX_GAIN_LIMIT_2
-776    0x0006    //TX_GAIN_LIMIT_3
+775    0x0007    //TX_GAIN_LIMIT_2
+776    0x0007    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -21909,7 +40924,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0550    //TX_TDDRC_DRC_GAIN
+866    0x0650    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -21940,6 +40955,71 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x00A0    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0012    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7F00    //TX_DTD_THR1_MICMUTE_0
+912    0x7900    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0x3FFF    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
 0    0x000C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -21966,7 +41046,7 @@
 22    0x0014    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -22791,16 +41871,868 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x000C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C48    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0303    //RX_FDEQ_BIN_3
+224    0x0303    //RX_FDEQ_BIN_4
+225    0x0303    //RX_FDEQ_BIN_5
+226    0x0303    //RX_FDEQ_BIN_6
+227    0x0303    //RX_FDEQ_BIN_7
+228    0x0A0A    //RX_FDEQ_BIN_8
+229    0x0A0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0360    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0360    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C48    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0303    //RX_FDEQ_BIN_3
+224    0x0303    //RX_FDEQ_BIN_4
+225    0x0303    //RX_FDEQ_BIN_5
+226    0x0303    //RX_FDEQ_BIN_6
+227    0x0303    //RX_FDEQ_BIN_7
+228    0x0A0A    //RX_FDEQ_BIN_8
+229    0x0A0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0360    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C48    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0303    //RX_FDEQ_BIN_3
+224    0x0303    //RX_FDEQ_BIN_4
+225    0x0303    //RX_FDEQ_BIN_5
+226    0x0303    //RX_FDEQ_BIN_6
+227    0x0303    //RX_FDEQ_BIN_7
+228    0x0A0A    //RX_FDEQ_BIN_8
+229    0x0A0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0360    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C48    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0303    //RX_FDEQ_BIN_3
+224    0x0303    //RX_FDEQ_BIN_4
+225    0x0303    //RX_FDEQ_BIN_5
+226    0x0303    //RX_FDEQ_BIN_6
+227    0x0303    //RX_FDEQ_BIN_7
+228    0x0A0A    //RX_FDEQ_BIN_8
+229    0x0A0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0360    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C48    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0303    //RX_FDEQ_BIN_3
+224    0x0303    //RX_FDEQ_BIN_4
+225    0x0303    //RX_FDEQ_BIN_5
+226    0x0303    //RX_FDEQ_BIN_6
+227    0x0303    //RX_FDEQ_BIN_7
+228    0x0A0A    //RX_FDEQ_BIN_8
+229    0x0A0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0360    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C48    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0303    //RX_FDEQ_BIN_3
+224    0x0303    //RX_FDEQ_BIN_4
+225    0x0303    //RX_FDEQ_BIN_5
+226    0x0303    //RX_FDEQ_BIN_6
+227    0x0303    //RX_FDEQ_BIN_7
+228    0x0A0A    //RX_FDEQ_BIN_8
+229    0x0A0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0360    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C48    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0303    //RX_FDEQ_BIN_3
+224    0x0303    //RX_FDEQ_BIN_4
+225    0x0303    //RX_FDEQ_BIN_5
+226    0x0303    //RX_FDEQ_BIN_6
+227    0x0303    //RX_FDEQ_BIN_7
+228    0x0A0A    //RX_FDEQ_BIN_8
+229    0x0A0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0360    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C48    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0303    //RX_FDEQ_BIN_3
+224    0x0303    //RX_FDEQ_BIN_4
+225    0x0303    //RX_FDEQ_BIN_5
+226    0x0303    //RX_FDEQ_BIN_6
+227    0x0303    //RX_FDEQ_BIN_7
+228    0x0A0A    //RX_FDEQ_BIN_8
+229    0x0A0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET_HAC-TMOBILE_US-WB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0036    //TX_PATCH_REG
-3    0x2F7A    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+3    0x2F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
 7    0x0001    //TX_SAMPLINGFREQ_PROC
@@ -22817,7 +42749,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
+21    0x009C    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -22838,8 +42770,8 @@
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
 41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
 46    0x0000    //TX_MIC_PAIR_CH_05
@@ -22903,8 +42835,8 @@
 104    0x0000    //TX_MIC_LOC_23
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -22946,7 +42878,7 @@
 147    0x0800    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
+150    0x6000    //TX_EAD_THR
 151    0x2000    //TX_THR_RE_EST
 152    0x0100    //TX_MIN_EQ_RE_EST_0
 153    0x0100    //TX_MIN_EQ_RE_EST_1
@@ -23028,13 +42960,13 @@
 229    0x2000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0120    //TX_EPD_OFFSET_00
+232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
 234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -23047,16 +42979,16 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF700    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x01A0    //TX_DELTA_THR_SN_EST_2
+251    0x01A0    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x5000    //TX_LAMBDA_NN_EST_2
+259    0x5000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
@@ -23078,18 +43010,18 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x4000    //TX_B_POST_FLT_1
 281    0x0018    //TX_NS_LVL_CTRL_0
-282    0x001C    //TX_NS_LVL_CTRL_1
-283    0x0019    //TX_NS_LVL_CTRL_2
-284    0x001C    //TX_NS_LVL_CTRL_3
-285    0x0019    //TX_NS_LVL_CTRL_4
-286    0x001A    //TX_NS_LVL_CTRL_5
-287    0x001E    //TX_NS_LVL_CTRL_6
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x001A    //TX_NS_LVL_CTRL_4
+286    0x001E    //TX_NS_LVL_CTRL_5
+287    0x001C    //TX_NS_LVL_CTRL_6
 288    0x001C    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0018    //TX_MIN_GAIN_S_1
+290    0x0012    //TX_MIN_GAIN_S_1
 291    0x0012    //TX_MIN_GAIN_S_2
 292    0x0012    //TX_MIN_GAIN_S_3
-293    0x0012    //TX_MIN_GAIN_S_4
+293    0x0018    //TX_MIN_GAIN_S_4
 294    0x0018    //TX_MIN_GAIN_S_5
 295    0x0018    //TX_MIN_GAIN_S_6
 296    0x0018    //TX_MIN_GAIN_S_7
@@ -23097,7 +43029,7 @@
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
+301    0x5000    //TX_SNRI_SUP_1
 302    0x4000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
@@ -23111,28 +43043,28 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x7000    //TX_A_POST_FILT_S_0
-315    0x7000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x2000    //TX_A_POST_FILT_S_4
+315    0x3000    //TX_A_POST_FILT_S_1
+316    0x3000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x7000    //TX_A_POST_FILT_S_4
 319    0x7000    //TX_A_POST_FILT_S_5
 320    0x7000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x4000    //TX_B_POST_FILT_1
-324    0x5000    //TX_B_POST_FILT_2
+324    0x4000    //TX_B_POST_FILT_2
 325    0x4000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x4000    //TX_B_POST_FILT_5
-328    0x4000    //TX_B_POST_FILT_6
+328    0x5000    //TX_B_POST_FILT_6
 329    0x4000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
 331    0x6000    //TX_B_LESSCUT_RTO_S_1
 332    0x6000    //TX_B_LESSCUT_RTO_S_2
 333    0x6000    //TX_B_LESSCUT_RTO_S_3
-334    0x6000    //TX_B_LESSCUT_RTO_S_4
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
 335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7C29    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
@@ -23164,11 +43096,11 @@
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
 367    0x000A    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x0139    //TX_NOISE_TH_1
 371    0x0479    //TX_NOISE_TH_2
-372    0x2E90    //TX_NOISE_TH_3
+372    0x2328    //TX_NOISE_TH_3
 373    0x4422    //TX_NOISE_TH_4
 374    0x5586    //TX_NOISE_TH_5
 375    0x4425    //TX_NOISE_TH_5_2
@@ -23176,10 +43108,10 @@
 377    0x4E20    //TX_NOISE_TH_5_4
 378    0x21E8    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
 385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
@@ -23187,15 +43119,15 @@
 388    0x00CE    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0500    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0004    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -23305,21 +43237,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -23348,19 +43280,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
 567    0x5C54    //TX_FDEQ_GAIN_0
@@ -23372,11 +43304,11 @@
 573    0x4B53    //TX_FDEQ_GAIN_6
 574    0x564A    //TX_FDEQ_GAIN_7
 575    0x3D3A    //TX_FDEQ_GAIN_8
-576    0x3B3C    //TX_FDEQ_GAIN_9
-577    0x3C36    //TX_FDEQ_GAIN_10
-578    0x3636    //TX_FDEQ_GAIN_11
-579    0x3D3E    //TX_FDEQ_GAIN_12
-580    0x4548    //TX_FDEQ_GAIN_13
+576    0x3838    //TX_FDEQ_GAIN_9
+577    0x3836    //TX_FDEQ_GAIN_10
+578    0x3633    //TX_FDEQ_GAIN_11
+579    0x3838    //TX_FDEQ_GAIN_12
+580    0x4048    //TX_FDEQ_GAIN_13
 581    0x4848    //TX_FDEQ_GAIN_14
 582    0x4848    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
@@ -23413,15 +43345,15 @@
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
 616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4846    //TX_PREEQ_GAIN_MIC0_0
-618    0x4544    //TX_PREEQ_GAIN_MIC0_1
-619    0x4240    //TX_PREEQ_GAIN_MIC0_2
-620    0x3E3C    //TX_PREEQ_GAIN_MIC0_3
-621    0x3A38    //TX_PREEQ_GAIN_MIC0_4
-622    0x3635    //TX_PREEQ_GAIN_MIC0_5
-623    0x3330    //TX_PREEQ_GAIN_MIC0_6
-624    0x2E2A    //TX_PREEQ_GAIN_MIC0_7
-625    0x2648    //TX_PREEQ_GAIN_MIC0_8
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
 626    0x4848    //TX_PREEQ_GAIN_MIC0_9
 627    0x4848    //TX_PREEQ_GAIN_MIC0_10
 628    0x4848    //TX_PREEQ_GAIN_MIC0_11
@@ -23469,13 +43401,13 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+673    0x484A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5454    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
 680    0x4848    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
@@ -23486,22 +43418,22 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0F10    //TX_PREEQ_BIN_MIC1_10
+701    0x1011    //TX_PREEQ_BIN_MIC1_11
+702    0x1104    //TX_PREEQ_BIN_MIC1_12
+703    0x101B    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
@@ -23572,7 +43504,7 @@
 773    0x0000    //TX_GAIN_LIMIT_0
 774    0x0000    //TX_GAIN_LIMIT_1
 775    0x0006    //TX_GAIN_LIMIT_2
-776    0x0006    //TX_GAIN_LIMIT_3
+776    0x0007    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -23662,7 +43594,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0550    //TX_TDDRC_DRC_GAIN
+866    0x0652    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -23693,6 +43625,71 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x000A    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7C00    //TX_DTD_THR1_MICMUTE_0
+912    0x5DC0    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0x3FFF    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
 0    0x000C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -23719,7 +43716,7 @@
 22    0x0014    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -24544,16 +44541,868 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x000C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C5C    //RX_FDEQ_GAIN_11
+208    0x5C5C    //RX_FDEQ_GAIN_12
+209    0x5C5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0505    //RX_FDEQ_BIN_3
+224    0x0505    //RX_FDEQ_BIN_4
+225    0x0505    //RX_FDEQ_BIN_5
+226    0x0505    //RX_FDEQ_BIN_6
+227    0x0505    //RX_FDEQ_BIN_7
+228    0x160C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0400    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0400    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C5C    //RX_FDEQ_GAIN_11
+208    0x5C5C    //RX_FDEQ_GAIN_12
+209    0x5C5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0505    //RX_FDEQ_BIN_3
+224    0x0505    //RX_FDEQ_BIN_4
+225    0x0505    //RX_FDEQ_BIN_5
+226    0x0505    //RX_FDEQ_BIN_6
+227    0x0505    //RX_FDEQ_BIN_7
+228    0x160C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0400    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C5C    //RX_FDEQ_GAIN_11
+208    0x5C5C    //RX_FDEQ_GAIN_12
+209    0x5C5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0505    //RX_FDEQ_BIN_3
+224    0x0505    //RX_FDEQ_BIN_4
+225    0x0505    //RX_FDEQ_BIN_5
+226    0x0505    //RX_FDEQ_BIN_6
+227    0x0505    //RX_FDEQ_BIN_7
+228    0x160C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0400    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C5C    //RX_FDEQ_GAIN_11
+208    0x5C5C    //RX_FDEQ_GAIN_12
+209    0x5C5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0505    //RX_FDEQ_BIN_3
+224    0x0505    //RX_FDEQ_BIN_4
+225    0x0505    //RX_FDEQ_BIN_5
+226    0x0505    //RX_FDEQ_BIN_6
+227    0x0505    //RX_FDEQ_BIN_7
+228    0x160C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0400    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C5C    //RX_FDEQ_GAIN_11
+208    0x5C5C    //RX_FDEQ_GAIN_12
+209    0x5C5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0505    //RX_FDEQ_BIN_3
+224    0x0505    //RX_FDEQ_BIN_4
+225    0x0505    //RX_FDEQ_BIN_5
+226    0x0505    //RX_FDEQ_BIN_6
+227    0x0505    //RX_FDEQ_BIN_7
+228    0x160C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0400    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C5C    //RX_FDEQ_GAIN_11
+208    0x5C5C    //RX_FDEQ_GAIN_12
+209    0x5C5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0505    //RX_FDEQ_BIN_3
+224    0x0505    //RX_FDEQ_BIN_4
+225    0x0505    //RX_FDEQ_BIN_5
+226    0x0505    //RX_FDEQ_BIN_6
+227    0x0505    //RX_FDEQ_BIN_7
+228    0x160C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0400    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C5C    //RX_FDEQ_GAIN_11
+208    0x5C5C    //RX_FDEQ_GAIN_12
+209    0x5C5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0505    //RX_FDEQ_BIN_3
+224    0x0505    //RX_FDEQ_BIN_4
+225    0x0505    //RX_FDEQ_BIN_5
+226    0x0505    //RX_FDEQ_BIN_6
+227    0x0505    //RX_FDEQ_BIN_7
+228    0x160C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0400    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4A4C    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5A5C    //RX_FDEQ_GAIN_7
+204    0x5C5C    //RX_FDEQ_GAIN_8
+205    0x5C5C    //RX_FDEQ_GAIN_9
+206    0x5C5C    //RX_FDEQ_GAIN_10
+207    0x5C5C    //RX_FDEQ_GAIN_11
+208    0x5C5C    //RX_FDEQ_GAIN_12
+209    0x5C5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0505    //RX_FDEQ_BIN_3
+224    0x0505    //RX_FDEQ_BIN_4
+225    0x0505    //RX_FDEQ_BIN_5
+226    0x0505    //RX_FDEQ_BIN_6
+227    0x0505    //RX_FDEQ_BIN_7
+228    0x160C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET_HAC-TMOBILE_US-SWB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
-2    0x0026    //TX_PATCH_REG
-3    0x6F7A    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
 7    0x0003    //TX_SAMPLINGFREQ_PROC
@@ -24570,7 +45419,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
+21    0x009C    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -24591,8 +45440,8 @@
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
 41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
 46    0x0000    //TX_MIC_PAIR_CH_05
@@ -24657,7 +45506,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -24781,13 +45630,13 @@
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0240    //TX_EPD_OFFSET_00
+232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
 234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -24800,12 +45649,12 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF700    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -24831,18 +45680,2688 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x0016    //TX_NS_LVL_CTRL_1
+282    0x002C    //TX_NS_LVL_CTRL_1
 283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0018    //TX_NS_LVL_CTRL_4
-286    0x0016    //TX_NS_LVL_CTRL_5
-287    0x0012    //TX_NS_LVL_CTRL_6
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
 288    0x0017    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0012    //TX_MIN_GAIN_S_1
-291    0x0007    //TX_MIN_GAIN_S_2
-292    0x0012    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x3000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x5000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x01F4    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2134    //TX_NOISE_TH_3
+373    0x6978    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x1194    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x03E8    //TX_SB_RHO_MEAN2_TH
+441    0x03E8    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x5C54    //TX_FDEQ_GAIN_0
+568    0x5048    //TX_FDEQ_GAIN_1
+569    0x4C4C    //TX_FDEQ_GAIN_2
+570    0x494D    //TX_FDEQ_GAIN_3
+571    0x4846    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4C53    //TX_FDEQ_GAIN_6
+574    0x5C44    //TX_FDEQ_GAIN_7
+575    0x4348    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4A44    //TX_FDEQ_GAIN_10
+578    0x4442    //TX_FDEQ_GAIN_11
+579    0x443E    //TX_FDEQ_GAIN_12
+580    0x3E3D    //TX_FDEQ_GAIN_13
+581    0x3D54    //TX_FDEQ_GAIN_14
+582    0x6882    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0504    //TX_FDEQ_BIN_4
+596    0x0708    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x050E    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0F0F    //TX_FDEQ_BIN_9
+601    0x0E0D    //TX_FDEQ_BIN_10
+602    0x0F28    //TX_FDEQ_BIN_11
+603    0x111B    //TX_FDEQ_BIN_12
+604    0x291E    //TX_FDEQ_BIN_13
+605    0x1E10    //TX_FDEQ_BIN_14
+606    0x1810    //TX_FDEQ_BIN_15
+607    0x1021    //TX_FDEQ_BIN_16
+608    0x1000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x070F    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0006    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0003    //TX_TDDRC_THRD_1
+856    0x1500    //TX_TDDRC_THRD_2
+857    0x1500    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0715    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x03E8    //TX_MICMUTE_RATIO_THR
+900    0x01A4    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7F00    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0x3FFF    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x000C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x000C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET_HAC-TMOBILE_US-FB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6B7E    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009C    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0007    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
 294    0x0012    //TX_MIN_GAIN_S_5
 295    0x0012    //TX_MIN_GAIN_S_6
 296    0x0012    //TX_MIN_GAIN_S_7
@@ -24864,29 +48383,29 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
+315    0x4000    //TX_A_POST_FILT_S_1
 316    0x4000    //TX_A_POST_FILT_S_2
 317    0x4000    //TX_A_POST_FILT_S_3
 318    0x4000    //TX_A_POST_FILT_S_4
 319    0x4000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
+320    0x5000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x3000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x5000    //TX_B_POST_FILT_4
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
 327    0x2000    //TX_B_POST_FILT_5
-328    0x6000    //TX_B_POST_FILT_6
+328    0x3000    //TX_B_POST_FILT_6
 329    0x3000    //TX_B_POST_FILT_7
 330    0x1000    //TX_B_LESSCUT_RTO_S_0
-331    0x6000    //TX_B_LESSCUT_RTO_S_1
-332    0x6000    //TX_B_LESSCUT_RTO_S_2
-333    0x6000    //TX_B_LESSCUT_RTO_S_3
-334    0x6000    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
 338    0x7E14    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
 340    0x7C29    //TX_LAMBDA_PFILT_S_1
@@ -24929,10 +48448,10 @@
 377    0x4E20    //TX_NOISE_TH_5_4
 378    0x39DF    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
 384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
 385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
@@ -24940,15 +48459,15 @@
 388    0x0200    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0004    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -24990,7 +48509,7 @@
 438    0x0000    //TX_A_POST_FLT_WTA
 439    0x799A    //TX_LAMBDA_PFLT_WTA
 440    0x051E    //TX_SB_RHO_MEAN2_TH
-441    0x02F0    //TX_SB_RHO_MEAN3_TH
+441    0x051E    //TX_SB_RHO_MEAN3_TH
 442    0x0000    //TX_HS_RESRV_4
 443    0x0000    //TX_HS_RESRV_5
 444    0x0001    //TX_DOA_VAD_THR_1
@@ -25063,16 +48582,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x7FFF    //TX_GSC_RTOL_TH
+522    0x7FFF    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -25101,38 +48620,2708 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x4C4A    //TX_FDEQ_GAIN_0
+568    0x4B4F    //TX_FDEQ_GAIN_1
+569    0x504B    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4A49    //TX_FDEQ_GAIN_4
+572    0x4F48    //TX_FDEQ_GAIN_5
+573    0x4A4E    //TX_FDEQ_GAIN_6
+574    0x534E    //TX_FDEQ_GAIN_7
+575    0x494F    //TX_FDEQ_GAIN_8
+576    0x5E6E    //TX_FDEQ_GAIN_9
+577    0x787A    //TX_FDEQ_GAIN_10
+578    0x6A58    //TX_FDEQ_GAIN_11
+579    0x5051    //TX_FDEQ_GAIN_12
+580    0x5156    //TX_FDEQ_GAIN_13
+581    0x6168    //TX_FDEQ_GAIN_14
+582    0x7678    //TX_FDEQ_GAIN_15
+583    0x7A87    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0F03    //TX_FDEQ_BIN_0
+592    0x0909    //TX_FDEQ_BIN_1
+593    0x080F    //TX_FDEQ_BIN_2
+594    0x0609    //TX_FDEQ_BIN_3
+595    0x0F03    //TX_FDEQ_BIN_4
+596    0x1402    //TX_FDEQ_BIN_5
+597    0x0E13    //TX_FDEQ_BIN_6
+598    0x110F    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x0E0F    //TX_FDEQ_BIN_9
+601    0x080D    //TX_FDEQ_BIN_10
+602    0x0F0F    //TX_FDEQ_BIN_11
+603    0x0F0F    //TX_FDEQ_BIN_12
+604    0x0A0F    //TX_FDEQ_BIN_13
+605    0x0809    //TX_FDEQ_BIN_14
+606    0x0A0B    //TX_FDEQ_BIN_15
+607    0x0C0D    //TX_FDEQ_BIN_16
+608    0x0E0F    //TX_FDEQ_BIN_17
+609    0x1013    //TX_FDEQ_BIN_18
+610    0x0A00    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x1812    //TX_PREEQ_BIN_MIC0_0
+642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x080A    //TX_PREEQ_BIN_MIC0_3
+645    0x0B09    //TX_PREEQ_BIN_MIC0_4
+646    0x0A06    //TX_PREEQ_BIN_MIC0_5
+647    0x0606    //TX_PREEQ_BIN_MIC0_6
+648    0x0605    //TX_PREEQ_BIN_MIC0_7
+649    0x050A    //TX_PREEQ_BIN_MIC0_8
+650    0x1505    //TX_PREEQ_BIN_MIC0_9
+651    0x0506    //TX_PREEQ_BIN_MIC0_10
+652    0x0615    //TX_PREEQ_BIN_MIC0_11
+653    0x1516    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x2021    //TX_PREEQ_BIN_MIC0_14
+656    0x2021    //TX_PREEQ_BIN_MIC0_15
+657    0x0800    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4A4C    //TX_PREEQ_GAIN_MIC1_6
+673    0x4E50    //TX_PREEQ_GAIN_MIC1_7
+674    0x5456    //TX_PREEQ_GAIN_MIC1_8
+675    0x585C    //TX_PREEQ_GAIN_MIC1_9
+676    0x5C64    //TX_PREEQ_GAIN_MIC1_10
+677    0x7478    //TX_PREEQ_GAIN_MIC1_11
+678    0x705C    //TX_PREEQ_GAIN_MIC1_12
+679    0x4838    //TX_PREEQ_GAIN_MIC1_13
+680    0x3C70    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x1414    //TX_PREEQ_BIN_MIC1_12
+703    0x1C1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x462C    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0504    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x000C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x000C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-RESERVE2-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009C    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x002C    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x3000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x5000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x01F4    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2134    //TX_NOISE_TH_3
+373    0x6978    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x1194    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x03E8    //TX_SB_RHO_MEAN2_TH
+441    0x03E8    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
 567    0x5C54    //TX_FDEQ_GAIN_0
 568    0x5048    //TX_FDEQ_GAIN_1
 569    0x4C4C    //TX_FDEQ_GAIN_2
-570    0x474A    //TX_FDEQ_GAIN_3
-571    0x3F3F    //TX_FDEQ_GAIN_4
-572    0x4245    //TX_FDEQ_GAIN_5
-573    0x4B53    //TX_FDEQ_GAIN_6
-574    0x5F3E    //TX_FDEQ_GAIN_7
-575    0x303A    //TX_FDEQ_GAIN_8
-576    0x3B3C    //TX_FDEQ_GAIN_9
-577    0x3C3E    //TX_FDEQ_GAIN_10
-578    0x4141    //TX_FDEQ_GAIN_11
-579    0x3D3E    //TX_FDEQ_GAIN_12
-580    0x4548    //TX_FDEQ_GAIN_13
-581    0x4F56    //TX_FDEQ_GAIN_14
-582    0x6548    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
+570    0x494D    //TX_FDEQ_GAIN_3
+571    0x4442    //TX_FDEQ_GAIN_4
+572    0x4448    //TX_FDEQ_GAIN_5
+573    0x4C53    //TX_FDEQ_GAIN_6
+574    0x6244    //TX_FDEQ_GAIN_7
+575    0x4348    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x484A    //TX_FDEQ_GAIN_11
+579    0x4840    //TX_FDEQ_GAIN_12
+580    0x4040    //TX_FDEQ_GAIN_13
+581    0x485C    //TX_FDEQ_GAIN_14
+582    0x707E    //TX_FDEQ_GAIN_15
+583    0x5D48    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
 586    0x4848    //TX_FDEQ_GAIN_19
@@ -25166,19 +51355,19 @@
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
 616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4846    //TX_PREEQ_GAIN_MIC0_0
-618    0x4544    //TX_PREEQ_GAIN_MIC0_1
-619    0x4240    //TX_PREEQ_GAIN_MIC0_2
-620    0x3E3C    //TX_PREEQ_GAIN_MIC0_3
-621    0x3A38    //TX_PREEQ_GAIN_MIC0_4
-622    0x3635    //TX_PREEQ_GAIN_MIC0_5
-623    0x3330    //TX_PREEQ_GAIN_MIC0_6
-624    0x2E2A    //TX_PREEQ_GAIN_MIC0_7
-625    0x2625    //TX_PREEQ_GAIN_MIC0_8
-626    0x2421    //TX_PREEQ_GAIN_MIC0_9
-627    0x1D19    //TX_PREEQ_GAIN_MIC0_10
-628    0x1820    //TX_PREEQ_GAIN_MIC0_11
-629    0x2830    //TX_PREEQ_GAIN_MIC0_12
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
 630    0x4848    //TX_PREEQ_GAIN_MIC0_13
 631    0x4848    //TX_PREEQ_GAIN_MIC0_14
 632    0x4848    //TX_PREEQ_GAIN_MIC0_15
@@ -25222,16 +51411,16 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
 685    0x4848    //TX_PREEQ_GAIN_MIC1_19
@@ -25239,23 +51428,23 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
 696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -25446,8 +51635,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x03E8    //TX_MICMUTE_RATIO_THR
+900    0x01A4    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7F00    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0x3FFF    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x000C    //RX_RECVFUNC_MODE_0
+0    0x243C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -25457,7 +51711,7 @@
 7    0x1000    //RX_TDDRC_ALPHA_UP_2
 8    0x1000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
+10    0x05AA    //RX_PGA
 11    0x7FFF    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x5800    //RX_THR_PITCH_DET_0
@@ -25472,7 +51726,7 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -25485,23 +51739,23 @@
 35    0x199A    //RX_A_POST_FLT
 36    0x0000    //RX_LMT_THRD
 37    0x4000    //RX_LMT_ALPHA
-38    0x0030    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
-48    0x6C70    //RX_FDEQ_GAIN_9
-49    0x7474    //RX_FDEQ_GAIN_10
-50    0x7474    //RX_FDEQ_GAIN_11
-51    0x7474    //RX_FDEQ_GAIN_12
-52    0x7474    //RX_FDEQ_GAIN_13
-53    0x7474    //RX_FDEQ_GAIN_14
-54    0x7474    //RX_FDEQ_GAIN_15
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x5064    //RX_FDEQ_GAIN_3
+43    0x7076    //RX_FDEQ_GAIN_4
+44    0x897A    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8888    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x96A4    //RX_FDEQ_GAIN_9
+49    0xA9A0    //RX_FDEQ_GAIN_10
+50    0x9487    //RX_FDEQ_GAIN_11
+51    0x6F64    //RX_FDEQ_GAIN_12
+52    0x625A    //RX_FDEQ_GAIN_13
+53    0x5D80    //RX_FDEQ_GAIN_14
+54    0x8890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -25511,21 +51765,21 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0402    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1E1E    //RX_FDEQ_BIN_11
-75    0x1E1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E1E    //RX_FDEQ_BIN_14
-78    0x202C    //RX_FDEQ_BIN_15
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -25559,23 +51813,23 @@
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
 111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
+124    0x0551    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
+126    0x1450    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0850    //RX_MAX_G_FP
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
@@ -25615,36 +51869,36 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7000    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
-48    0x6C70    //RX_FDEQ_GAIN_9
-49    0x7474    //RX_FDEQ_GAIN_10
-50    0x7474    //RX_FDEQ_GAIN_11
-51    0x7474    //RX_FDEQ_GAIN_12
-52    0x7474    //RX_FDEQ_GAIN_13
-53    0x7474    //RX_FDEQ_GAIN_14
-54    0x7474    //RX_FDEQ_GAIN_15
+124    0x0504    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x869A    //RX_FDEQ_GAIN_4
+44    0x9A9E    //RX_FDEQ_GAIN_5
+45    0x8C90    //RX_FDEQ_GAIN_6
+46    0x9490    //RX_FDEQ_GAIN_7
+47    0x9EA6    //RX_FDEQ_GAIN_8
+48    0xA0B0    //RX_FDEQ_GAIN_9
+49    0xC2A6    //RX_FDEQ_GAIN_10
+50    0x8E8D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x4884    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -25654,21 +51908,21 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0402    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1E1E    //RX_FDEQ_BIN_11
-75    0x1E1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E1E    //RX_FDEQ_BIN_14
-78    0x202C    //RX_FDEQ_BIN_15
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x140D    //RX_FDEQ_BIN_10
+74    0x042D    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1419    //RX_FDEQ_BIN_13
+77    0x2332    //RX_FDEQ_BIN_14
+78    0x372C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -25701,7 +51955,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x000C    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -25714,36 +51968,36 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7000    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
-48    0x6C70    //RX_FDEQ_GAIN_9
-49    0x7474    //RX_FDEQ_GAIN_10
-50    0x7474    //RX_FDEQ_GAIN_11
-51    0x7474    //RX_FDEQ_GAIN_12
-52    0x7474    //RX_FDEQ_GAIN_13
-53    0x7474    //RX_FDEQ_GAIN_14
-54    0x7474    //RX_FDEQ_GAIN_15
+124    0x0504    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x869A    //RX_FDEQ_GAIN_4
+44    0x9A9E    //RX_FDEQ_GAIN_5
+45    0x8C90    //RX_FDEQ_GAIN_6
+46    0x9490    //RX_FDEQ_GAIN_7
+47    0x9EA6    //RX_FDEQ_GAIN_8
+48    0xA0B0    //RX_FDEQ_GAIN_9
+49    0xC2A6    //RX_FDEQ_GAIN_10
+50    0x8E8D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x4884    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -25753,21 +52007,21 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0402    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1E1E    //RX_FDEQ_BIN_11
-75    0x1E1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E1E    //RX_FDEQ_BIN_14
-78    0x202C    //RX_FDEQ_BIN_15
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x140D    //RX_FDEQ_BIN_10
+74    0x042D    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1419    //RX_FDEQ_BIN_13
+77    0x2332    //RX_FDEQ_BIN_14
+78    0x372C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -25800,7 +52054,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0014    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -25813,36 +52067,36 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7000    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
-48    0x6C70    //RX_FDEQ_GAIN_9
-49    0x7474    //RX_FDEQ_GAIN_10
-50    0x7474    //RX_FDEQ_GAIN_11
-51    0x7474    //RX_FDEQ_GAIN_12
-52    0x7474    //RX_FDEQ_GAIN_13
-53    0x7474    //RX_FDEQ_GAIN_14
-54    0x7474    //RX_FDEQ_GAIN_15
+124    0x0504    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x869A    //RX_FDEQ_GAIN_4
+44    0x9A9E    //RX_FDEQ_GAIN_5
+45    0x8C90    //RX_FDEQ_GAIN_6
+46    0x9490    //RX_FDEQ_GAIN_7
+47    0x9EA6    //RX_FDEQ_GAIN_8
+48    0xA0B0    //RX_FDEQ_GAIN_9
+49    0xC2A6    //RX_FDEQ_GAIN_10
+50    0x8E8D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x4884    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -25852,21 +52106,21 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0402    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1E1E    //RX_FDEQ_BIN_11
-75    0x1E1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E1E    //RX_FDEQ_BIN_14
-78    0x202C    //RX_FDEQ_BIN_15
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x140D    //RX_FDEQ_BIN_10
+74    0x042D    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1419    //RX_FDEQ_BIN_13
+77    0x2332    //RX_FDEQ_BIN_14
+78    0x372C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -25899,7 +52153,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0022    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -25912,36 +52166,36 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7000    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
-48    0x6C70    //RX_FDEQ_GAIN_9
-49    0x7474    //RX_FDEQ_GAIN_10
-50    0x7474    //RX_FDEQ_GAIN_11
-51    0x7474    //RX_FDEQ_GAIN_12
-52    0x7474    //RX_FDEQ_GAIN_13
-53    0x7474    //RX_FDEQ_GAIN_14
-54    0x7474    //RX_FDEQ_GAIN_15
+124    0x0504    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x869A    //RX_FDEQ_GAIN_4
+44    0x9A9E    //RX_FDEQ_GAIN_5
+45    0x8C90    //RX_FDEQ_GAIN_6
+46    0x9490    //RX_FDEQ_GAIN_7
+47    0x9EA6    //RX_FDEQ_GAIN_8
+48    0xA0B0    //RX_FDEQ_GAIN_9
+49    0xC2A6    //RX_FDEQ_GAIN_10
+50    0x8E8D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x4884    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -25951,21 +52205,21 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0402    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1E1E    //RX_FDEQ_BIN_11
-75    0x1E1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E1E    //RX_FDEQ_BIN_14
-78    0x202C    //RX_FDEQ_BIN_15
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x140D    //RX_FDEQ_BIN_10
+74    0x042D    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1419    //RX_FDEQ_BIN_13
+77    0x2332    //RX_FDEQ_BIN_14
+78    0x372C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -25998,7 +52252,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0038    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -26011,36 +52265,36 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7000    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+124    0x04A0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
-48    0x6C70    //RX_FDEQ_GAIN_9
-49    0x7474    //RX_FDEQ_GAIN_10
-50    0x7474    //RX_FDEQ_GAIN_11
-51    0x7474    //RX_FDEQ_GAIN_12
-52    0x7474    //RX_FDEQ_GAIN_13
-53    0x7474    //RX_FDEQ_GAIN_14
-54    0x7474    //RX_FDEQ_GAIN_15
+41    0x484C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x869A    //RX_FDEQ_GAIN_4
+44    0x9A98    //RX_FDEQ_GAIN_5
+45    0x8C90    //RX_FDEQ_GAIN_6
+46    0x948C    //RX_FDEQ_GAIN_7
+47    0x9EA6    //RX_FDEQ_GAIN_8
+48    0xA0B0    //RX_FDEQ_GAIN_9
+49    0xC2AE    //RX_FDEQ_GAIN_10
+50    0x9797    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x4884    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -26050,21 +52304,21 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0402    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1E1E    //RX_FDEQ_BIN_11
-75    0x1E1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E1E    //RX_FDEQ_BIN_14
-78    0x202C    //RX_FDEQ_BIN_15
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x140D    //RX_FDEQ_BIN_10
+74    0x0A2D    //RX_FDEQ_BIN_11
+75    0x180F    //RX_FDEQ_BIN_12
+76    0x1419    //RX_FDEQ_BIN_13
+77    0x2332    //RX_FDEQ_BIN_14
+78    0x372C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -26097,7 +52351,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0055    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -26110,36 +52364,36 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7000    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+124    0x04A0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
-48    0x6C70    //RX_FDEQ_GAIN_9
-49    0x7474    //RX_FDEQ_GAIN_10
-50    0x7474    //RX_FDEQ_GAIN_11
-51    0x7474    //RX_FDEQ_GAIN_12
-52    0x7474    //RX_FDEQ_GAIN_13
-53    0x7474    //RX_FDEQ_GAIN_14
-54    0x7474    //RX_FDEQ_GAIN_15
+41    0x484C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x869A    //RX_FDEQ_GAIN_4
+44    0x9A98    //RX_FDEQ_GAIN_5
+45    0x8C90    //RX_FDEQ_GAIN_6
+46    0x948C    //RX_FDEQ_GAIN_7
+47    0x9EA6    //RX_FDEQ_GAIN_8
+48    0xA0B0    //RX_FDEQ_GAIN_9
+49    0xC2AE    //RX_FDEQ_GAIN_10
+50    0x9797    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x4884    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -26149,21 +52403,21 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0402    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1E1E    //RX_FDEQ_BIN_11
-75    0x1E1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E1E    //RX_FDEQ_BIN_14
-78    0x202C    //RX_FDEQ_BIN_15
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x140D    //RX_FDEQ_BIN_10
+74    0x0A2D    //RX_FDEQ_BIN_11
+75    0x180F    //RX_FDEQ_BIN_12
+76    0x1419    //RX_FDEQ_BIN_13
+77    0x2332    //RX_FDEQ_BIN_14
+78    0x372C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -26196,7 +52450,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0089    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -26209,36 +52463,36 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7000    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+124    0x04A0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
-48    0x6C70    //RX_FDEQ_GAIN_9
-49    0x7474    //RX_FDEQ_GAIN_10
-50    0x7474    //RX_FDEQ_GAIN_11
-51    0x7474    //RX_FDEQ_GAIN_12
-52    0x7474    //RX_FDEQ_GAIN_13
-53    0x7474    //RX_FDEQ_GAIN_14
-54    0x7474    //RX_FDEQ_GAIN_15
+41    0x484C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x869A    //RX_FDEQ_GAIN_4
+44    0x9A98    //RX_FDEQ_GAIN_5
+45    0x8C90    //RX_FDEQ_GAIN_6
+46    0x948C    //RX_FDEQ_GAIN_7
+47    0x9EA6    //RX_FDEQ_GAIN_8
+48    0xA0B0    //RX_FDEQ_GAIN_9
+49    0xC2AE    //RX_FDEQ_GAIN_10
+50    0x9797    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6468    //RX_FDEQ_GAIN_13
+53    0x4884    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -26248,21 +52502,21 @@
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0402    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1E1E    //RX_FDEQ_BIN_11
-75    0x1E1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E1E    //RX_FDEQ_BIN_14
-78    0x202C    //RX_FDEQ_BIN_15
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x140D    //RX_FDEQ_BIN_10
+74    0x0A2D    //RX_FDEQ_BIN_11
+75    0x180F    //RX_FDEQ_BIN_12
+76    0x1419    //RX_FDEQ_BIN_13
+77    0x2332    //RX_FDEQ_BIN_14
+78    0x372C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -26297,19 +52551,871 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x05AA    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0032    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0047    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0076    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HANDSET-HANDSET_HAC-TMOBILE_US-FB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#CASE_NAME  HANDSET-HANDSET-CUSTOM1-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
-2    0x0026    //TX_PATCH_REG
-3    0x6B7A    //TX_SENDFUNC_MODE_0
+2    0x0076    //TX_PATCH_REG
+3    0x6F76    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
-6    0x0004    //TX_SAMPLINGFREQ_SIG
-7    0x0004    //TX_SAMPLINGFREQ_PROC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
 8    0x000A    //TX_FRAME_SZ_SIG
 9    0x000A    //TX_FRAME_SZ
 10    0x0000    //TX_DELAY_OPT
@@ -26323,7 +53429,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
+21    0x00A3    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -26344,8 +53450,8 @@
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
 41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
 46    0x0000    //TX_MIC_PAIR_CH_05
@@ -26410,7 +53516,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -26534,13 +53640,13 @@
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0360    //TX_EPD_OFFSET_00
+232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
 234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -26553,12 +53659,12 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF700    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -26582,20 +53688,20 @@
 277    0x1400    //TX_MAINREFRTO_TH_L
 278    0x0000    //TX_MAINREFRTO_TH_EQ
 279    0x1000    //TX_B_POST_FLT_0
-280    0x2000    //TX_B_POST_FLT_1
+280    0x1000    //TX_B_POST_FLT_1
 281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x0016    //TX_NS_LVL_CTRL_1
+282    0x002C    //TX_NS_LVL_CTRL_1
 283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0018    //TX_NS_LVL_CTRL_4
-286    0x0016    //TX_NS_LVL_CTRL_5
-287    0x0012    //TX_NS_LVL_CTRL_6
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
 288    0x0017    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0012    //TX_MIN_GAIN_S_1
-291    0x0007    //TX_MIN_GAIN_S_2
-292    0x0012    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
 294    0x0012    //TX_MIN_GAIN_S_5
 295    0x0012    //TX_MIN_GAIN_S_6
 296    0x0012    //TX_MIN_GAIN_S_7
@@ -26617,29 +53723,29 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
+315    0x4000    //TX_A_POST_FILT_S_1
 316    0x4000    //TX_A_POST_FILT_S_2
 317    0x4000    //TX_A_POST_FILT_S_3
 318    0x4000    //TX_A_POST_FILT_S_4
 319    0x4000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
+320    0x5000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x3000    //TX_B_POST_FILT_2
+323    0x1000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
 325    0x2000    //TX_B_POST_FILT_3
-326    0x5000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x6000    //TX_B_POST_FILT_6
+326    0x2000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
 329    0x3000    //TX_B_POST_FILT_7
 330    0x1000    //TX_B_LESSCUT_RTO_S_0
-331    0x6000    //TX_B_LESSCUT_RTO_S_1
-332    0x6000    //TX_B_LESSCUT_RTO_S_2
-333    0x6000    //TX_B_LESSCUT_RTO_S_3
-334    0x6000    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
 338    0x7E14    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
 340    0x7C29    //TX_LAMBDA_PFILT_S_1
@@ -26670,22 +53776,22 @@
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
 367    0x000A    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x00C6    //TX_NOISE_TH_1
 371    0x0DAC    //TX_NOISE_TH_2
-372    0x2EE0    //TX_NOISE_TH_3
-373    0x47E0    //TX_NOISE_TH_4
+372    0x2260    //TX_NOISE_TH_3
+373    0x7080    //TX_NOISE_TH_4
 374    0x57E4    //TX_NOISE_TH_5
 375    0x4BD6    //TX_NOISE_TH_5_2
 376    0x0001    //TX_NOISE_TH_5_3
 377    0x4E20    //TX_NOISE_TH_5_4
-378    0x39DF    //TX_NOISE_TH_6
+378    0x1194    //TX_NOISE_TH_6
 379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
 385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
@@ -26693,15 +53799,15 @@
 388    0x0200    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0004    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -26743,7 +53849,7 @@
 438    0x0000    //TX_A_POST_FLT_WTA
 439    0x799A    //TX_LAMBDA_PFLT_WTA
 440    0x051E    //TX_SB_RHO_MEAN2_TH
-441    0x051E    //TX_SB_RHO_MEAN3_TH
+441    0x02F0    //TX_SB_RHO_MEAN3_TH
 442    0x0000    //TX_HS_RESRV_4
 443    0x0000    //TX_HS_RESRV_5
 444    0x0001    //TX_DOA_VAD_THR_1
@@ -26816,16 +53922,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -26854,84 +53960,84 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4854    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x5454    //TX_FDEQ_GAIN_5
-573    0x5454    //TX_FDEQ_GAIN_6
-574    0x6048    //TX_FDEQ_GAIN_7
-575    0x5454    //TX_FDEQ_GAIN_8
-576    0x6464    //TX_FDEQ_GAIN_9
-577    0x6464    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x9898    //TX_FDEQ_GAIN_12
-580    0x9898    //TX_FDEQ_GAIN_13
-581    0x9898    //TX_FDEQ_GAIN_14
-582    0x9898    //TX_FDEQ_GAIN_15
-583    0x9898    //TX_FDEQ_GAIN_16
-584    0x9898    //TX_FDEQ_GAIN_17
-585    0x9898    //TX_FDEQ_GAIN_18
-586    0x9848    //TX_FDEQ_GAIN_19
+567    0x5C54    //TX_FDEQ_GAIN_0
+568    0x5048    //TX_FDEQ_GAIN_1
+569    0x4C4C    //TX_FDEQ_GAIN_2
+570    0x494D    //TX_FDEQ_GAIN_3
+571    0x4442    //TX_FDEQ_GAIN_4
+572    0x4448    //TX_FDEQ_GAIN_5
+573    0x4C53    //TX_FDEQ_GAIN_6
+574    0x6244    //TX_FDEQ_GAIN_7
+575    0x4348    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x4E4A    //TX_FDEQ_GAIN_11
+579    0x4840    //TX_FDEQ_GAIN_12
+580    0x4040    //TX_FDEQ_GAIN_13
+581    0x4054    //TX_FDEQ_GAIN_14
+582    0x687A    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
 587    0x4848    //TX_FDEQ_GAIN_20
 588    0x4848    //TX_FDEQ_GAIN_21
 589    0x4848    //TX_FDEQ_GAIN_22
 590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0F03    //TX_FDEQ_BIN_0
-592    0x0909    //TX_FDEQ_BIN_1
-593    0x080F    //TX_FDEQ_BIN_2
-594    0x0609    //TX_FDEQ_BIN_3
-595    0x0F03    //TX_FDEQ_BIN_4
-596    0x1402    //TX_FDEQ_BIN_5
-597    0x0E13    //TX_FDEQ_BIN_6
-598    0x110F    //TX_FDEQ_BIN_7
-599    0x0E0F    //TX_FDEQ_BIN_8
-600    0x0E0F    //TX_FDEQ_BIN_9
-601    0x080D    //TX_FDEQ_BIN_10
-602    0x0F0F    //TX_FDEQ_BIN_11
-603    0x0F0F    //TX_FDEQ_BIN_12
-604    0x0A0F    //TX_FDEQ_BIN_13
-605    0x0809    //TX_FDEQ_BIN_14
-606    0x0A0B    //TX_FDEQ_BIN_15
-607    0x0C0D    //TX_FDEQ_BIN_16
-608    0x0E0F    //TX_FDEQ_BIN_17
-609    0x1013    //TX_FDEQ_BIN_18
-610    0x0A00    //TX_FDEQ_BIN_19
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0504    //TX_FDEQ_BIN_4
+596    0x0708    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x050E    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0F0F    //TX_FDEQ_BIN_9
+601    0x0E0D    //TX_FDEQ_BIN_10
+602    0x0F28    //TX_FDEQ_BIN_11
+603    0x111B    //TX_FDEQ_BIN_12
+604    0x291E    //TX_FDEQ_BIN_13
+605    0x1E10    //TX_FDEQ_BIN_14
+606    0x1810    //TX_FDEQ_BIN_15
+607    0x1021    //TX_FDEQ_BIN_16
+608    0x1000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
 611    0x0000    //TX_FDEQ_BIN_20
 612    0x0000    //TX_FDEQ_BIN_21
 613    0x0000    //TX_FDEQ_BIN_22
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
 616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4846    //TX_PREEQ_GAIN_MIC0_0
-618    0x4544    //TX_PREEQ_GAIN_MIC0_1
-619    0x4240    //TX_PREEQ_GAIN_MIC0_2
-620    0x3E3C    //TX_PREEQ_GAIN_MIC0_3
-621    0x3A38    //TX_PREEQ_GAIN_MIC0_4
-622    0x3635    //TX_PREEQ_GAIN_MIC0_5
-623    0x3330    //TX_PREEQ_GAIN_MIC0_6
-624    0x2E2A    //TX_PREEQ_GAIN_MIC0_7
-625    0x2625    //TX_PREEQ_GAIN_MIC0_8
-626    0x2421    //TX_PREEQ_GAIN_MIC0_9
-627    0x1D19    //TX_PREEQ_GAIN_MIC0_10
-628    0x1820    //TX_PREEQ_GAIN_MIC0_11
-629    0x2830    //TX_PREEQ_GAIN_MIC0_12
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
 630    0x4848    //TX_PREEQ_GAIN_MIC0_13
 631    0x4848    //TX_PREEQ_GAIN_MIC0_14
 632    0x4848    //TX_PREEQ_GAIN_MIC0_15
@@ -26943,23 +54049,23 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x1812    //TX_PREEQ_BIN_MIC0_0
-642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x080A    //TX_PREEQ_BIN_MIC0_3
-645    0x0B09    //TX_PREEQ_BIN_MIC0_4
-646    0x0A06    //TX_PREEQ_BIN_MIC0_5
-647    0x0606    //TX_PREEQ_BIN_MIC0_6
-648    0x0605    //TX_PREEQ_BIN_MIC0_7
-649    0x050A    //TX_PREEQ_BIN_MIC0_8
-650    0x1505    //TX_PREEQ_BIN_MIC0_9
-651    0x0506    //TX_PREEQ_BIN_MIC0_10
-652    0x0615    //TX_PREEQ_BIN_MIC0_11
-653    0x1516    //TX_PREEQ_BIN_MIC0_12
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x070F    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
 654    0x2021    //TX_PREEQ_BIN_MIC0_13
-655    0x2021    //TX_PREEQ_BIN_MIC0_14
-656    0x2021    //TX_PREEQ_BIN_MIC0_15
-657    0x0800    //TX_PREEQ_BIN_MIC0_16
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
 660    0x0000    //TX_PREEQ_BIN_MIC0_19
@@ -26974,16 +54080,16 @@
 669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+672    0x494A    //TX_PREEQ_GAIN_MIC1_6
+673    0x4B4C    //TX_PREEQ_GAIN_MIC1_7
+674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
+675    0x4F52    //TX_PREEQ_GAIN_MIC1_9
+676    0x5355    //TX_PREEQ_GAIN_MIC1_10
+677    0x585C    //TX_PREEQ_GAIN_MIC1_11
+678    0x616A    //TX_PREEQ_GAIN_MIC1_12
+679    0x726E    //TX_PREEQ_GAIN_MIC1_13
+680    0x5C48    //TX_PREEQ_GAIN_MIC1_14
+681    0x3B38    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
@@ -26992,22 +54098,22 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1719    //TX_PREEQ_BIN_MIC1_11
+702    0x1B1E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x3042    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
@@ -27041,21 +54147,21 @@
 736    0x4848    //TX_PREEQ_GAIN_MIC2_21
 737    0x4848    //TX_PREEQ_GAIN_MIC2_22
 738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
 754    0x0200    //TX_PREEQ_BIN_MIC2_15
 755    0x0000    //TX_PREEQ_BIN_MIC2_16
 756    0x0000    //TX_PREEQ_BIN_MIC2_17
@@ -27066,19 +54172,19 @@
 761    0x0000    //TX_PREEQ_BIN_MIC2_22
 762    0x0000    //TX_PREEQ_BIN_MIC2_23
 763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0060    //TX_MIC_CALIBRATION_0
-766    0x0060    //TX_MIC_CALIBRATION_1
-767    0x0070    //TX_MIC_CALIBRATION_2
-768    0x0070    //TX_MIC_CALIBRATION_3
-769    0x0050    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0040    //TX_MIC_PWR_BIAS_2
-772    0x0040    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0006    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -27156,19 +54262,19 @@
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
 853    0x0002    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0003    //TX_TDDRC_THRD_1
+856    0x1500    //TX_TDDRC_THRD_2
+857    0x1500    //TX_TDDRC_THRD_3
 858    0x3000    //TX_TDDRC_SLANT_0
-859    0x7E00    //TX_TDDRC_SLANT_1
+859    0x6E00    //TX_TDDRC_SLANT_1
 860    0x1000    //TX_TDDRC_ALPHA_UP_00
 861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x03A0    //TX_TDDRC_DRC_GAIN
+866    0x0650    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -27199,11 +54305,8086 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x203C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x05AA    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x5064    //RX_FDEQ_GAIN_3
+43    0x7076    //RX_FDEQ_GAIN_4
+44    0x897A    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8888    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x96A4    //RX_FDEQ_GAIN_9
+49    0xA9A0    //RX_FDEQ_GAIN_10
+50    0x9487    //RX_FDEQ_GAIN_11
+51    0x6F64    //RX_FDEQ_GAIN_12
+52    0x625A    //RX_FDEQ_GAIN_13
+53    0x5D80    //RX_FDEQ_GAIN_14
+54    0x8890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0551    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0010    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0035    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0047    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0076    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x05AA    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0032    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0047    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0076    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-CUSTOM2-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F5E    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A3    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x002C    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x00C6    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2260    //TX_NOISE_TH_3
+373    0x7080    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x1194    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x02F0    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x5C54    //TX_FDEQ_GAIN_0
+568    0x5048    //TX_FDEQ_GAIN_1
+569    0x4C4C    //TX_FDEQ_GAIN_2
+570    0x494D    //TX_FDEQ_GAIN_3
+571    0x4442    //TX_FDEQ_GAIN_4
+572    0x4448    //TX_FDEQ_GAIN_5
+573    0x4C53    //TX_FDEQ_GAIN_6
+574    0x6244    //TX_FDEQ_GAIN_7
+575    0x4348    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x4E4A    //TX_FDEQ_GAIN_11
+579    0x4840    //TX_FDEQ_GAIN_12
+580    0x4040    //TX_FDEQ_GAIN_13
+581    0x4054    //TX_FDEQ_GAIN_14
+582    0x687A    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0504    //TX_FDEQ_BIN_4
+596    0x0708    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x050E    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0F0F    //TX_FDEQ_BIN_9
+601    0x0E0D    //TX_FDEQ_BIN_10
+602    0x0F28    //TX_FDEQ_BIN_11
+603    0x111B    //TX_FDEQ_BIN_12
+604    0x291E    //TX_FDEQ_BIN_13
+605    0x1E10    //TX_FDEQ_BIN_14
+606    0x1810    //TX_FDEQ_BIN_15
+607    0x1021    //TX_FDEQ_BIN_16
+608    0x1000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x070F    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x494A    //TX_PREEQ_GAIN_MIC1_6
+673    0x4B4C    //TX_PREEQ_GAIN_MIC1_7
+674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
+675    0x4F52    //TX_PREEQ_GAIN_MIC1_9
+676    0x5355    //TX_PREEQ_GAIN_MIC1_10
+677    0x585C    //TX_PREEQ_GAIN_MIC1_11
+678    0x616A    //TX_PREEQ_GAIN_MIC1_12
+679    0x726E    //TX_PREEQ_GAIN_MIC1_13
+680    0x5C48    //TX_PREEQ_GAIN_MIC1_14
+681    0x3B38    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1719    //TX_PREEQ_BIN_MIC1_11
+702    0x1B1E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x3042    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0006    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0003    //TX_TDDRC_THRD_1
+856    0x1500    //TX_TDDRC_THRD_2
+857    0x1500    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0650    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x203C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x05AA    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x5064    //RX_FDEQ_GAIN_3
+43    0x7076    //RX_FDEQ_GAIN_4
+44    0x897A    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8888    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x96A4    //RX_FDEQ_GAIN_9
+49    0xA9A0    //RX_FDEQ_GAIN_10
+50    0x9487    //RX_FDEQ_GAIN_11
+51    0x6F64    //RX_FDEQ_GAIN_12
+52    0x625A    //RX_FDEQ_GAIN_13
+53    0x5D80    //RX_FDEQ_GAIN_14
+54    0x8890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0551    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0010    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0035    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0047    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0076    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x05AA    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0032    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0047    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0076    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-RESERVE1-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F56    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A3    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x002C    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x00C6    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2260    //TX_NOISE_TH_3
+373    0x7080    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x1194    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x02F0    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x5C54    //TX_FDEQ_GAIN_0
+568    0x5048    //TX_FDEQ_GAIN_1
+569    0x4C4C    //TX_FDEQ_GAIN_2
+570    0x494D    //TX_FDEQ_GAIN_3
+571    0x4442    //TX_FDEQ_GAIN_4
+572    0x4448    //TX_FDEQ_GAIN_5
+573    0x4C53    //TX_FDEQ_GAIN_6
+574    0x6244    //TX_FDEQ_GAIN_7
+575    0x4348    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x4E4A    //TX_FDEQ_GAIN_11
+579    0x4840    //TX_FDEQ_GAIN_12
+580    0x4040    //TX_FDEQ_GAIN_13
+581    0x4054    //TX_FDEQ_GAIN_14
+582    0x687A    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0504    //TX_FDEQ_BIN_4
+596    0x0708    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x050E    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0F0F    //TX_FDEQ_BIN_9
+601    0x0E0D    //TX_FDEQ_BIN_10
+602    0x0F28    //TX_FDEQ_BIN_11
+603    0x111B    //TX_FDEQ_BIN_12
+604    0x291E    //TX_FDEQ_BIN_13
+605    0x1E10    //TX_FDEQ_BIN_14
+606    0x1810    //TX_FDEQ_BIN_15
+607    0x1021    //TX_FDEQ_BIN_16
+608    0x1000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x070F    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x494A    //TX_PREEQ_GAIN_MIC1_6
+673    0x4B4C    //TX_PREEQ_GAIN_MIC1_7
+674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
+675    0x4F52    //TX_PREEQ_GAIN_MIC1_9
+676    0x5355    //TX_PREEQ_GAIN_MIC1_10
+677    0x585C    //TX_PREEQ_GAIN_MIC1_11
+678    0x616A    //TX_PREEQ_GAIN_MIC1_12
+679    0x726E    //TX_PREEQ_GAIN_MIC1_13
+680    0x5C48    //TX_PREEQ_GAIN_MIC1_14
+681    0x3B38    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1719    //TX_PREEQ_BIN_MIC1_11
+702    0x1B1E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x3042    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0006    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0003    //TX_TDDRC_THRD_1
+856    0x1500    //TX_TDDRC_THRD_2
+857    0x1500    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0650    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x203C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x05AA    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x5064    //RX_FDEQ_GAIN_3
+43    0x7076    //RX_FDEQ_GAIN_4
+44    0x897A    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8888    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x96A4    //RX_FDEQ_GAIN_9
+49    0xA9A0    //RX_FDEQ_GAIN_10
+50    0x9487    //RX_FDEQ_GAIN_11
+51    0x6F64    //RX_FDEQ_GAIN_12
+52    0x625A    //RX_FDEQ_GAIN_13
+53    0x5D80    //RX_FDEQ_GAIN_14
+54    0x8890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0551    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0010    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0035    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0047    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0076    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x05AA    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0032    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0047    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0076    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET_HAC-RESERVE2-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009C    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x002C    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x3000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x5000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x01F4    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2134    //TX_NOISE_TH_3
+373    0x6978    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x1194    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x03E8    //TX_SB_RHO_MEAN2_TH
+441    0x03E8    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x5C54    //TX_FDEQ_GAIN_0
+568    0x5048    //TX_FDEQ_GAIN_1
+569    0x4C4C    //TX_FDEQ_GAIN_2
+570    0x494D    //TX_FDEQ_GAIN_3
+571    0x4442    //TX_FDEQ_GAIN_4
+572    0x4448    //TX_FDEQ_GAIN_5
+573    0x4C53    //TX_FDEQ_GAIN_6
+574    0x6244    //TX_FDEQ_GAIN_7
+575    0x4348    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x484A    //TX_FDEQ_GAIN_11
+579    0x4840    //TX_FDEQ_GAIN_12
+580    0x4040    //TX_FDEQ_GAIN_13
+581    0x485C    //TX_FDEQ_GAIN_14
+582    0x707E    //TX_FDEQ_GAIN_15
+583    0x5D48    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0504    //TX_FDEQ_BIN_4
+596    0x0708    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x050E    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0F0F    //TX_FDEQ_BIN_9
+601    0x0E0D    //TX_FDEQ_BIN_10
+602    0x0F28    //TX_FDEQ_BIN_11
+603    0x111B    //TX_FDEQ_BIN_12
+604    0x291E    //TX_FDEQ_BIN_13
+605    0x1E10    //TX_FDEQ_BIN_14
+606    0x1810    //TX_FDEQ_BIN_15
+607    0x1021    //TX_FDEQ_BIN_16
+608    0x1000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x070F    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0006    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0003    //TX_TDDRC_THRD_1
+856    0x1500    //TX_TDDRC_THRD_2
+857    0x1500    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0550    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x03E8    //TX_MICMUTE_RATIO_THR
+900    0x01A4    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7F00    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0x3FFF    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
 0    0x000C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0004    //RX_SAMPLINGFREQ_SIG
-3    0x0004    //RX_SAMPLINGFREQ_PROC
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
 4    0x000A    //RX_FRAME_SZ
 5    0x0000    //RX_DELAY_OPT
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -27225,7 +62406,7 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -28050,4 +63231,855 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x000C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
diff --git a/audio/tangorpro/tuning/fortemedia/HANDSFREE.dat b/audio/tangorpro/tuning/fortemedia/HANDSFREE.dat
index 63e1210..f8891ad 100644
Binary files a/audio/tangorpro/tuning/fortemedia/HANDSFREE.dat and b/audio/tangorpro/tuning/fortemedia/HANDSFREE.dat differ
diff --git a/audio/tangorpro/tuning/fortemedia/HANDSFREE.mods b/audio/tangorpro/tuning/fortemedia/HANDSFREE.mods
index 748fdc1..db66553 100644
--- a/audio/tangorpro/tuning/fortemedia/HANDSFREE.mods
+++ b/audio/tangorpro/tuning/fortemedia/HANDSFREE.mods
@@ -1,5275 +1,17 @@
 #PLATFORM_NAME  gChip
 #EXPORT_FLAG  HANDSFREE
-#SINGLE_API_VER  1.1.6
-#SAVE_TIME  2021-02-03 11:38:25
+#SINGLE_API_VER  1.2.1
+#SAVE_TIME  2022-06-02 12:43:22
 
-#CASE_NAME  HANDSFREE-HANDSFREE-VOICE_GENERIC-NB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#CASE_NAME  HANDSFREE-HANDFREE-RESERVE1-FB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x2F78    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0003    //TX_NUM_MIC
-6    0x0000    //TX_SAMPLINGFREQ_SIG
-7    0x0000    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
-22    0x000D    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0001    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x053D    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7652    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x5000    //TX_THR_PITCH_DET_0
-131    0x4800    //TX_THR_PITCH_DET_1
-132    0x4000    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0100    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7500    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x0200    //TX_MIN_EQ_RE_EST_0
-153    0x0200    //TX_MIN_EQ_RE_EST_1
-154    0x0200    //TX_MIN_EQ_RE_EST_2
-155    0x0200    //TX_MIN_EQ_RE_EST_3
-156    0x0200    //TX_MIN_EQ_RE_EST_4
-157    0x0200    //TX_MIN_EQ_RE_EST_5
-158    0x0200    //TX_MIN_EQ_RE_EST_6
-159    0x1800    //TX_MIN_EQ_RE_EST_7
-160    0x1800    //TX_MIN_EQ_RE_EST_8
-161    0x3000    //TX_MIN_EQ_RE_EST_9
-162    0x4000    //TX_MIN_EQ_RE_EST_10
-163    0x6000    //TX_MIN_EQ_RE_EST_11
-164    0x7FFF    //TX_MIN_EQ_RE_EST_12
-165    0x2000    //TX_LAMBDA_RE_EST
-166    0x0000    //TX_LAMBDA_CB_NLE
-167    0x7FFF    //TX_C_POST_FLT
-168    0x2000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7FF0    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
-199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
-201    0x7FF0    //TX_DTD_THR1_4
-202    0x7FF0    //TX_DTD_THR1_5
-203    0x7FF0    //TX_DTD_THR1_6
-204    0x7E00    //TX_DTD_THR2_0
-205    0x0CCD    //TX_DTD_THR2_1
-206    0x0CCD    //TX_DTD_THR2_2
-207    0x0CCD    //TX_DTD_THR2_3
-208    0x0CCD    //TX_DTD_THR2_4
-209    0x0CCD    //TX_DTD_THR2_5
-210    0x0CCD    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x157C    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x1000    //TX_ADPT_STRICT_L
-222    0x1000    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x2000    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF900    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF800    //TX_THR_SN_EST_7
-250    0x0050    //TX_DELTA_THR_SN_EST_0
-251    0x01A0    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x7F00    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0800    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0012    //TX_NS_LVL_CTRL_1
-283    0x0017    //TX_NS_LVL_CTRL_2
-284    0x0015    //TX_NS_LVL_CTRL_3
-285    0x0012    //TX_NS_LVL_CTRL_4
-286    0x0012    //TX_NS_LVL_CTRL_5
-287    0x0011    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000F    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000D    //TX_MIN_GAIN_S_2
-292    0x000F    //TX_MIN_GAIN_S_3
-293    0x000F    //TX_MIN_GAIN_S_4
-294    0x000F    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x4000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x3000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x5000    //TX_B_POST_FILT_4
-327    0x3000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
-331    0x6000    //TX_B_LESSCUT_RTO_S_1
-332    0x6000    //TX_B_LESSCUT_RTO_S_2
-333    0x6000    //TX_B_LESSCUT_RTO_S_3
-334    0x6000    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x6000    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7E00    //TX_LAMBDA_PFILT
-339    0x7D00    //TX_LAMBDA_PFILT_S_0
-340    0x7900    //TX_LAMBDA_PFILT_S_1
-341    0x7400    //TX_LAMBDA_PFILT_S_2
-342    0x7900    //TX_LAMBDA_PFILT_S_3
-343    0x7D00    //TX_LAMBDA_PFILT_S_4
-344    0x7D00    //TX_LAMBDA_PFILT_S_5
-345    0x7D00    //TX_LAMBDA_PFILT_S_6
-346    0x7D00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0600    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0FA0    //TX_DT_BINVAD_ENDF
-358    0x0400    //TX_C_POST_FLT_DT
-359    0x4000    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0064    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x03ED    //TX_NOISE_TH_2
-372    0x2EE0    //TX_NOISE_TH_3
-373    0x55F0    //TX_NOISE_TH_4
-374    0x7FFF    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x0FA0    //TX_NOISE_TH_6
-379    0x000A    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x1000    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x000A    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x007A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x5000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x0000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x7FFF    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0014    //TX_FDEQ_SUBNUM
-567    0x5050    //TX_FDEQ_GAIN_0
-568    0x5048    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x483C    //TX_FDEQ_GAIN_3
-571    0x303C    //TX_FDEQ_GAIN_4
-572    0x3048    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x3838    //TX_FDEQ_GAIN_8
-576    0x3838    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D08    //TX_FDEQ_BIN_9
-601    0x0000    //TX_FDEQ_BIN_10
-602    0x0000    //TX_FDEQ_BIN_11
-603    0x0000    //TX_FDEQ_BIN_12
-604    0x0000    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x7800    //TX_PREEQ_BIN_MIC0_0
-642    0x0000    //TX_PREEQ_BIN_MIC0_1
-643    0x0000    //TX_PREEQ_BIN_MIC0_2
-644    0x0000    //TX_PREEQ_BIN_MIC0_3
-645    0x0000    //TX_PREEQ_BIN_MIC0_4
-646    0x0000    //TX_PREEQ_BIN_MIC0_5
-647    0x0000    //TX_PREEQ_BIN_MIC0_6
-648    0x0000    //TX_PREEQ_BIN_MIC0_7
-649    0x0000    //TX_PREEQ_BIN_MIC0_8
-650    0x0000    //TX_PREEQ_BIN_MIC0_9
-651    0x0000    //TX_PREEQ_BIN_MIC0_10
-652    0x0000    //TX_PREEQ_BIN_MIC0_11
-653    0x0000    //TX_PREEQ_BIN_MIC0_12
-654    0x0000    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4846    //TX_PREEQ_GAIN_MIC1_0
-667    0x4544    //TX_PREEQ_GAIN_MIC1_1
-668    0x4240    //TX_PREEQ_GAIN_MIC1_2
-669    0x3E48    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x251A    //TX_PREEQ_BIN_MIC1_0
-691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
-692    0x0C08    //TX_PREEQ_BIN_MIC1_2
-693    0x0700    //TX_PREEQ_BIN_MIC1_3
-694    0x0000    //TX_PREEQ_BIN_MIC1_4
-695    0x0000    //TX_PREEQ_BIN_MIC1_5
-696    0x0000    //TX_PREEQ_BIN_MIC1_6
-697    0x0000    //TX_PREEQ_BIN_MIC1_7
-698    0x0000    //TX_PREEQ_BIN_MIC1_8
-699    0x0000    //TX_PREEQ_BIN_MIC1_9
-700    0x0000    //TX_PREEQ_BIN_MIC1_10
-701    0x0000    //TX_PREEQ_BIN_MIC1_11
-702    0x0000    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x7800    //TX_PREEQ_BIN_MIC2_0
-740    0x0000    //TX_PREEQ_BIN_MIC2_1
-741    0x0000    //TX_PREEQ_BIN_MIC2_2
-742    0x0000    //TX_PREEQ_BIN_MIC2_3
-743    0x0000    //TX_PREEQ_BIN_MIC2_4
-744    0x0000    //TX_PREEQ_BIN_MIC2_5
-745    0x0000    //TX_PREEQ_BIN_MIC2_6
-746    0x0000    //TX_PREEQ_BIN_MIC2_7
-747    0x0000    //TX_PREEQ_BIN_MIC2_8
-748    0x0000    //TX_PREEQ_BIN_MIC2_9
-749    0x0000    //TX_PREEQ_BIN_MIC2_10
-750    0x0000    //TX_PREEQ_BIN_MIC2_11
-751    0x0000    //TX_PREEQ_BIN_MIC2_12
-752    0x0000    //TX_PREEQ_BIN_MIC2_13
-753    0x0000    //TX_PREEQ_BIN_MIC2_14
-754    0x0000    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0065    //TX_MIC_CALIBRATION_0
-766    0x0065    //TX_MIC_CALIBRATION_1
-767    0x0065    //TX_MIC_CALIBRATION_2
-768    0x0065    //TX_MIC_CALIBRATION_3
-769    0x0044    //TX_MIC_PWR_BIAS_0
-770    0x0044    //TX_MIC_PWR_BIAS_1
-771    0x0044    //TX_MIC_PWR_BIAS_2
-772    0x0044    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x4000    //TX_TDDRC_ALPHA_UP_01
-784    0x4000    //TX_TDDRC_ALPHA_UP_02
-785    0x4000    //TX_TDDRC_ALPHA_UP_03
-786    0x4000    //TX_TDDRC_ALPHA_UP_04
-787    0x6000    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0004    //TX_TDDRC_THRD_0
-855    0x0010    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
-858    0x6000    //TX_TDDRC_SLANT_0
-859    0x6000    //TX_TDDRC_SLANT_1
-860    0x4000    //TX_TDDRC_ALPHA_UP_00
-861    0x6000    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0A98    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-#RX
-0    0x027C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0000    //RX_SAMPLINGFREQ_SIG
-3    0x0000    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7652    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8058    //RX_FDEQ_GAIN_1
-41    0x5454    //RX_FDEQ_GAIN_2
-42    0x545C    //RX_FDEQ_GAIN_3
-43    0x6448    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x5848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x485A    //RX_FDEQ_GAIN_8
-48    0x5A58    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x0060    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x0600    //RX_FDDRC_THRD_2_0
-95    0x0600    //RX_FDDRC_THRD_2_1
-96    0x0600    //RX_FDDRC_THRD_2_2
-97    0x0600    //RX_FDDRC_THRD_2_3
-98    0x0800    //RX_FDDRC_THRD_3_0
-99    0x0800    //RX_FDDRC_THRD_3_1
-100    0x0800    //RX_FDDRC_THRD_3_2
-101    0x0800    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0005    //RX_FILTINDX
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0700    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0700    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8058    //RX_FDEQ_GAIN_1
-41    0x5454    //RX_FDEQ_GAIN_2
-42    0x545C    //RX_FDEQ_GAIN_3
-43    0x6448    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x5848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x485A    //RX_FDEQ_GAIN_8
-48    0x5A58    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x0060    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x0600    //RX_FDDRC_THRD_2_0
-95    0x0600    //RX_FDDRC_THRD_2_1
-96    0x0600    //RX_FDDRC_THRD_2_2
-97    0x0600    //RX_FDDRC_THRD_2_3
-98    0x0800    //RX_FDDRC_THRD_3_0
-99    0x0800    //RX_FDDRC_THRD_3_1
-100    0x0800    //RX_FDDRC_THRD_3_2
-101    0x0800    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0700    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8058    //RX_FDEQ_GAIN_1
-41    0x5454    //RX_FDEQ_GAIN_2
-42    0x545C    //RX_FDEQ_GAIN_3
-43    0x6448    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x5848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x485A    //RX_FDEQ_GAIN_8
-48    0x5A58    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x0060    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x0600    //RX_FDDRC_THRD_2_0
-95    0x0600    //RX_FDDRC_THRD_2_1
-96    0x0600    //RX_FDDRC_THRD_2_2
-97    0x0600    //RX_FDDRC_THRD_2_3
-98    0x0800    //RX_FDDRC_THRD_3_0
-99    0x0800    //RX_FDDRC_THRD_3_1
-100    0x0800    //RX_FDDRC_THRD_3_2
-101    0x0800    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0700    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8058    //RX_FDEQ_GAIN_1
-41    0x5454    //RX_FDEQ_GAIN_2
-42    0x545C    //RX_FDEQ_GAIN_3
-43    0x6448    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x5848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x485A    //RX_FDEQ_GAIN_8
-48    0x5A58    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x0060    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x0600    //RX_FDDRC_THRD_2_0
-95    0x0600    //RX_FDDRC_THRD_2_1
-96    0x0600    //RX_FDDRC_THRD_2_2
-97    0x0600    //RX_FDDRC_THRD_2_3
-98    0x0800    //RX_FDDRC_THRD_3_0
-99    0x0800    //RX_FDDRC_THRD_3_1
-100    0x0800    //RX_FDDRC_THRD_3_2
-101    0x0800    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0025    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0700    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8058    //RX_FDEQ_GAIN_1
-41    0x5454    //RX_FDEQ_GAIN_2
-42    0x545C    //RX_FDEQ_GAIN_3
-43    0x6448    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x5848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x485A    //RX_FDEQ_GAIN_8
-48    0x5A58    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x0060    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x0600    //RX_FDDRC_THRD_2_0
-95    0x0600    //RX_FDDRC_THRD_2_1
-96    0x0600    //RX_FDDRC_THRD_2_2
-97    0x0600    //RX_FDDRC_THRD_2_3
-98    0x0800    //RX_FDDRC_THRD_3_0
-99    0x0800    //RX_FDDRC_THRD_3_1
-100    0x0800    //RX_FDDRC_THRD_3_2
-101    0x0800    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0035    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0700    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8058    //RX_FDEQ_GAIN_1
-41    0x5454    //RX_FDEQ_GAIN_2
-42    0x545C    //RX_FDEQ_GAIN_3
-43    0x6448    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x5848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x485A    //RX_FDEQ_GAIN_8
-48    0x5A58    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x0060    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x0600    //RX_FDDRC_THRD_2_0
-95    0x0600    //RX_FDDRC_THRD_2_1
-96    0x0600    //RX_FDDRC_THRD_2_2
-97    0x0600    //RX_FDDRC_THRD_2_3
-98    0x0800    //RX_FDDRC_THRD_3_0
-99    0x0800    //RX_FDDRC_THRD_3_1
-100    0x0800    //RX_FDDRC_THRD_3_2
-101    0x0800    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0700    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8058    //RX_FDEQ_GAIN_1
-41    0x5454    //RX_FDEQ_GAIN_2
-42    0x545C    //RX_FDEQ_GAIN_3
-43    0x6448    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x5848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x485A    //RX_FDEQ_GAIN_8
-48    0x5A58    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x0060    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x0600    //RX_FDDRC_THRD_2_0
-95    0x0600    //RX_FDDRC_THRD_2_1
-96    0x0600    //RX_FDDRC_THRD_2_2
-97    0x0600    //RX_FDDRC_THRD_2_3
-98    0x0800    //RX_FDDRC_THRD_3_0
-99    0x0800    //RX_FDDRC_THRD_3_1
-100    0x0800    //RX_FDDRC_THRD_3_2
-101    0x0800    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0082    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0700    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8058    //RX_FDEQ_GAIN_1
-41    0x5454    //RX_FDEQ_GAIN_2
-42    0x545C    //RX_FDEQ_GAIN_3
-43    0x6448    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x5848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x485A    //RX_FDEQ_GAIN_8
-48    0x5A58    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x0060    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x0600    //RX_FDDRC_THRD_2_0
-95    0x0600    //RX_FDDRC_THRD_2_1
-96    0x0600    //RX_FDDRC_THRD_2_2
-97    0x0600    //RX_FDDRC_THRD_2_3
-98    0x0800    //RX_FDDRC_THRD_3_0
-99    0x0800    //RX_FDDRC_THRD_3_1
-100    0x0800    //RX_FDDRC_THRD_3_2
-101    0x0800    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSFREE-HANDSFREE-VOICE_GENERIC-WB
-#PARAM_TYPE TX+RX
-#TOTAL_CUSTOM_STEP 7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2F78    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0003    //TX_NUM_MIC
-6    0x0001    //TX_SAMPLINGFREQ_SIG
-7    0x0001    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
-22    0x000D    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0001    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x053D    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7B02    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x5000    //TX_THR_PITCH_DET_0
-131    0x4800    //TX_THR_PITCH_DET_1
-132    0x4000    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0300    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x3000    //TX_MIN_EQ_RE_EST_0
-153    0x0100    //TX_MIN_EQ_RE_EST_1
-154    0x0200    //TX_MIN_EQ_RE_EST_2
-155    0x0200    //TX_MIN_EQ_RE_EST_3
-156    0x0200    //TX_MIN_EQ_RE_EST_4
-157    0x0200    //TX_MIN_EQ_RE_EST_5
-158    0x0200    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x4000    //TX_LAMBDA_CB_NLE
-167    0x7FFF    //TX_C_POST_FLT
-168    0x5000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7FF0    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
-199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
-201    0x7FF0    //TX_DTD_THR1_4
-202    0x7FF0    //TX_DTD_THR1_5
-203    0x7FF0    //TX_DTD_THR1_6
-204    0x7E00    //TX_DTD_THR2_0
-205    0x7E00    //TX_DTD_THR2_1
-206    0x5000    //TX_DTD_THR2_2
-207    0x5000    //TX_DTD_THR2_3
-208    0x5000    //TX_DTD_THR2_4
-209    0x5000    //TX_DTD_THR2_5
-210    0x5000    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x03E8    //TX_DT_CUT_K
-214    0x0010    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x023E    //TX_ADPT_STRICT_L
-222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFB00    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF800    //TX_THR_SN_EST_7
-250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0016    //TX_NS_LVL_CTRL_4
-286    0x0014    //TX_NS_LVL_CTRL_5
-287    0x0011    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000F    //TX_MIN_GAIN_S_0
-290    0x0010    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x0010    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x50C0    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x5000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x4C00    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x4000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x6000    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7C00    //TX_LAMBDA_PFILT
-339    0x7C00    //TX_LAMBDA_PFILT_S_0
-340    0x7C00    //TX_LAMBDA_PFILT_S_1
-341    0x7C00    //TX_LAMBDA_PFILT_S_2
-342    0x7A00    //TX_LAMBDA_PFILT_S_3
-343    0x7C00    //TX_LAMBDA_PFILT_S_4
-344    0x7C00    //TX_LAMBDA_PFILT_S_5
-345    0x7C00    //TX_LAMBDA_PFILT_S_6
-346    0x7C00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0600    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0800    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0140    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0064    //TX_NDETCT
-367    0x0032    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x017E    //TX_NOISE_TH_1
-371    0x0230    //TX_NOISE_TH_2
-372    0x3492    //TX_NOISE_TH_3
-373    0x4E20    //TX_NOISE_TH_4
-374    0x55B8    //TX_NOISE_TH_5
-375    0x49E6    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x0F0A    //TX_NOISE_TH_6
-379    0x0033    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0033    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x0000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x4000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x001C    //TX_FDEQ_SUBNUM
-567    0x5454    //TX_FDEQ_GAIN_0
-568    0x5448    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4850    //TX_FDEQ_GAIN_5
-573    0x5050    //TX_FDEQ_GAIN_6
-574    0x5048    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x0E0F    //TX_FDEQ_BIN_10
-602    0x0F10    //TX_FDEQ_BIN_11
-603    0x1011    //TX_FDEQ_BIN_12
-604    0x1104    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0808    //TX_PREEQ_BIN_MIC0_7
-649    0x0808    //TX_PREEQ_BIN_MIC0_8
-650    0x0808    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0808    //TX_PREEQ_BIN_MIC0_11
-653    0x0808    //TX_PREEQ_BIN_MIC0_12
-654    0x0808    //TX_PREEQ_BIN_MIC0_13
-655    0x0808    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4846    //TX_PREEQ_GAIN_MIC1_0
-667    0x4544    //TX_PREEQ_GAIN_MIC1_1
-668    0x4240    //TX_PREEQ_GAIN_MIC1_2
-669    0x3E3C    //TX_PREEQ_GAIN_MIC1_3
-670    0x3A38    //TX_PREEQ_GAIN_MIC1_4
-671    0x3635    //TX_PREEQ_GAIN_MIC1_5
-672    0x3330    //TX_PREEQ_GAIN_MIC1_6
-673    0x2E2A    //TX_PREEQ_GAIN_MIC1_7
-674    0x2648    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x251A    //TX_PREEQ_BIN_MIC1_0
-691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
-692    0x0C0C    //TX_PREEQ_BIN_MIC1_2
-693    0x0C0F    //TX_PREEQ_BIN_MIC1_3
-694    0x0F0F    //TX_PREEQ_BIN_MIC1_4
-695    0x0F09    //TX_PREEQ_BIN_MIC1_5
-696    0x0909    //TX_PREEQ_BIN_MIC1_6
-697    0x0908    //TX_PREEQ_BIN_MIC1_7
-698    0x0700    //TX_PREEQ_BIN_MIC1_8
-699    0x0000    //TX_PREEQ_BIN_MIC1_9
-700    0x0000    //TX_PREEQ_BIN_MIC1_10
-701    0x0000    //TX_PREEQ_BIN_MIC1_11
-702    0x0000    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0800    //TX_TDDRC_ALPHA_UP_01
-784    0x0800    //TX_TDDRC_ALPHA_UP_02
-785    0x0800    //TX_TDDRC_ALPHA_UP_03
-786    0x0800    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0001    //TX_TDDRC_THRD_0
-855    0x0002    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
-858    0x6000    //TX_TDDRC_SLANT_0
-859    0x6000    //TX_TDDRC_SLANT_1
-860    0x0800    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0B50    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-#RX
-0    0x027C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0001    //RX_SAMPLINGFREQ_SIG
-3    0x0001    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7B02    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6858    //RX_FDEQ_GAIN_1
-41    0x5858    //RX_FDEQ_GAIN_2
-42    0x5858    //RX_FDEQ_GAIN_3
-43    0x5C5C    //RX_FDEQ_GAIN_4
-44    0x7A54    //RX_FDEQ_GAIN_5
-45    0x5448    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x8070    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0715    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0715    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6858    //RX_FDEQ_GAIN_1
-41    0x5858    //RX_FDEQ_GAIN_2
-42    0x5858    //RX_FDEQ_GAIN_3
-43    0x5C5C    //RX_FDEQ_GAIN_4
-44    0x7A54    //RX_FDEQ_GAIN_5
-45    0x5448    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x8070    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0715    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6858    //RX_FDEQ_GAIN_1
-41    0x5858    //RX_FDEQ_GAIN_2
-42    0x5858    //RX_FDEQ_GAIN_3
-43    0x5C5C    //RX_FDEQ_GAIN_4
-44    0x7A54    //RX_FDEQ_GAIN_5
-45    0x5448    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x8070    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0715    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6858    //RX_FDEQ_GAIN_1
-41    0x5858    //RX_FDEQ_GAIN_2
-42    0x5858    //RX_FDEQ_GAIN_3
-43    0x5C5C    //RX_FDEQ_GAIN_4
-44    0x7A54    //RX_FDEQ_GAIN_5
-45    0x5448    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x8070    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0026    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0715    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6858    //RX_FDEQ_GAIN_1
-41    0x5858    //RX_FDEQ_GAIN_2
-42    0x5858    //RX_FDEQ_GAIN_3
-43    0x5C5C    //RX_FDEQ_GAIN_4
-44    0x7A54    //RX_FDEQ_GAIN_5
-45    0x5448    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x8070    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0035    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0715    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6858    //RX_FDEQ_GAIN_1
-41    0x5858    //RX_FDEQ_GAIN_2
-42    0x5858    //RX_FDEQ_GAIN_3
-43    0x5C5C    //RX_FDEQ_GAIN_4
-44    0x7A54    //RX_FDEQ_GAIN_5
-45    0x5448    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x8070    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0715    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6858    //RX_FDEQ_GAIN_1
-41    0x5858    //RX_FDEQ_GAIN_2
-42    0x5858    //RX_FDEQ_GAIN_3
-43    0x5C5C    //RX_FDEQ_GAIN_4
-44    0x7A54    //RX_FDEQ_GAIN_5
-45    0x5448    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x8070    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0082    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0715    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6858    //RX_FDEQ_GAIN_1
-41    0x5858    //RX_FDEQ_GAIN_2
-42    0x5858    //RX_FDEQ_GAIN_3
-43    0x5C5C    //RX_FDEQ_GAIN_4
-44    0x7A54    //RX_FDEQ_GAIN_5
-45    0x5448    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x8070    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSFREE-HANDSFREE-VOICE_GENERIC-SWB
-#PARAM_TYPE TX+RX
-#TOTAL_CUSTOM_STEP 7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2F78    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0003    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x0093    //TX_DIST2REF1
-22    0x001A    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0001    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3B33    //TX_DIST2REF_11
-73    0x0A70    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0015    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7B02    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x5000    //TX_THR_PITCH_DET_0
-131    0x4800    //TX_THR_PITCH_DET_1
-132    0x4000    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0400    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x2000    //TX_MIN_EQ_RE_EST_0
-153    0x0600    //TX_MIN_EQ_RE_EST_1
-154    0x0200    //TX_MIN_EQ_RE_EST_2
-155    0x0200    //TX_MIN_EQ_RE_EST_3
-156    0x0200    //TX_MIN_EQ_RE_EST_4
-157    0x0200    //TX_MIN_EQ_RE_EST_5
-158    0x0200    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x3000    //TX_LAMBDA_CB_NLE
-167    0x7FFF    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7FF0    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
-199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
-201    0x7FF0    //TX_DTD_THR1_4
-202    0x7FF0    //TX_DTD_THR1_5
-203    0x7FF0    //TX_DTD_THR1_6
-204    0x7E00    //TX_DTD_THR2_0
-205    0x7E00    //TX_DTD_THR2_1
-206    0x5000    //TX_DTD_THR2_2
-207    0x5000    //TX_DTD_THR2_3
-208    0x5000    //TX_DTD_THR2_4
-209    0x5000    //TX_DTD_THR2_5
-210    0x5000    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x36B0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x7FFF    //TX_DTD_MIC_BLK
-221    0x023E    //TX_ADPT_STRICT_L
-222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x1000    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFA00    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF800    //TX_THR_SN_EST_7
-250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
-254    0x0000    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0014    //TX_NS_LVL_CTRL_3
-285    0x0014    //TX_NS_LVL_CTRL_4
-286    0x0014    //TX_NS_LVL_CTRL_5
-287    0x0011    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000F    //TX_MIN_GAIN_S_0
-290    0x0010    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x0010    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x50C0    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x5000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x4C00    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x4000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x6000    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7C00    //TX_LAMBDA_PFILT
-339    0x7D00    //TX_LAMBDA_PFILT_S_0
-340    0x7D00    //TX_LAMBDA_PFILT_S_1
-341    0x7D00    //TX_LAMBDA_PFILT_S_2
-342    0x7D00    //TX_LAMBDA_PFILT_S_3
-343    0x7D00    //TX_LAMBDA_PFILT_S_4
-344    0x7D00    //TX_LAMBDA_PFILT_S_5
-345    0x7D00    //TX_LAMBDA_PFILT_S_6
-346    0x7D00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0400    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0600    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0040    //TX_DT_BINVAD_TH_0
-354    0x0040    //TX_DT_BINVAD_TH_1
-355    0x0100    //TX_DT_BINVAD_TH_2
-356    0x0100    //TX_DT_BINVAD_TH_3
-357    0x36B0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0140    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0064    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x01F4    //TX_NOISE_TH_2
-372    0x4E20    //TX_NOISE_TH_3
-373    0x2710    //TX_NOISE_TH_4
-374    0x2710    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x0DAC    //TX_NOISE_TH_6
-379    0x0050    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0050    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x4000    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x0000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x2000    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x4000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4850    //TX_FDEQ_GAIN_2
-570    0x5050    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x484A    //TX_FDEQ_GAIN_5
-573    0x4E5E    //TX_FDEQ_GAIN_6
-574    0x5850    //TX_FDEQ_GAIN_7
-575    0x5050    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4850    //TX_FDEQ_GAIN_11
-579    0x5064    //TX_FDEQ_GAIN_12
-580    0x5858    //TX_FDEQ_GAIN_13
-581    0x5458    //TX_FDEQ_GAIN_14
-582    0x5858    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x1013    //TX_FDEQ_BIN_10
-602    0x1719    //TX_FDEQ_BIN_11
-603    0x1B1E    //TX_FDEQ_BIN_12
-604    0x1E1E    //TX_FDEQ_BIN_13
-605    0x1E28    //TX_FDEQ_BIN_14
-606    0x282C    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0808    //TX_PREEQ_BIN_MIC0_7
-649    0x0808    //TX_PREEQ_BIN_MIC0_8
-650    0x0808    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0808    //TX_PREEQ_BIN_MIC0_11
-653    0x0808    //TX_PREEQ_BIN_MIC0_12
-654    0x0808    //TX_PREEQ_BIN_MIC0_13
-655    0x0808    //TX_PREEQ_BIN_MIC0_14
-656    0xF200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4846    //TX_PREEQ_GAIN_MIC1_0
-667    0x4544    //TX_PREEQ_GAIN_MIC1_1
-668    0x4240    //TX_PREEQ_GAIN_MIC1_2
-669    0x3E3C    //TX_PREEQ_GAIN_MIC1_3
-670    0x3A38    //TX_PREEQ_GAIN_MIC1_4
-671    0x3635    //TX_PREEQ_GAIN_MIC1_5
-672    0x3330    //TX_PREEQ_GAIN_MIC1_6
-673    0x2E2A    //TX_PREEQ_GAIN_MIC1_7
-674    0x2625    //TX_PREEQ_GAIN_MIC1_8
-675    0x2421    //TX_PREEQ_GAIN_MIC1_9
-676    0x1D19    //TX_PREEQ_GAIN_MIC1_10
-677    0x1820    //TX_PREEQ_GAIN_MIC1_11
-678    0x2830    //TX_PREEQ_GAIN_MIC1_12
-679    0x303C    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x251A    //TX_PREEQ_BIN_MIC1_0
-691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
-692    0x0C0C    //TX_PREEQ_BIN_MIC1_2
-693    0x0C0F    //TX_PREEQ_BIN_MIC1_3
-694    0x0F0F    //TX_PREEQ_BIN_MIC1_4
-695    0x0F09    //TX_PREEQ_BIN_MIC1_5
-696    0x0909    //TX_PREEQ_BIN_MIC1_6
-697    0x0908    //TX_PREEQ_BIN_MIC1_7
-698    0x070F    //TX_PREEQ_BIN_MIC1_8
-699    0x1F08    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0920    //TX_PREEQ_BIN_MIC1_11
-702    0x2020    //TX_PREEQ_BIN_MIC1_12
-703    0x2021    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0xF200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0050    //TX_MIC_CALIBRATION_0
-766    0x0056    //TX_MIC_CALIBRATION_1
-767    0x0050    //TX_MIC_CALIBRATION_2
-768    0x0050    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0042    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0800    //TX_TDDRC_ALPHA_UP_01
-784    0x0800    //TX_TDDRC_ALPHA_UP_02
-785    0x0800    //TX_TDDRC_ALPHA_UP_03
-786    0x0800    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0001    //TX_TDDRC_THRD_0
-855    0x0002    //TX_TDDRC_THRD_1
-856    0x1000    //TX_TDDRC_THRD_2
-857    0x1000    //TX_TDDRC_THRD_3
-858    0x6000    //TX_TDDRC_SLANT_0
-859    0x6000    //TX_TDDRC_SLANT_1
-860    0x0800    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0EF7    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x4000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-#RX
-0    0x027C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7652    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6648    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x7468    //RX_FDEQ_GAIN_9
-49    0x6060    //RX_FDEQ_GAIN_10
-50    0x6060    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x6060    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6648    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x7468    //RX_FDEQ_GAIN_9
-49    0x6060    //RX_FDEQ_GAIN_10
-50    0x6060    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x6060    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6648    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x7468    //RX_FDEQ_GAIN_9
-49    0x6060    //RX_FDEQ_GAIN_10
-50    0x6060    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x6060    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6648    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x7468    //RX_FDEQ_GAIN_9
-49    0x6060    //RX_FDEQ_GAIN_10
-50    0x6060    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x6060    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0026    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6648    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x7468    //RX_FDEQ_GAIN_9
-49    0x6060    //RX_FDEQ_GAIN_10
-50    0x6060    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x6060    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0035    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6648    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x7468    //RX_FDEQ_GAIN_9
-49    0x6060    //RX_FDEQ_GAIN_10
-50    0x6060    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x6060    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6648    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x7468    //RX_FDEQ_GAIN_9
-49    0x6060    //RX_FDEQ_GAIN_10
-50    0x6060    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x6060    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0082    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6648    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x7468    //RX_FDEQ_GAIN_9
-49    0x6060    //RX_FDEQ_GAIN_10
-50    0x6060    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x6060    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSFREE-HANDSFREE-VOICE_GENERIC-FB
-#PARAM_TYPE TX+RX
-#TOTAL_CUSTOM_STEP 7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x4B7C    //TX_SENDFUNC_MODE_0
+3    0x6B54    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0003    //TX_NUM_MIC
 6    0x0004    //TX_SAMPLINGFREQ_SIG
@@ -5287,8 +29,8 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0093    //TX_DIST2REF1
-22    0x001A    //TX_DIST2REF_02
+21    0x009D    //TX_DIST2REF1
+22    0x0010    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
@@ -5374,7 +116,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -5503,8 +245,8 @@
 234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -5517,11 +259,11 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
 254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
+255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0200    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
@@ -5549,11 +291,11 @@
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
 282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0016    //TX_NS_LVL_CTRL_4
-286    0x0014    //TX_NS_LVL_CTRL_5
-287    0x0011    //TX_NS_LVL_CTRL_6
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000F    //TX_MIN_GAIN_S_0
 290    0x0010    //TX_MIN_GAIN_S_1
@@ -5571,8 +313,8 @@
 302    0x4000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x50C0    //TX_SNRI_SUP_6
+305    0x50C0    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
@@ -5581,19 +323,19 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x5000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x4C00    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+315    0x4C00    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
+323    0x2000    //TX_B_POST_FILT_1
 324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
+325    0x4000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
-327    0x4000    //TX_B_POST_FILT_5
+327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
@@ -5601,14 +343,14 @@
 332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
 333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
 334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x6000    //TX_B_LESSCUT_RTO_S_6
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7C00    //TX_LAMBDA_PFILT
 339    0x7C00    //TX_LAMBDA_PFILT_S_0
 340    0x7C00    //TX_LAMBDA_PFILT_S_1
-341    0x7C00    //TX_LAMBDA_PFILT_S_2
-342    0x7A00    //TX_LAMBDA_PFILT_S_3
+341    0x7A00    //TX_LAMBDA_PFILT_S_2
+342    0x7C00    //TX_LAMBDA_PFILT_S_3
 343    0x7C00    //TX_LAMBDA_PFILT_S_4
 344    0x7C00    //TX_LAMBDA_PFILT_S_5
 345    0x7C00    //TX_LAMBDA_PFILT_S_6
@@ -5646,10 +388,10 @@
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x2710    //TX_NOISE_TH_6
 379    0x0033    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -5657,15 +399,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x4000    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -5780,16 +522,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -5818,19 +560,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -5838,14 +580,14 @@
 569    0x4848    //TX_FDEQ_GAIN_2
 570    0x4848    //TX_FDEQ_GAIN_3
 571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
+572    0x5048    //TX_FDEQ_GAIN_5
 573    0x4848    //TX_FDEQ_GAIN_6
 574    0x4848    //TX_FDEQ_GAIN_7
 575    0x4848    //TX_FDEQ_GAIN_8
 576    0x4848    //TX_FDEQ_GAIN_9
 577    0x5B5B    //TX_FDEQ_GAIN_10
-578    0x7373    //TX_FDEQ_GAIN_11
-579    0x739A    //TX_FDEQ_GAIN_12
+578    0x737B    //TX_FDEQ_GAIN_11
+579    0x7B9A    //TX_FDEQ_GAIN_12
 580    0x9AC4    //TX_FDEQ_GAIN_13
 581    0xC4C4    //TX_FDEQ_GAIN_14
 582    0xC4C4    //TX_FDEQ_GAIN_15
@@ -5882,7 +624,7 @@
 613    0x0000    //TX_FDEQ_BIN_22
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
 617    0x4848    //TX_PREEQ_GAIN_MIC0_0
 618    0x4848    //TX_PREEQ_GAIN_MIC0_1
 619    0x4848    //TX_PREEQ_GAIN_MIC0_2
@@ -5891,14 +633,14 @@
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
 623    0x4848    //TX_PREEQ_GAIN_MIC0_6
 624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+625    0x484B    //TX_PREEQ_GAIN_MIC0_8
 626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+627    0x484C    //TX_PREEQ_GAIN_MIC0_10
+628    0x4C4C    //TX_PREEQ_GAIN_MIC0_11
+629    0x4038    //TX_PREEQ_GAIN_MIC0_12
+630    0x3838    //TX_PREEQ_GAIN_MIC0_13
+631    0x4840    //TX_PREEQ_GAIN_MIC0_14
+632    0x3848    //TX_PREEQ_GAIN_MIC0_15
 633    0x4848    //TX_PREEQ_GAIN_MIC0_16
 634    0x4848    //TX_PREEQ_GAIN_MIC0_17
 635    0x4848    //TX_PREEQ_GAIN_MIC0_18
@@ -5907,23 +649,23 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x4000    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
 660    0x0000    //TX_PREEQ_BIN_MIC0_19
@@ -5932,19 +674,19 @@
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
 665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4846    //TX_PREEQ_GAIN_MIC1_0
-667    0x4544    //TX_PREEQ_GAIN_MIC1_1
-668    0x4240    //TX_PREEQ_GAIN_MIC1_2
-669    0x3E3C    //TX_PREEQ_GAIN_MIC1_3
-670    0x3A38    //TX_PREEQ_GAIN_MIC1_4
-671    0x3635    //TX_PREEQ_GAIN_MIC1_5
-672    0x3330    //TX_PREEQ_GAIN_MIC1_6
-673    0x2E2A    //TX_PREEQ_GAIN_MIC1_7
-674    0x2625    //TX_PREEQ_GAIN_MIC1_8
-675    0x2421    //TX_PREEQ_GAIN_MIC1_9
-676    0x1D19    //TX_PREEQ_GAIN_MIC1_10
-677    0x1820    //TX_PREEQ_GAIN_MIC1_11
-678    0x2830    //TX_PREEQ_GAIN_MIC1_12
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
 679    0x4848    //TX_PREEQ_GAIN_MIC1_13
 680    0x4848    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
@@ -6132,7 +874,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0CE6    //TX_TDDRC_DRC_GAIN
+866    0x0FDA    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -6163,6 +905,71 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
 0    0x006C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -6174,7 +981,7 @@
 7    0x4000    //RX_TDDRC_ALPHA_UP_2
 8    0x4000    //RX_TDDRC_ALPHA_UP_3
 9    0x4000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
+10    0x065B    //RX_PGA
 11    0x7E56    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -6206,19 +1013,19 @@
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
 41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
+42    0x4870    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4870    //RX_FDEQ_GAIN_6
-46    0x7070    //RX_FDEQ_GAIN_7
-47    0x7050    //RX_FDEQ_GAIN_8
-48    0x5050    //RX_FDEQ_GAIN_9
-49    0x5050    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x7070    //RX_FDEQ_GAIN_14
-54    0x7070    //RX_FDEQ_GAIN_15
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -6229,20 +1036,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -6288,7 +1095,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
@@ -6344,24 +1151,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
 41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
+42    0x4870    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4870    //RX_FDEQ_GAIN_6
-46    0x7070    //RX_FDEQ_GAIN_7
-47    0x7050    //RX_FDEQ_GAIN_8
-48    0x5050    //RX_FDEQ_GAIN_9
-49    0x5050    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x7070    //RX_FDEQ_GAIN_14
-54    0x7070    //RX_FDEQ_GAIN_15
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -6372,20 +1179,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -6443,24 +1250,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
 41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
+42    0x4870    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4870    //RX_FDEQ_GAIN_6
-46    0x7070    //RX_FDEQ_GAIN_7
-47    0x7050    //RX_FDEQ_GAIN_8
-48    0x5050    //RX_FDEQ_GAIN_9
-49    0x5050    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x7070    //RX_FDEQ_GAIN_14
-54    0x7070    //RX_FDEQ_GAIN_15
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -6471,20 +1278,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -6542,24 +1349,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
 41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
+42    0x4870    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4870    //RX_FDEQ_GAIN_6
-46    0x7070    //RX_FDEQ_GAIN_7
-47    0x7050    //RX_FDEQ_GAIN_8
-48    0x5050    //RX_FDEQ_GAIN_9
-49    0x5050    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x7070    //RX_FDEQ_GAIN_14
-54    0x7070    //RX_FDEQ_GAIN_15
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -6570,20 +1377,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -6616,7 +1423,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0026    //RX_SPK_VOL
+129    0x0025    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x4000    //RX_TDDRC_ALPHA_UP_1
@@ -6641,24 +1448,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
 41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
+42    0x4870    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4870    //RX_FDEQ_GAIN_6
-46    0x7070    //RX_FDEQ_GAIN_7
-47    0x7050    //RX_FDEQ_GAIN_8
-48    0x5050    //RX_FDEQ_GAIN_9
-49    0x5050    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x7070    //RX_FDEQ_GAIN_14
-54    0x7070    //RX_FDEQ_GAIN_15
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -6669,20 +1476,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -6715,7 +1522,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0035    //RX_SPK_VOL
+129    0x0034    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x4000    //RX_TDDRC_ALPHA_UP_1
@@ -6740,24 +1547,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
 41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
+42    0x4870    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4870    //RX_FDEQ_GAIN_6
-46    0x7070    //RX_FDEQ_GAIN_7
-47    0x7050    //RX_FDEQ_GAIN_8
-48    0x5050    //RX_FDEQ_GAIN_9
-49    0x5050    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x7070    //RX_FDEQ_GAIN_14
-54    0x7070    //RX_FDEQ_GAIN_15
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -6768,20 +1575,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -6814,7 +1621,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005C    //RX_SPK_VOL
+129    0x004D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x4000    //RX_TDDRC_ALPHA_UP_1
@@ -6839,24 +1646,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
 41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
+42    0x4870    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4870    //RX_FDEQ_GAIN_6
-46    0x7070    //RX_FDEQ_GAIN_7
-47    0x7050    //RX_FDEQ_GAIN_8
-48    0x5050    //RX_FDEQ_GAIN_9
-49    0x5050    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x7070    //RX_FDEQ_GAIN_14
-54    0x7070    //RX_FDEQ_GAIN_15
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -6867,20 +1674,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -6913,7 +1720,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0082    //RX_SPK_VOL
+129    0x0074    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x4000    //RX_TDDRC_ALPHA_UP_1
@@ -6938,24 +1745,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
 41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
+42    0x4870    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4870    //RX_FDEQ_GAIN_6
-46    0x7070    //RX_FDEQ_GAIN_7
-47    0x7050    //RX_FDEQ_GAIN_8
-48    0x5050    //RX_FDEQ_GAIN_9
-49    0x5050    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x7070    //RX_FDEQ_GAIN_14
-54    0x7070    //RX_FDEQ_GAIN_15
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -6966,20 +1773,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -7014,4 +1821,27555 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x006C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+167    0x065B    //RX_PGA
+168    0x7E56    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF400    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x00C8    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0025    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0034    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x004D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0074    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDFREE-CUSTOM2-FB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x6B5C    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009D    //TX_DIST2REF1
+22    0x0010    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0A19    //TX_PGA_0
+28    0x0A19    //TX_PGA_1
+29    0x0A19    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0300    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x2000    //TX_MIN_EQ_RE_EST_2
+155    0x4000    //TX_MIN_EQ_RE_EST_3
+156    0x4000    //TX_MIN_EQ_RE_EST_4
+157    0x7FFF    //TX_MIN_EQ_RE_EST_5
+158    0x7FFF    //TX_MIN_EQ_RE_EST_6
+159    0x7FFF    //TX_MIN_EQ_RE_EST_7
+160    0x7FFF    //TX_MIN_EQ_RE_EST_8
+161    0x7FFF    //TX_MIN_EQ_RE_EST_9
+162    0x7FFF    //TX_MIN_EQ_RE_EST_10
+163    0x7FFF    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0CCD    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x09C4    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7D00    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0DAC    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0063    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x50C0    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x4C00    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7C00    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7A00    //TX_LAMBDA_PFILT_S_2
+342    0x7C00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x0200    //TX_DT_BINVAD_TH_3
+357    0x1F40    //TX_DT_BINVAD_ENDF
+358    0x0100    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x4E20    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x59D8    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x2710    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x4000    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x5048    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x5B5B    //TX_FDEQ_GAIN_10
+578    0x737B    //TX_FDEQ_GAIN_11
+579    0x7B9A    //TX_FDEQ_GAIN_12
+580    0x9AC4    //TX_FDEQ_GAIN_13
+581    0xC4C4    //TX_FDEQ_GAIN_14
+582    0xC4C4    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4849    //TX_PREEQ_GAIN_MIC0_6
+624    0x4A4B    //TX_PREEQ_GAIN_MIC0_7
+625    0x4C4B    //TX_PREEQ_GAIN_MIC0_8
+626    0x4A48    //TX_PREEQ_GAIN_MIC0_9
+627    0x4B4C    //TX_PREEQ_GAIN_MIC0_10
+628    0x4C4B    //TX_PREEQ_GAIN_MIC0_11
+629    0x4838    //TX_PREEQ_GAIN_MIC0_12
+630    0x3858    //TX_PREEQ_GAIN_MIC0_13
+631    0x7060    //TX_PREEQ_GAIN_MIC0_14
+632    0x9870    //TX_PREEQ_GAIN_MIC0_15
+633    0x5848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x4000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x1812    //TX_PREEQ_BIN_MIC1_0
+691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x080A    //TX_PREEQ_BIN_MIC1_3
+694    0x0B09    //TX_PREEQ_BIN_MIC1_4
+695    0x0A06    //TX_PREEQ_BIN_MIC1_5
+696    0x0606    //TX_PREEQ_BIN_MIC1_6
+697    0x0605    //TX_PREEQ_BIN_MIC1_7
+698    0x050A    //TX_PREEQ_BIN_MIC1_8
+699    0x1505    //TX_PREEQ_BIN_MIC1_9
+700    0x0506    //TX_PREEQ_BIN_MIC1_10
+701    0x0615    //TX_PREEQ_BIN_MIC1_11
+702    0x1516    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x2021    //TX_PREEQ_BIN_MIC1_14
+705    0x2021    //TX_PREEQ_BIN_MIC1_15
+706    0x0800    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0004    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0016    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0FDA    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+10    0x065B    //RX_PGA
+11    0x7E56    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF400    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0012    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0012    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0025    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0034    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x004D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0074    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x006C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+167    0x065B    //RX_PGA
+168    0x7E56    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF400    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x00C8    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0025    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0034    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x004D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0074    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDFREE-CUSTOM1-FB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x6B74    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009D    //TX_DIST2REF1
+22    0x0010    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0A19    //TX_PGA_0
+28    0x0A19    //TX_PGA_1
+29    0x0A19    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0300    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x2000    //TX_MIN_EQ_RE_EST_2
+155    0x4000    //TX_MIN_EQ_RE_EST_3
+156    0x4000    //TX_MIN_EQ_RE_EST_4
+157    0x7FFF    //TX_MIN_EQ_RE_EST_5
+158    0x7FFF    //TX_MIN_EQ_RE_EST_6
+159    0x7FFF    //TX_MIN_EQ_RE_EST_7
+160    0x7FFF    //TX_MIN_EQ_RE_EST_8
+161    0x7FFF    //TX_MIN_EQ_RE_EST_9
+162    0x7FFF    //TX_MIN_EQ_RE_EST_10
+163    0x7FFF    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0CCD    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x09C4    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7D00    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0DAC    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0063    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x50C0    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x4C00    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7C00    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7A00    //TX_LAMBDA_PFILT_S_2
+342    0x7C00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x0200    //TX_DT_BINVAD_TH_3
+357    0x1F40    //TX_DT_BINVAD_ENDF
+358    0x0100    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x4E20    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x59D8    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x2710    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x4000    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x5048    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x5B5B    //TX_FDEQ_GAIN_10
+578    0x737B    //TX_FDEQ_GAIN_11
+579    0x7B9A    //TX_FDEQ_GAIN_12
+580    0x9AC4    //TX_FDEQ_GAIN_13
+581    0xC4C4    //TX_FDEQ_GAIN_14
+582    0xC4C4    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4849    //TX_PREEQ_GAIN_MIC0_6
+624    0x4A4B    //TX_PREEQ_GAIN_MIC0_7
+625    0x4C4B    //TX_PREEQ_GAIN_MIC0_8
+626    0x4A48    //TX_PREEQ_GAIN_MIC0_9
+627    0x4B4C    //TX_PREEQ_GAIN_MIC0_10
+628    0x4C4B    //TX_PREEQ_GAIN_MIC0_11
+629    0x4838    //TX_PREEQ_GAIN_MIC0_12
+630    0x3858    //TX_PREEQ_GAIN_MIC0_13
+631    0x7060    //TX_PREEQ_GAIN_MIC0_14
+632    0x9870    //TX_PREEQ_GAIN_MIC0_15
+633    0x5848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x4000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x1812    //TX_PREEQ_BIN_MIC1_0
+691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x080A    //TX_PREEQ_BIN_MIC1_3
+694    0x0B09    //TX_PREEQ_BIN_MIC1_4
+695    0x0A06    //TX_PREEQ_BIN_MIC1_5
+696    0x0606    //TX_PREEQ_BIN_MIC1_6
+697    0x0605    //TX_PREEQ_BIN_MIC1_7
+698    0x050A    //TX_PREEQ_BIN_MIC1_8
+699    0x1505    //TX_PREEQ_BIN_MIC1_9
+700    0x0506    //TX_PREEQ_BIN_MIC1_10
+701    0x0615    //TX_PREEQ_BIN_MIC1_11
+702    0x1516    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x2021    //TX_PREEQ_BIN_MIC1_14
+705    0x2021    //TX_PREEQ_BIN_MIC1_15
+706    0x0800    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0004    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0016    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0FDA    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+10    0x065B    //RX_PGA
+11    0x7E56    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF400    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0012    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0012    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0025    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0034    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x004D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0074    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x006C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+167    0x065B    //RX_PGA
+168    0x7E56    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF400    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x00C8    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0025    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0034    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x004D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0074    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDFREE-VOICE_GENERIC-NB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0073    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009C    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x053D    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0100    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0200    //TX_MIN_EQ_RE_EST_0
+153    0x0200    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x1800    //TX_MIN_EQ_RE_EST_7
+160    0x1800    //TX_MIN_EQ_RE_EST_8
+161    0x3000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x6000    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x2000    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0200    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7148    //TX_DTD_THR1_0
+198    0x7148    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x157C    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x1000    //TX_ADPT_STRICT_L
+222    0x1000    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF900    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0050    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x01A0    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x7F00    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0800    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0017    //TX_NS_LVL_CTRL_1
+283    0x0015    //TX_NS_LVL_CTRL_2
+284    0x0012    //TX_NS_LVL_CTRL_3
+285    0x0012    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0012    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000F    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x000F    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x4000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x1000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x2400    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x2000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x1000    //TX_A_POST_FILT_S_3
+318    0x3000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x5000    //TX_B_POST_FILT_3
+326    0x3000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7D00    //TX_LAMBDA_PFILT_S_0
+340    0x7400    //TX_LAMBDA_PFILT_S_1
+341    0x7900    //TX_LAMBDA_PFILT_S_2
+342    0x7000    //TX_LAMBDA_PFILT_S_3
+343    0x7D00    //TX_LAMBDA_PFILT_S_4
+344    0x7D00    //TX_LAMBDA_PFILT_S_5
+345    0x7900    //TX_LAMBDA_PFILT_S_6
+346    0x7D00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0FA0    //TX_DT_BINVAD_ENDF
+358    0x0200    //TX_C_POST_FLT_DT
+359    0x4000    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x03ED    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x5528    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0FA0    //TX_NOISE_TH_6
+379    0x000A    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x1000    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x7000    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x000A    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x007A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x5000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0014    //TX_FDEQ_SUBNUM
+567    0x5250    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4A43    //TX_FDEQ_GAIN_3
+571    0x374B    //TX_FDEQ_GAIN_4
+572    0x3444    //TX_FDEQ_GAIN_5
+573    0x433C    //TX_FDEQ_GAIN_6
+574    0x3A37    //TX_FDEQ_GAIN_7
+575    0x2A2A    //TX_FDEQ_GAIN_8
+576    0x2C2C    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0014    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4A4A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4B4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4D4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x484A    //TX_PREEQ_GAIN_MIC2_6
+722    0x4B4B    //TX_PREEQ_GAIN_MIC2_7
+723    0x4B4C    //TX_PREEQ_GAIN_MIC2_8
+724    0x4D50    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0202    //TX_PREEQ_BIN_MIC2_0
+740    0x0203    //TX_PREEQ_BIN_MIC2_1
+741    0x0303    //TX_PREEQ_BIN_MIC2_2
+742    0x0304    //TX_PREEQ_BIN_MIC2_3
+743    0x0405    //TX_PREEQ_BIN_MIC2_4
+744    0x0506    //TX_PREEQ_BIN_MIC2_5
+745    0x0708    //TX_PREEQ_BIN_MIC2_6
+746    0x090A    //TX_PREEQ_BIN_MIC2_7
+747    0x0B0C    //TX_PREEQ_BIN_MIC2_8
+748    0x0D0E    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x4000    //TX_TDDRC_ALPHA_UP_02
+785    0x4000    //TX_TDDRC_ALPHA_UP_03
+786    0x4000    //TX_TDDRC_ALPHA_UP_04
+787    0x6000    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0010    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x4000    //TX_TDDRC_ALPHA_UP_00
+861    0x6000    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0DCE    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x0050    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x000C    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7E90    //TX_DTD_THR1_MICMUTE_0
+912    0x7918    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0xE0C0    //TX_AMS_RESRV_02
+945    0x1770    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x247C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x4000    //RX_TDDRC_ALPHA_DWN_2
+29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x5252    //RX_FDEQ_GAIN_0
+40    0x4E4F    //RX_FDEQ_GAIN_1
+41    0x4743    //RX_FDEQ_GAIN_2
+42    0x454C    //RX_FDEQ_GAIN_3
+43    0x4C49    //RX_FDEQ_GAIN_4
+44    0x584A    //RX_FDEQ_GAIN_5
+45    0x4642    //RX_FDEQ_GAIN_6
+46    0x4043    //RX_FDEQ_GAIN_7
+47    0x454A    //RX_FDEQ_GAIN_8
+48    0x4C53    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0503    //RX_FDEQ_BIN_4
+68    0x0107    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0004    //RX_FILTINDX
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0B50    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x805A    //RX_FDEQ_GAIN_1
+41    0x6060    //RX_FDEQ_GAIN_2
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8681    //RX_FDEQ_GAIN_4
+44    0x776D    //RX_FDEQ_GAIN_5
+45    0x5E55    //RX_FDEQ_GAIN_6
+46    0x544B    //RX_FDEQ_GAIN_7
+47    0x4B4D    //RX_FDEQ_GAIN_8
+48    0x5254    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x1407    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x003D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x805A    //RX_FDEQ_GAIN_1
+41    0x6060    //RX_FDEQ_GAIN_2
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8681    //RX_FDEQ_GAIN_4
+44    0x776D    //RX_FDEQ_GAIN_5
+45    0x5E55    //RX_FDEQ_GAIN_6
+46    0x544B    //RX_FDEQ_GAIN_7
+47    0x4B4D    //RX_FDEQ_GAIN_8
+48    0x5254    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x1407    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x805A    //RX_FDEQ_GAIN_1
+41    0x6060    //RX_FDEQ_GAIN_2
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8681    //RX_FDEQ_GAIN_4
+44    0x776D    //RX_FDEQ_GAIN_5
+45    0x5E55    //RX_FDEQ_GAIN_6
+46    0x544B    //RX_FDEQ_GAIN_7
+47    0x4B4D    //RX_FDEQ_GAIN_8
+48    0x5254    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x1407    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0087    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x805A    //RX_FDEQ_GAIN_1
+41    0x6060    //RX_FDEQ_GAIN_2
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8681    //RX_FDEQ_GAIN_4
+44    0x776D    //RX_FDEQ_GAIN_5
+45    0x5E55    //RX_FDEQ_GAIN_6
+46    0x544B    //RX_FDEQ_GAIN_7
+47    0x4B4D    //RX_FDEQ_GAIN_8
+48    0x5254    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x1407    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00CE    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x013B    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x805A    //RX_FDEQ_GAIN_1
+41    0x6060    //RX_FDEQ_GAIN_2
+42    0x707C    //RX_FDEQ_GAIN_3
+43    0x8681    //RX_FDEQ_GAIN_4
+44    0x776D    //RX_FDEQ_GAIN_5
+45    0x5E55    //RX_FDEQ_GAIN_6
+46    0x5448    //RX_FDEQ_GAIN_7
+47    0x484D    //RX_FDEQ_GAIN_8
+48    0x5254    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x1407    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x020B    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x845A    //RX_FDEQ_GAIN_1
+41    0x6060    //RX_FDEQ_GAIN_2
+42    0x6E7E    //RX_FDEQ_GAIN_3
+43    0x8486    //RX_FDEQ_GAIN_4
+44    0x816D    //RX_FDEQ_GAIN_5
+45    0x5E55    //RX_FDEQ_GAIN_6
+46    0x5448    //RX_FDEQ_GAIN_7
+47    0x484D    //RX_FDEQ_GAIN_8
+48    0x5254    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x1407    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x845A    //RX_FDEQ_GAIN_1
+41    0x6060    //RX_FDEQ_GAIN_2
+42    0x677E    //RX_FDEQ_GAIN_3
+43    0x888B    //RX_FDEQ_GAIN_4
+44    0x8B82    //RX_FDEQ_GAIN_5
+45    0x6450    //RX_FDEQ_GAIN_6
+46    0x4B41    //RX_FDEQ_GAIN_7
+47    0x3F41    //RX_FDEQ_GAIN_8
+48    0x4546    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x1407    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x027C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0005    //RX_FILTINDX
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0015    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001E    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x002A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x003C    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0058    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0082    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDFREE-VOICE_GENERIC-WB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0073    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009C    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x053D    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0C00    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0300    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6C00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0200    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x5000    //TX_GAIN_NP
+169    0x02A0    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x01B0    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7148    //TX_DTD_THR1_0
+198    0x7148    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x5000    //TX_DTD_THR2_0
+205    0x5000    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x07D0    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x01CC    //TX_RATIO_DT_L_TH_HIGH
+226    0x4A38    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x015E    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x50C0    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x4C00    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7C00    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7A00    //TX_LAMBDA_PFILT_S_2
+342    0x7C00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1388    //TX_DT_BINVAD_ENDF
+358    0x2000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0032    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x017E    //TX_NOISE_TH_1
+371    0x0230    //TX_NOISE_TH_2
+372    0x3492    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x55B8    //TX_NOISE_TH_5
+375    0x49E6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0F0A    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x7FFF    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x4000    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x5048    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4A4F    //TX_FDEQ_GAIN_2
+570    0x4E48    //TX_FDEQ_GAIN_3
+571    0x4444    //TX_FDEQ_GAIN_4
+572    0x444B    //TX_FDEQ_GAIN_5
+573    0x4E50    //TX_FDEQ_GAIN_6
+574    0x544D    //TX_FDEQ_GAIN_7
+575    0x464C    //TX_FDEQ_GAIN_8
+576    0x4844    //TX_FDEQ_GAIN_9
+577    0x393C    //TX_FDEQ_GAIN_10
+578    0x3C3C    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0F10    //TX_FDEQ_BIN_10
+602    0x1011    //TX_FDEQ_BIN_11
+603    0x1112    //TX_FDEQ_BIN_12
+604    0x120B    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+651    0x0F10    //TX_PREEQ_BIN_MIC0_10
+652    0x1011    //TX_PREEQ_BIN_MIC0_11
+653    0x1112    //TX_PREEQ_BIN_MIC0_12
+654    0x120B    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x484A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5454    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0F10    //TX_PREEQ_BIN_MIC1_10
+701    0x1011    //TX_PREEQ_BIN_MIC1_11
+702    0x1112    //TX_PREEQ_BIN_MIC1_12
+703    0x120B    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x484A    //TX_PREEQ_GAIN_MIC2_3
+719    0x4B4A    //TX_PREEQ_GAIN_MIC2_4
+720    0x4B4C    //TX_PREEQ_GAIN_MIC2_5
+721    0x4C4D    //TX_PREEQ_GAIN_MIC2_6
+722    0x4F50    //TX_PREEQ_GAIN_MIC2_7
+723    0x5050    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5252    //TX_PREEQ_GAIN_MIC2_10
+726    0x5253    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x5454    //TX_PREEQ_GAIN_MIC2_13
+729    0x5455    //TX_PREEQ_GAIN_MIC2_14
+730    0x5555    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0808    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0002    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x10CA    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x03C0    //TX_MICMUTE_RATIO_THR
+900    0x0122    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x6590    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0xE4A8    //TX_AMS_RESRV_02
+945    0x1770    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x247C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7B02    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x847A    //RX_FDEQ_GAIN_0
+40    0x6C66    //RX_FDEQ_GAIN_1
+41    0x6868    //RX_FDEQ_GAIN_2
+42    0x7084    //RX_FDEQ_GAIN_3
+43    0x7E82    //RX_FDEQ_GAIN_4
+44    0x7874    //RX_FDEQ_GAIN_5
+45    0x5864    //RX_FDEQ_GAIN_6
+46    0x625C    //RX_FDEQ_GAIN_7
+47    0x5C50    //RX_FDEQ_GAIN_8
+48    0x545A    //RX_FDEQ_GAIN_9
+49    0x5C58    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0202    //RX_FDEQ_BIN_3
+67    0x0704    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x0CE0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03FC    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0B50    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0039    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0055    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0082    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00C0    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x012F    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01FF    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x8464    //RX_FDEQ_GAIN_0
+40    0x5454    //RX_FDEQ_GAIN_1
+41    0x5A5D    //RX_FDEQ_GAIN_2
+42    0x7078    //RX_FDEQ_GAIN_3
+43    0x8078    //RX_FDEQ_GAIN_4
+44    0x7272    //RX_FDEQ_GAIN_5
+45    0x6761    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03FC    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x8464    //RX_FDEQ_GAIN_0
+40    0x4F4F    //RX_FDEQ_GAIN_1
+41    0x5457    //RX_FDEQ_GAIN_2
+42    0x5C66    //RX_FDEQ_GAIN_3
+43    0x7982    //RX_FDEQ_GAIN_4
+44    0x827D    //RX_FDEQ_GAIN_5
+45    0x6A52    //RX_FDEQ_GAIN_6
+46    0x5352    //RX_FDEQ_GAIN_7
+47    0x585F    //RX_FDEQ_GAIN_8
+48    0x5E55    //RX_FDEQ_GAIN_9
+49    0x5353    //RX_FDEQ_GAIN_10
+50    0x5358    //RX_FDEQ_GAIN_11
+51    0x645B    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0A0A    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x027C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7B02    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0011    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0011    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0019    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0024    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0033    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x8854    //RX_FDEQ_GAIN_5
+202    0x5448    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x7070    //RX_FDEQ_GAIN_10
+207    0x8070    //RX_FDEQ_GAIN_11
+208    0x6060    //RX_FDEQ_GAIN_12
+209    0x7070    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0049    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x8854    //RX_FDEQ_GAIN_5
+202    0x5448    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x7070    //RX_FDEQ_GAIN_10
+207    0x8070    //RX_FDEQ_GAIN_11
+208    0x6060    //RX_FDEQ_GAIN_12
+209    0x7070    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0074    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6864    //RX_FDEQ_GAIN_1
+198    0x7070    //RX_FDEQ_GAIN_2
+199    0x6058    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x8854    //RX_FDEQ_GAIN_5
+202    0x5448    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x7070    //RX_FDEQ_GAIN_10
+207    0x8070    //RX_FDEQ_GAIN_11
+208    0x6060    //RX_FDEQ_GAIN_12
+209    0x7070    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDFREE-VOICE_GENERIC-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00F3    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009C    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7600    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x0600    //TX_MIN_EQ_RE_EST_1
+154    0x3000    //TX_MIN_EQ_RE_EST_2
+155    0x3000    //TX_MIN_EQ_RE_EST_3
+156    0x3000    //TX_MIN_EQ_RE_EST_4
+157    0x3000    //TX_MIN_EQ_RE_EST_5
+158    0x3000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x7800    //TX_MIN_EQ_RE_EST_8
+161    0x7800    //TX_MIN_EQ_RE_EST_9
+162    0x7800    //TX_MIN_EQ_RE_EST_10
+163    0x7800    //TX_MIN_EQ_RE_EST_11
+164    0x7800    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x3000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0680    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7B0C    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x36B0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x01F4    //TX_RATIO_DT_L_TH_HIGH
+226    0x59D8    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x00C8    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0000    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0024    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x7FFF    //TX_A_POST_FILT_S_1
+316    0x7FFF    //TX_A_POST_FILT_S_2
+317    0x7FFF    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x7FFF    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x6000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7F00    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x3E80    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x36B0    //TX_DT_BINVAD_ENDF
+358    0x0200    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x36B0    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x2CEC    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E5C    //TX_FDEQ_GAIN_6
+574    0x564E    //TX_FDEQ_GAIN_7
+575    0x4C4E    //TX_FDEQ_GAIN_8
+576    0x4E45    //TX_FDEQ_GAIN_9
+577    0x494A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x5C54    //TX_FDEQ_GAIN_12
+580    0x5466    //TX_FDEQ_GAIN_13
+581    0x5C70    //TX_FDEQ_GAIN_14
+582    0x7C84    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0004    //TX_TDDRC_THRD_1
+856    0x1000    //TX_TDDRC_THRD_2
+857    0x1000    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x1380    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x01C2    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7918    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x3A98    //TX_DTD_THR1_MICMUTE_2
+914    0x32C8    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0xE4A8    //TX_AMS_RESRV_02
+945    0x1770    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x247C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x847C    //RX_FDEQ_GAIN_0
+40    0x5A56    //RX_FDEQ_GAIN_1
+41    0x6266    //RX_FDEQ_GAIN_2
+42    0x6E7A    //RX_FDEQ_GAIN_3
+43    0x8678    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x706E    //RX_FDEQ_GAIN_6
+46    0x6C64    //RX_FDEQ_GAIN_7
+47    0x5C6A    //RX_FDEQ_GAIN_8
+48    0x6268    //RX_FDEQ_GAIN_9
+49    0x6462    //RX_FDEQ_GAIN_10
+50    0x646E    //RX_FDEQ_GAIN_11
+51    0x6860    //RX_FDEQ_GAIN_12
+52    0x646A    //RX_FDEQ_GAIN_13
+53    0x7478    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0105    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x0CE0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03FC    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0B50    //RX_MAX_G_FP
+129    0x0058    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0039    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0054    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0085    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00C7    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0134    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01EE    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8464    //RX_FDEQ_GAIN_0
+40    0x5150    //RX_FDEQ_GAIN_1
+41    0x555C    //RX_FDEQ_GAIN_2
+42    0x6E75    //RX_FDEQ_GAIN_3
+43    0x8077    //RX_FDEQ_GAIN_4
+44    0x756D    //RX_FDEQ_GAIN_5
+45    0x6667    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03AD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F4F    //RX_FDEQ_GAIN_1
+41    0x555A    //RX_FDEQ_GAIN_2
+42    0x6069    //RX_FDEQ_GAIN_3
+43    0x7D86    //RX_FDEQ_GAIN_4
+44    0x8682    //RX_FDEQ_GAIN_5
+45    0x7461    //RX_FDEQ_GAIN_6
+46    0x5352    //RX_FDEQ_GAIN_7
+47    0x5860    //RX_FDEQ_GAIN_8
+48    0x5D5F    //RX_FDEQ_GAIN_9
+49    0x5A52    //RX_FDEQ_GAIN_10
+50    0x535A    //RX_FDEQ_GAIN_11
+51    0x6654    //RX_FDEQ_GAIN_12
+52    0x6068    //RX_FDEQ_GAIN_13
+53    0x6F69    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x027C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0014    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0039    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0054    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0085    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x00C7    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0134    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01EE    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8464    //RX_FDEQ_GAIN_0
+197    0x5150    //RX_FDEQ_GAIN_1
+198    0x555C    //RX_FDEQ_GAIN_2
+199    0x6E75    //RX_FDEQ_GAIN_3
+200    0x8077    //RX_FDEQ_GAIN_4
+201    0x756D    //RX_FDEQ_GAIN_5
+202    0x6667    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0006    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03AD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F4F    //RX_FDEQ_GAIN_1
+198    0x555A    //RX_FDEQ_GAIN_2
+199    0x6069    //RX_FDEQ_GAIN_3
+200    0x7D86    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7461    //RX_FDEQ_GAIN_6
+203    0x5352    //RX_FDEQ_GAIN_7
+204    0x5860    //RX_FDEQ_GAIN_8
+205    0x5D5F    //RX_FDEQ_GAIN_9
+206    0x5A52    //RX_FDEQ_GAIN_10
+207    0x535A    //RX_FDEQ_GAIN_11
+208    0x6654    //RX_FDEQ_GAIN_12
+209    0x6068    //RX_FDEQ_GAIN_13
+210    0x6F69    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDFREE-VOICE_GENERIC-FB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x4B7C    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009D    //TX_DIST2REF1
+22    0x0010    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0A19    //TX_PGA_0
+28    0x0A19    //TX_PGA_1
+29    0x0A19    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0300    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x2000    //TX_MIN_EQ_RE_EST_2
+155    0x4000    //TX_MIN_EQ_RE_EST_3
+156    0x4000    //TX_MIN_EQ_RE_EST_4
+157    0x7FFF    //TX_MIN_EQ_RE_EST_5
+158    0x7FFF    //TX_MIN_EQ_RE_EST_6
+159    0x7FFF    //TX_MIN_EQ_RE_EST_7
+160    0x7FFF    //TX_MIN_EQ_RE_EST_8
+161    0x7FFF    //TX_MIN_EQ_RE_EST_9
+162    0x7FFF    //TX_MIN_EQ_RE_EST_10
+163    0x7FFF    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0CCD    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x09C4    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7D00    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0DAC    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0063    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x50C0    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x4C00    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7C00    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7A00    //TX_LAMBDA_PFILT_S_2
+342    0x7C00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x0200    //TX_DT_BINVAD_TH_3
+357    0x1F40    //TX_DT_BINVAD_ENDF
+358    0x0100    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x4E20    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x59D8    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x2710    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x4000    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x5048    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x5B5B    //TX_FDEQ_GAIN_10
+578    0x737B    //TX_FDEQ_GAIN_11
+579    0x7B9A    //TX_FDEQ_GAIN_12
+580    0x9AC4    //TX_FDEQ_GAIN_13
+581    0xC4C4    //TX_FDEQ_GAIN_14
+582    0xC4C4    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4849    //TX_PREEQ_GAIN_MIC0_6
+624    0x4A4B    //TX_PREEQ_GAIN_MIC0_7
+625    0x4C4B    //TX_PREEQ_GAIN_MIC0_8
+626    0x4A48    //TX_PREEQ_GAIN_MIC0_9
+627    0x4B4C    //TX_PREEQ_GAIN_MIC0_10
+628    0x4C4B    //TX_PREEQ_GAIN_MIC0_11
+629    0x4838    //TX_PREEQ_GAIN_MIC0_12
+630    0x3858    //TX_PREEQ_GAIN_MIC0_13
+631    0x7060    //TX_PREEQ_GAIN_MIC0_14
+632    0x9870    //TX_PREEQ_GAIN_MIC0_15
+633    0x5848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x4000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4645    //TX_PREEQ_GAIN_MIC1_6
+673    0x4442    //TX_PREEQ_GAIN_MIC1_7
+674    0x4140    //TX_PREEQ_GAIN_MIC1_8
+675    0x3E3D    //TX_PREEQ_GAIN_MIC1_9
+676    0x3C3C    //TX_PREEQ_GAIN_MIC1_10
+677    0x3C3C    //TX_PREEQ_GAIN_MIC1_11
+678    0x3938    //TX_PREEQ_GAIN_MIC1_12
+679    0x3A3C    //TX_PREEQ_GAIN_MIC1_13
+680    0x3C3E    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x4000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0004    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0016    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0FDA    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+10    0x065B    //RX_PGA
+11    0x7E56    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF400    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0012    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0012    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0025    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0034    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x004D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0074    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x006C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+167    0x065B    //RX_PGA
+168    0x7E56    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF400    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0025    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0034    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x004D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0074    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDFREE-RESERVE2-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00F3    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009C    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7600    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x0600    //TX_MIN_EQ_RE_EST_1
+154    0x3000    //TX_MIN_EQ_RE_EST_2
+155    0x3000    //TX_MIN_EQ_RE_EST_3
+156    0x3000    //TX_MIN_EQ_RE_EST_4
+157    0x3000    //TX_MIN_EQ_RE_EST_5
+158    0x3000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x7800    //TX_MIN_EQ_RE_EST_8
+161    0x7800    //TX_MIN_EQ_RE_EST_9
+162    0x7800    //TX_MIN_EQ_RE_EST_10
+163    0x7800    //TX_MIN_EQ_RE_EST_11
+164    0x7800    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x3000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0680    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7B0C    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x36B0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x01F4    //TX_RATIO_DT_L_TH_HIGH
+226    0x59D8    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x00C8    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0000    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0024    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x7FFF    //TX_A_POST_FILT_S_1
+316    0x7FFF    //TX_A_POST_FILT_S_2
+317    0x7FFF    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x7FFF    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x6000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7F00    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x3E80    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x36B0    //TX_DT_BINVAD_ENDF
+358    0x0200    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x36B0    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x2CEC    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E5C    //TX_FDEQ_GAIN_6
+574    0x564E    //TX_FDEQ_GAIN_7
+575    0x4C4E    //TX_FDEQ_GAIN_8
+576    0x4E45    //TX_FDEQ_GAIN_9
+577    0x494A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x5C54    //TX_FDEQ_GAIN_12
+580    0x5466    //TX_FDEQ_GAIN_13
+581    0x5C70    //TX_FDEQ_GAIN_14
+582    0x7C84    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0004    //TX_TDDRC_THRD_1
+856    0x1000    //TX_TDDRC_THRD_2
+857    0x1000    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x1380    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x01C2    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7918    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x3A98    //TX_DTD_THR1_MICMUTE_2
+914    0x32C8    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0xE4A8    //TX_AMS_RESRV_02
+945    0x1770    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x247C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x847C    //RX_FDEQ_GAIN_0
+40    0x5A56    //RX_FDEQ_GAIN_1
+41    0x6266    //RX_FDEQ_GAIN_2
+42    0x6E7A    //RX_FDEQ_GAIN_3
+43    0x8678    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x706E    //RX_FDEQ_GAIN_6
+46    0x6C64    //RX_FDEQ_GAIN_7
+47    0x5C6A    //RX_FDEQ_GAIN_8
+48    0x6268    //RX_FDEQ_GAIN_9
+49    0x6462    //RX_FDEQ_GAIN_10
+50    0x646E    //RX_FDEQ_GAIN_11
+51    0x6860    //RX_FDEQ_GAIN_12
+52    0x646A    //RX_FDEQ_GAIN_13
+53    0x7478    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0105    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x0CE0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03FC    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0B50    //RX_MAX_G_FP
+129    0x0058    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0039    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0054    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0085    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00C7    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0134    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01EE    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8464    //RX_FDEQ_GAIN_0
+40    0x5150    //RX_FDEQ_GAIN_1
+41    0x555C    //RX_FDEQ_GAIN_2
+42    0x6E75    //RX_FDEQ_GAIN_3
+43    0x8077    //RX_FDEQ_GAIN_4
+44    0x756D    //RX_FDEQ_GAIN_5
+45    0x6667    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03AD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F4F    //RX_FDEQ_GAIN_1
+41    0x555A    //RX_FDEQ_GAIN_2
+42    0x6069    //RX_FDEQ_GAIN_3
+43    0x7D86    //RX_FDEQ_GAIN_4
+44    0x8682    //RX_FDEQ_GAIN_5
+45    0x7461    //RX_FDEQ_GAIN_6
+46    0x5352    //RX_FDEQ_GAIN_7
+47    0x5860    //RX_FDEQ_GAIN_8
+48    0x5D5F    //RX_FDEQ_GAIN_9
+49    0x5A52    //RX_FDEQ_GAIN_10
+50    0x535A    //RX_FDEQ_GAIN_11
+51    0x6654    //RX_FDEQ_GAIN_12
+52    0x6068    //RX_FDEQ_GAIN_13
+53    0x6F69    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x027C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0014    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0039    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0054    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0085    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x00C7    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0134    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01EE    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8464    //RX_FDEQ_GAIN_0
+197    0x5150    //RX_FDEQ_GAIN_1
+198    0x555C    //RX_FDEQ_GAIN_2
+199    0x6E75    //RX_FDEQ_GAIN_3
+200    0x8077    //RX_FDEQ_GAIN_4
+201    0x756D    //RX_FDEQ_GAIN_5
+202    0x6667    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0006    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03AD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F4F    //RX_FDEQ_GAIN_1
+198    0x555A    //RX_FDEQ_GAIN_2
+199    0x6069    //RX_FDEQ_GAIN_3
+200    0x7D86    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7461    //RX_FDEQ_GAIN_6
+203    0x5352    //RX_FDEQ_GAIN_7
+204    0x5860    //RX_FDEQ_GAIN_8
+205    0x5D5F    //RX_FDEQ_GAIN_9
+206    0x5A52    //RX_FDEQ_GAIN_10
+207    0x535A    //RX_FDEQ_GAIN_11
+208    0x6654    //RX_FDEQ_GAIN_12
+209    0x6068    //RX_FDEQ_GAIN_13
+210    0x6F69    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDFREE-CUSTOM1-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0073    //TX_PATCH_REG
+3    0x6B74    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009C    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7600    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x0600    //TX_MIN_EQ_RE_EST_1
+154    0x3000    //TX_MIN_EQ_RE_EST_2
+155    0x3000    //TX_MIN_EQ_RE_EST_3
+156    0x3000    //TX_MIN_EQ_RE_EST_4
+157    0x3000    //TX_MIN_EQ_RE_EST_5
+158    0x3000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x7800    //TX_MIN_EQ_RE_EST_8
+161    0x7800    //TX_MIN_EQ_RE_EST_9
+162    0x7800    //TX_MIN_EQ_RE_EST_10
+163    0x7800    //TX_MIN_EQ_RE_EST_11
+164    0x7800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x3000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x05DC    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x36B0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1F40    //TX_RATIO_DT_L_TH_HIGH
+226    0x5014    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x2328    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0000    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x003C    //TX_NS_LVL_CTRL_1
+283    0x0024    //TX_NS_LVL_CTRL_2
+284    0x003C    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x003C    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x7FFF    //TX_A_POST_FILT_S_1
+316    0x7FFF    //TX_A_POST_FILT_S_2
+317    0x7FFF    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x7FFF    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x6000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7F00    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x0100    //TX_DT_BINVAD_TH_3
+357    0x36B0    //TX_DT_BINVAD_ENDF
+358    0x0200    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x36B0    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x2CEC    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0001    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484B    //TX_FDEQ_GAIN_5
+573    0x4B5C    //TX_FDEQ_GAIN_6
+574    0x564E    //TX_FDEQ_GAIN_7
+575    0x4C4E    //TX_FDEQ_GAIN_8
+576    0x4E45    //TX_FDEQ_GAIN_9
+577    0x494A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x5C57    //TX_FDEQ_GAIN_12
+580    0x5667    //TX_FDEQ_GAIN_13
+581    0x6778    //TX_FDEQ_GAIN_14
+582    0x8087    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0004    //TX_TDDRC_THRD_1
+856    0x1000    //TX_TDDRC_THRD_2
+857    0x1000    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0E21    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x206C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0029    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0039    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x008E    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x027C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0014    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0014    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0029    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0039    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x5454    //RX_FDEQ_GAIN_4
+201    0x7C54    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005F    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x5454    //RX_FDEQ_GAIN_4
+201    0x7C54    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x008E    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x5454    //RX_FDEQ_GAIN_4
+201    0x7C54    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDFREE-CUSTOM2-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0073    //TX_PATCH_REG
+3    0x6B5C    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009C    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7600    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x0600    //TX_MIN_EQ_RE_EST_1
+154    0x3000    //TX_MIN_EQ_RE_EST_2
+155    0x3000    //TX_MIN_EQ_RE_EST_3
+156    0x3000    //TX_MIN_EQ_RE_EST_4
+157    0x3000    //TX_MIN_EQ_RE_EST_5
+158    0x3000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x7800    //TX_MIN_EQ_RE_EST_8
+161    0x7800    //TX_MIN_EQ_RE_EST_9
+162    0x7800    //TX_MIN_EQ_RE_EST_10
+163    0x7800    //TX_MIN_EQ_RE_EST_11
+164    0x7800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x3000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x05DC    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x36B0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1F40    //TX_RATIO_DT_L_TH_HIGH
+226    0x5014    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x2328    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0000    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x003C    //TX_NS_LVL_CTRL_1
+283    0x0024    //TX_NS_LVL_CTRL_2
+284    0x003C    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x003C    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x7FFF    //TX_A_POST_FILT_S_1
+316    0x7FFF    //TX_A_POST_FILT_S_2
+317    0x7FFF    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x7FFF    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x6000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7F00    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x0100    //TX_DT_BINVAD_TH_3
+357    0x36B0    //TX_DT_BINVAD_ENDF
+358    0x0200    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x36B0    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x2CEC    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0001    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484B    //TX_FDEQ_GAIN_5
+573    0x4B5C    //TX_FDEQ_GAIN_6
+574    0x564E    //TX_FDEQ_GAIN_7
+575    0x4C4E    //TX_FDEQ_GAIN_8
+576    0x4E45    //TX_FDEQ_GAIN_9
+577    0x494A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x5C57    //TX_FDEQ_GAIN_12
+580    0x5667    //TX_FDEQ_GAIN_13
+581    0x6778    //TX_FDEQ_GAIN_14
+582    0x8087    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0004    //TX_TDDRC_THRD_1
+856    0x1000    //TX_TDDRC_THRD_2
+857    0x1000    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0E21    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x206C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0029    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0039    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x008E    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x027C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0014    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0014    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0029    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0039    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x5454    //RX_FDEQ_GAIN_4
+201    0x7C54    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005F    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x5454    //RX_FDEQ_GAIN_4
+201    0x7C54    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x008E    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x5454    //RX_FDEQ_GAIN_4
+201    0x7C54    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDFREE-RESERVE1-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0073    //TX_PATCH_REG
+3    0x6B54    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009C    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7600    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x0600    //TX_MIN_EQ_RE_EST_1
+154    0x3000    //TX_MIN_EQ_RE_EST_2
+155    0x3000    //TX_MIN_EQ_RE_EST_3
+156    0x3000    //TX_MIN_EQ_RE_EST_4
+157    0x3000    //TX_MIN_EQ_RE_EST_5
+158    0x3000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x7800    //TX_MIN_EQ_RE_EST_8
+161    0x7800    //TX_MIN_EQ_RE_EST_9
+162    0x7800    //TX_MIN_EQ_RE_EST_10
+163    0x7800    //TX_MIN_EQ_RE_EST_11
+164    0x7800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x3000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x05DC    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x36B0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1F40    //TX_RATIO_DT_L_TH_HIGH
+226    0x5014    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x2328    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0000    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x003C    //TX_NS_LVL_CTRL_1
+283    0x0024    //TX_NS_LVL_CTRL_2
+284    0x003C    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x003C    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x7FFF    //TX_A_POST_FILT_S_1
+316    0x7FFF    //TX_A_POST_FILT_S_2
+317    0x7FFF    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x7FFF    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x6000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7F00    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x0100    //TX_DT_BINVAD_TH_3
+357    0x36B0    //TX_DT_BINVAD_ENDF
+358    0x0200    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x36B0    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x2CEC    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0001    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484B    //TX_FDEQ_GAIN_5
+573    0x4B5C    //TX_FDEQ_GAIN_6
+574    0x564E    //TX_FDEQ_GAIN_7
+575    0x4C4E    //TX_FDEQ_GAIN_8
+576    0x4E45    //TX_FDEQ_GAIN_9
+577    0x494A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x5C57    //TX_FDEQ_GAIN_12
+580    0x5667    //TX_FDEQ_GAIN_13
+581    0x6778    //TX_FDEQ_GAIN_14
+582    0x8087    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0004    //TX_TDDRC_THRD_1
+856    0x1000    //TX_TDDRC_THRD_2
+857    0x1000    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0E21    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x206C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0029    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0039    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x008E    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x032A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x3B3B    //RX_FDEQ_GAIN_1
+41    0x3942    //RX_FDEQ_GAIN_2
+42    0x4645    //RX_FDEQ_GAIN_3
+43    0x494A    //RX_FDEQ_GAIN_4
+44    0x5D5A    //RX_FDEQ_GAIN_5
+45    0x5B5B    //RX_FDEQ_GAIN_6
+46    0x5A51    //RX_FDEQ_GAIN_7
+47    0x514F    //RX_FDEQ_GAIN_8
+48    0x5568    //RX_FDEQ_GAIN_9
+49    0x7460    //RX_FDEQ_GAIN_10
+50    0x544E    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x484A    //RX_FDEQ_GAIN_13
+53    0x5155    //RX_FDEQ_GAIN_14
+54    0x577B    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0308    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x027C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0014    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0014    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0029    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0039    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x5454    //RX_FDEQ_GAIN_4
+201    0x7C54    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005F    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x5454    //RX_FDEQ_GAIN_4
+201    0x7C54    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x008E    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x5454    //RX_FDEQ_GAIN_4
+201    0x7C54    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
diff --git a/audio/tangorpro/tuning/fortemedia/HEADSET.dat b/audio/tangorpro/tuning/fortemedia/HEADSET.dat
index 888d5e1..bd56ea7 100644
Binary files a/audio/tangorpro/tuning/fortemedia/HEADSET.dat and b/audio/tangorpro/tuning/fortemedia/HEADSET.dat differ
diff --git a/audio/tangorpro/tuning/fortemedia/HEADSET.mods b/audio/tangorpro/tuning/fortemedia/HEADSET.mods
index 14c9608..5fd23d1 100644
--- a/audio/tangorpro/tuning/fortemedia/HEADSET.mods
+++ b/audio/tangorpro/tuning/fortemedia/HEADSET.mods
@@ -1,15 +1,17 @@
 #PLATFORM_NAME  gChip
-#SINGLE_API_VER  1.1.6
-#SAVE_TIME  2021-01-15 16:25:40
+#EXPORT_FLAG  HEADSET
+#SINGLE_API_VER  1.2.1
+#SAVE_TIME  2022-06-16 10:41:54
 
 #CASE_NAME  HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x2B68    //TX_SENDFUNC_MODE_0
+3    0x2F68    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0000    //TX_SAMPLINGFREQ_SIG
@@ -257,12 +259,12 @@
 248    0xFA00    //TX_THR_SN_EST_6
 249    0xFA00    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0000    //TX_DELTA_THR_SN_EST_2
-253    0x0400    //TX_DELTA_THR_SN_EST_3
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0400    //TX_DELTA_THR_SN_EST_2
+253    0x0000    //TX_DELTA_THR_SN_EST_3
 254    0x0000    //TX_DELTA_THR_SN_EST_4
 255    0x0000    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
+256    0x0100    //TX_DELTA_THR_SN_EST_6
 257    0x0000    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -289,28 +291,28 @@
 280    0x0400    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
 282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0014    //TX_NS_LVL_CTRL_4
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0014    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
 286    0x0010    //TX_NS_LVL_CTRL_5
-287    0x0010    //TX_NS_LVL_CTRL_6
+287    0x0014    //TX_NS_LVL_CTRL_6
 288    0x0010    //TX_NS_LVL_CTRL_7
 289    0x000D    //TX_MIN_GAIN_S_0
 290    0x0012    //TX_MIN_GAIN_S_1
 291    0x0012    //TX_MIN_GAIN_S_2
 292    0x0012    //TX_MIN_GAIN_S_3
-293    0x0012    //TX_MIN_GAIN_S_4
+293    0x000D    //TX_MIN_GAIN_S_4
 294    0x000D    //TX_MIN_GAIN_S_5
-295    0x000D    //TX_MIN_GAIN_S_6
+295    0x0012    //TX_MIN_GAIN_S_6
 296    0x000D    //TX_MIN_GAIN_S_7
 297    0x7FFF    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
+301    0x5000    //TX_SNRI_SUP_1
 302    0x5000    //TX_SNRI_SUP_2
-303    0x5000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
+303    0x6000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
 305    0x7FFF    //TX_SNRI_SUP_5
 306    0x7FFF    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
@@ -321,20 +323,20 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x7FFF    //TX_A_POST_FILT_S_1
-316    0x1000    //TX_A_POST_FILT_S_2
-317    0x7000    //TX_A_POST_FILT_S_3
+315    0x1000    //TX_A_POST_FILT_S_1
+316    0x7000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
 318    0x4000    //TX_A_POST_FILT_S_4
 319    0x4000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
+320    0x7FFF    //TX_A_POST_FILT_S_6
 321    0x4000    //TX_A_POST_FILT_S_7
 322    0x0400    //TX_B_POST_FILT_0
-323    0x0400    //TX_B_POST_FILT_1
+323    0x2000    //TX_B_POST_FILT_1
 324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
+325    0x4000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
 327    0x2000    //TX_B_POST_FILT_5
-328    0x2000    //TX_B_POST_FILT_6
+328    0x0400    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
 331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
@@ -346,12 +348,12 @@
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7E14    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7F00    //TX_LAMBDA_PFILT_S_1
-341    0x7C29    //TX_LAMBDA_PFILT_S_2
-342    0x6000    //TX_LAMBDA_PFILT_S_3
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x6000    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
 343    0x7C29    //TX_LAMBDA_PFILT_S_4
 344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
 346    0x7C29    //TX_LAMBDA_PFILT_S_7
 347    0x0200    //TX_K_PEPPER
 348    0x0400    //TX_A_PEPPER
@@ -373,23 +375,23 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
-367    0x0029    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
+367    0x003B    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x0900    //TX_NOISE_TH_1
 371    0x0033    //TX_NOISE_TH_2
-372    0x423D    //TX_NOISE_TH_3
+372    0x36B0    //TX_NOISE_TH_3
 373    0x0231    //TX_NOISE_TH_4
 374    0x68DE    //TX_NOISE_TH_5
 375    0x5784    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x0000    //TX_NOISE_TH_5_4
-378    0x02EF    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+378    0x00C8    //TX_NOISE_TH_6
+379    0x00C8    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
 385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
@@ -397,22 +399,22 @@
 388    0x00CE    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x0032    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x7FFF    //TX_MIN_G_CTRL_SSNS
 409    0x0000    //TX_METAL_RTO_THR
@@ -520,16 +522,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -558,31 +560,31 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0014    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4848    //TX_FDEQ_GAIN_2
 570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4448    //TX_FDEQ_GAIN_4
-572    0x4442    //TX_FDEQ_GAIN_5
-573    0x3032    //TX_FDEQ_GAIN_6
-574    0x363A    //TX_FDEQ_GAIN_7
-575    0x3830    //TX_FDEQ_GAIN_8
-576    0x3838    //TX_FDEQ_GAIN_9
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x443C    //TX_FDEQ_GAIN_5
+573    0x2A30    //TX_FDEQ_GAIN_6
+574    0x2C2C    //TX_FDEQ_GAIN_7
+575    0x2820    //TX_FDEQ_GAIN_8
+576    0x2024    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
 579    0x4848    //TX_FDEQ_GAIN_12
@@ -606,7 +608,7 @@
 597    0x0708    //TX_FDEQ_BIN_6
 598    0x090A    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D08    //TX_FDEQ_BIN_9
+600    0x0D0E    //TX_FDEQ_BIN_9
 601    0x0000    //TX_FDEQ_BIN_10
 602    0x0000    //TX_FDEQ_BIN_11
 603    0x0000    //TX_FDEQ_BIN_12
@@ -777,12 +779,12 @@
 768    0x0065    //TX_MIC_CALIBRATION_3
 769    0x0044    //TX_MIC_PWR_BIAS_0
 770    0x0044    //TX_MIC_PWR_BIAS_1
-771    0x0044    //TX_MIC_PWR_BIAS_2
-772    0x0044    //TX_MIC_PWR_BIAS_3
-773    0x000B    //TX_GAIN_LIMIT_0
-774    0x000B    //TX_GAIN_LIMIT_1
-775    0x000B    //TX_GAIN_LIMIT_2
-776    0x000B    //TX_GAIN_LIMIT_3
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0000    //TX_GAIN_LIMIT_1
+775    0x0007    //TX_GAIN_LIMIT_2
+776    0x0007    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -895,16 +897,81 @@
 886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
 888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0x2000    //TX_FASTNS_MASK5_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0024    //RX_RECVFUNC_MODE_0
+0    0x243C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -929,7 +996,7 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -937,7 +1004,7 @@
 30    0x0002    //RX_EXTRA_NS_L
 31    0x0800    //RX_EXTRA_NS_A
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+33    0x7220    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 35    0x199A    //RX_A_POST_FLT
 36    0x0000    //RX_LMT_THRD
@@ -948,11 +1015,11 @@
 41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
+44    0x4748    //RX_FDEQ_GAIN_5
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -976,7 +1043,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1018,22 +1085,22 @@
 111    0x0002    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1D00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
+124    0x0211    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000B    //RX_SPK_VOL
+126    0x280A    //RX_TPKA_FP
+127    0x032D    //RX_MIN_G_FP
+128    0x0A00    //RX_MAX_G_FP
+129    0x0009    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -1070,21 +1137,21 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+33    0x7220    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1D00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
+124    0x0211    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -1095,7 +1162,7 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1119,7 +1186,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1158,7 +1225,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000B    //RX_SPK_VOL
+129    0x000A    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -1169,21 +1236,21 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+33    0x7220    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1D00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
+124    0x0211    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -1194,7 +1261,7 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1218,7 +1285,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1257,7 +1324,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0010    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -1268,21 +1335,21 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+33    0x7220    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1D00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
+124    0x0211    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -1293,7 +1360,7 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1317,7 +1384,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1356,7 +1423,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x001A    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -1367,21 +1434,21 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+33    0x7220    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1D00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
+124    0x0211    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -1392,7 +1459,7 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1416,7 +1483,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1455,7 +1522,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x002C    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -1466,21 +1533,21 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+33    0x7220    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1D00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
+124    0x0211    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -1491,7 +1558,7 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1515,7 +1582,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1554,7 +1621,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
+129    0x0049    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -1565,21 +1632,21 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+33    0x7220    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1D00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
+124    0x0211    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -1590,7 +1657,7 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1614,7 +1681,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1653,7 +1720,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
+129    0x007C    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -1664,21 +1731,21 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+33    0x7220    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1D00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
+124    0x0211    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -1689,7 +1756,7 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1713,7 +1780,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1754,15 +1821,867 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x243C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0211    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x280A    //RX_TPKA_FP
+284    0x032D    //RX_MIN_G_FP
+285    0x0A00    //RX_MAX_G_FP
+286    0x0009    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0211    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0009    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0211    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0211    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0211    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x002C    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0211    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0049    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0211    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x007C    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0211    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-USB_BLACKBIRD-VOICE_GENERIC-WB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x2B68    //TX_SENDFUNC_MODE_0
+3    0x2F68    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
@@ -1909,7 +2828,7 @@
 147    0x0080    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x4500    //TX_EAD_THR
+150    0x36B0    //TX_EAD_THR
 151    0x0800    //TX_THR_RE_EST
 152    0x0800    //TX_MIN_EQ_RE_EST_0
 153    0x0800    //TX_MIN_EQ_RE_EST_1
@@ -2001,29 +2920,29 @@
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
+242    0xFA00    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
 244    0xF700    //TX_THR_SN_EST_2
-245    0xFA00    //TX_THR_SN_EST_3
+245    0xFC00    //TX_THR_SN_EST_3
 246    0xF800    //TX_THR_SN_EST_4
 247    0xF400    //TX_THR_SN_EST_5
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0100    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -2041,18 +2960,18 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x0018    //TX_NS_LVL_CTRL_1
-283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0012    //TX_NS_LVL_CTRL_4
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x001C    //TX_NS_LVL_CTRL_2
+284    0x0012    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
+287    0x0018    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x0009    //TX_MIN_GAIN_S_4
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x0009    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
 295    0x000C    //TX_MIN_GAIN_S_6
 296    0x000F    //TX_MIN_GAIN_S_7
@@ -2060,10 +2979,10 @@
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x6000    //TX_SNRI_SUP_2
-303    0x5000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
+301    0x6000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
 305    0x7FFF    //TX_SNRI_SUP_5
 306    0x7FFF    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
@@ -2074,17 +2993,17 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x3000    //TX_B_POST_FILT_3
+324    0x3000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
 326    0x1000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -2099,12 +3018,12 @@
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7CCD    //TX_LAMBDA_PFILT
 339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7F00    //TX_LAMBDA_PFILT_S_1
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
 341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7000    //TX_LAMBDA_PFILT_S_3
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
 343    0x7B00    //TX_LAMBDA_PFILT_S_4
 344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
 346    0x7B00    //TX_LAMBDA_PFILT_S_7
 347    0x0200    //TX_K_PEPPER
 348    0x0400    //TX_A_PEPPER
@@ -2126,7 +3045,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
-367    0x0065    //TX_NOISE_TH_0
+367    0x0102    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x0900    //TX_NOISE_TH_1
@@ -2138,11 +3057,11 @@
 376    0x7FFF    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x00FB    //TX_NOISE_TH_6
-379    0x0029    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x00F8    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -2150,22 +3069,22 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0029    //TX_MINENOISE_MIC0_TH
+406    0x00DC    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x7FFF    //TX_MIN_G_CTRL_SSNS
 409    0x0800    //TX_METAL_RTO_THR
@@ -2273,16 +3192,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -2311,31 +3230,31 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x001C    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
+570    0x4849    //TX_FDEQ_GAIN_3
 571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4442    //TX_FDEQ_GAIN_5
-573    0x3434    //TX_FDEQ_GAIN_6
-574    0x3C3A    //TX_FDEQ_GAIN_7
-575    0x3838    //TX_FDEQ_GAIN_8
-576    0x3838    //TX_FDEQ_GAIN_9
+572    0x4140    //TX_FDEQ_GAIN_5
+573    0x3838    //TX_FDEQ_GAIN_6
+574    0x3839    //TX_FDEQ_GAIN_7
+575    0x3830    //TX_FDEQ_GAIN_8
+576    0x3033    //TX_FDEQ_GAIN_9
 577    0x2E2E    //TX_FDEQ_GAIN_10
 578    0x2A2A    //TX_FDEQ_GAIN_11
 579    0x2A32    //TX_FDEQ_GAIN_12
@@ -2363,7 +3282,7 @@
 601    0x0E0F    //TX_FDEQ_BIN_10
 602    0x0F10    //TX_FDEQ_BIN_11
 603    0x1011    //TX_FDEQ_BIN_12
-604    0x1104    //TX_FDEQ_BIN_13
+604    0x1112    //TX_FDEQ_BIN_13
 605    0x0000    //TX_FDEQ_BIN_14
 606    0x0000    //TX_FDEQ_BIN_15
 607    0x0000    //TX_FDEQ_BIN_16
@@ -2530,12 +3449,12 @@
 768    0x0062    //TX_MIC_CALIBRATION_3
 769    0x0046    //TX_MIC_PWR_BIAS_0
 770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
+771    0x0048    //TX_MIC_PWR_BIAS_2
+772    0x0048    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0000    //TX_GAIN_LIMIT_1
+775    0x0003    //TX_GAIN_LIMIT_2
+776    0x0003    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -2656,8 +3575,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x002C    //RX_RECVFUNC_MODE_0
+0    0x243C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -2682,7 +3666,7 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -2702,14 +3686,14 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x484B    //RX_FDEQ_GAIN_6
+46    0x4B48    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
 48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
+49    0x4846    //RX_FDEQ_GAIN_10
+50    0x403F    //RX_FDEQ_GAIN_11
+51    0x3F40    //RX_FDEQ_GAIN_12
+52    0x4248    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -2771,21 +3755,21 @@
 111    0x0002    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1200    //RX_TDDRC_THRD_3
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1D00    //RX_TDDRC_THRD_3
 116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x01AE    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
+126    0x280A    //RX_TPKA_FP
+127    0x032D    //RX_MIN_G_FP
+128    0x0A00    //RX_MAX_G_FP
 129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
@@ -2823,21 +3807,21 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+33    0x7220    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1200    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x01A0    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -2845,14 +3829,14 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x484B    //RX_FDEQ_GAIN_6
+46    0x4B48    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
+48    0x4444    //RX_FDEQ_GAIN_9
+49    0x4846    //RX_FDEQ_GAIN_10
+50    0x403F    //RX_FDEQ_GAIN_11
+51    0x3F3F    //RX_FDEQ_GAIN_12
+52    0x4248    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -2922,21 +3906,21 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+33    0x7220    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1200    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x01A0    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -2944,14 +3928,14 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x484B    //RX_FDEQ_GAIN_6
+46    0x4B48    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
+48    0x4444    //RX_FDEQ_GAIN_9
+49    0x4846    //RX_FDEQ_GAIN_10
+50    0x403F    //RX_FDEQ_GAIN_11
+51    0x3F3F    //RX_FDEQ_GAIN_12
+52    0x4248    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -3010,7 +3994,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0012    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -3021,21 +4005,21 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+33    0x7220    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1200    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x01A0    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -3043,14 +4027,14 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x484B    //RX_FDEQ_GAIN_6
+46    0x4B48    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
+48    0x4444    //RX_FDEQ_GAIN_9
+49    0x4846    //RX_FDEQ_GAIN_10
+50    0x403F    //RX_FDEQ_GAIN_11
+51    0x3F3F    //RX_FDEQ_GAIN_12
+52    0x4248    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -3109,7 +4093,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x001E    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -3120,21 +4104,21 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+33    0x7220    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1200    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x01A0    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -3142,14 +4126,14 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x484B    //RX_FDEQ_GAIN_6
+46    0x4B48    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
+48    0x4444    //RX_FDEQ_GAIN_9
+49    0x4846    //RX_FDEQ_GAIN_10
+50    0x403F    //RX_FDEQ_GAIN_11
+51    0x3F3F    //RX_FDEQ_GAIN_12
+52    0x4248    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -3208,7 +4192,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0031    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -3219,21 +4203,21 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+33    0x7220    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1200    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x01A0    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -3241,14 +4225,14 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x484B    //RX_FDEQ_GAIN_6
+46    0x4B48    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
+48    0x4444    //RX_FDEQ_GAIN_9
+49    0x4846    //RX_FDEQ_GAIN_10
+50    0x403F    //RX_FDEQ_GAIN_11
+51    0x3F3F    //RX_FDEQ_GAIN_12
+52    0x4248    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -3307,7 +4291,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
+129    0x0052    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -3318,21 +4302,21 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+33    0x7220    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1200    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x01A0    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -3340,14 +4324,14 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x484B    //RX_FDEQ_GAIN_6
+46    0x4B48    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
+48    0x4444    //RX_FDEQ_GAIN_9
+49    0x4846    //RX_FDEQ_GAIN_10
+50    0x403F    //RX_FDEQ_GAIN_11
+51    0x3F3F    //RX_FDEQ_GAIN_12
+52    0x4248    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -3406,7 +4390,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
+129    0x008B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -3417,21 +4401,21 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+33    0x7220    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1200    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x01A0    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -3439,14 +4423,14 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x484B    //RX_FDEQ_GAIN_6
+46    0x4B48    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
+48    0x4444    //RX_FDEQ_GAIN_9
+49    0x4846    //RX_FDEQ_GAIN_10
+50    0x403F    //RX_FDEQ_GAIN_11
+51    0x3F3F    //RX_FDEQ_GAIN_12
+52    0x4248    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -3507,15 +4491,867 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x243C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484B    //RX_FDEQ_GAIN_6
+203    0x4B48    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4846    //RX_FDEQ_GAIN_10
+207    0x403F    //RX_FDEQ_GAIN_11
+208    0x3F40    //RX_FDEQ_GAIN_12
+209    0x4248    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1D00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01AE    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x280A    //RX_TPKA_FP
+284    0x032D    //RX_MIN_G_FP
+285    0x0A00    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01A0    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484B    //RX_FDEQ_GAIN_6
+203    0x4B48    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4846    //RX_FDEQ_GAIN_10
+207    0x403F    //RX_FDEQ_GAIN_11
+208    0x3F3F    //RX_FDEQ_GAIN_12
+209    0x4248    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01A0    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484B    //RX_FDEQ_GAIN_6
+203    0x4B48    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4846    //RX_FDEQ_GAIN_10
+207    0x403F    //RX_FDEQ_GAIN_11
+208    0x3F3F    //RX_FDEQ_GAIN_12
+209    0x4248    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01A0    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484B    //RX_FDEQ_GAIN_6
+203    0x4B48    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4846    //RX_FDEQ_GAIN_10
+207    0x403F    //RX_FDEQ_GAIN_11
+208    0x3F3F    //RX_FDEQ_GAIN_12
+209    0x4248    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001E    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01A0    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484B    //RX_FDEQ_GAIN_6
+203    0x4B48    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4846    //RX_FDEQ_GAIN_10
+207    0x403F    //RX_FDEQ_GAIN_11
+208    0x3F3F    //RX_FDEQ_GAIN_12
+209    0x4248    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0031    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01A0    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484B    //RX_FDEQ_GAIN_6
+203    0x4B48    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4846    //RX_FDEQ_GAIN_10
+207    0x403F    //RX_FDEQ_GAIN_11
+208    0x3F3F    //RX_FDEQ_GAIN_12
+209    0x4248    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0052    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01A0    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484B    //RX_FDEQ_GAIN_6
+203    0x4B48    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4846    //RX_FDEQ_GAIN_10
+207    0x403F    //RX_FDEQ_GAIN_11
+208    0x3F3F    //RX_FDEQ_GAIN_12
+209    0x4248    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x008B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01A0    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484B    //RX_FDEQ_GAIN_6
+203    0x4B48    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4846    //RX_FDEQ_GAIN_10
+207    0x403F    //RX_FDEQ_GAIN_11
+208    0x3F3F    //RX_FDEQ_GAIN_12
+209    0x4248    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-USB_BLACKBIRD-VOICE_GENERIC-SWB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
-0    0x0001    //TX_OPERATION_MODE_0
+0    0x0009    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x6B68    //TX_SENDFUNC_MODE_0
+3    0x6F68    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
@@ -3709,9 +5545,9 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7D00    //TX_DTD_THR1_0
+197    0x6590    //TX_DTD_THR1_0
 198    0x7D00    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
+199    0x6590    //TX_DTD_THR1_2
 200    0x7FFF    //TX_DTD_THR1_3
 201    0x7FFF    //TX_DTD_THR1_4
 202    0x7FFF    //TX_DTD_THR1_5
@@ -3754,7 +5590,7 @@
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
+242    0xFA00    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
 244    0xF700    //TX_THR_SN_EST_2
 245    0xFA00    //TX_THR_SN_EST_3
@@ -3763,20 +5599,20 @@
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0100    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -3794,18 +5630,18 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x0018    //TX_NS_LVL_CTRL_1
-283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0012    //TX_NS_LVL_CTRL_4
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0012    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
+287    0x001C    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x0009    //TX_MIN_GAIN_S_4
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x0009    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
 295    0x000C    //TX_MIN_GAIN_S_6
 296    0x000F    //TX_MIN_GAIN_S_7
@@ -3813,12 +5649,12 @@
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x6000    //TX_SNRI_SUP_2
-303    0x5000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
+301    0x6000    //TX_SNRI_SUP_1
+302    0x5000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
 305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
+306    0x3000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x000E    //TX_G_LFNS
@@ -3827,17 +5663,17 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x3000    //TX_B_POST_FILT_3
+324    0x3000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
 326    0x1000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -3852,12 +5688,12 @@
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7CCD    //TX_LAMBDA_PFILT
 339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7F00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7000    //TX_LAMBDA_PFILT_S_3
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7000    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
 343    0x7B00    //TX_LAMBDA_PFILT_S_4
 344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
 346    0x7B00    //TX_LAMBDA_PFILT_S_7
 347    0x0200    //TX_K_PEPPER
 348    0x0400    //TX_A_PEPPER
@@ -3879,23 +5715,23 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
+367    0x00FA    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
+370    0x0C80    //TX_NOISE_TH_1
 371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
+372    0x2904    //TX_NOISE_TH_3
+373    0x07D0    //TX_NOISE_TH_4
 374    0x157C    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x7FFF    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -3903,22 +5739,22 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0004    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x0064    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x7FFF    //TX_MIN_G_CTRL_SSNS
 409    0x0800    //TX_METAL_RTO_THR
@@ -4026,16 +5862,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -4064,19 +5900,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -4085,16 +5921,16 @@
 570    0x4848    //TX_FDEQ_GAIN_3
 571    0x4848    //TX_FDEQ_GAIN_4
 572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
+573    0x4040    //TX_FDEQ_GAIN_6
+574    0x4040    //TX_FDEQ_GAIN_7
+575    0x4040    //TX_FDEQ_GAIN_8
 576    0x3838    //TX_FDEQ_GAIN_9
-577    0x3C3C    //TX_FDEQ_GAIN_10
-578    0x3C28    //TX_FDEQ_GAIN_11
+577    0x3838    //TX_FDEQ_GAIN_10
+578    0x3828    //TX_FDEQ_GAIN_11
 579    0x2828    //TX_FDEQ_GAIN_12
-580    0x3030    //TX_FDEQ_GAIN_13
-581    0x3030    //TX_FDEQ_GAIN_14
-582    0x5048    //TX_FDEQ_GAIN_15
+580    0x2828    //TX_FDEQ_GAIN_13
+581    0x1C1C    //TX_FDEQ_GAIN_14
+582    0x1C1C    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
@@ -4118,7 +5954,7 @@
 603    0x1B1E    //TX_FDEQ_BIN_12
 604    0x1E1E    //TX_FDEQ_BIN_13
 605    0x1E28    //TX_FDEQ_BIN_14
-606    0x282C    //TX_FDEQ_BIN_15
+606    0x284A    //TX_FDEQ_BIN_15
 607    0x0000    //TX_FDEQ_BIN_16
 608    0x0000    //TX_FDEQ_BIN_17
 609    0x0000    //TX_FDEQ_BIN_18
@@ -4282,13 +6118,13 @@
 767    0x0062    //TX_MIC_CALIBRATION_2
 768    0x0062    //TX_MIC_CALIBRATION_3
 769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
+770    0x0050    //TX_MIC_PWR_BIAS_1
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0002    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -4401,6 +6237,5346 @@
 886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
 888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x243C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E52    //RX_FDEQ_GAIN_0
+40    0x5252    //RX_FDEQ_GAIN_1
+41    0x5252    //RX_FDEQ_GAIN_2
+42    0x5250    //RX_FDEQ_GAIN_3
+43    0x4C46    //RX_FDEQ_GAIN_4
+44    0x4748    //RX_FDEQ_GAIN_5
+45    0x5768    //RX_FDEQ_GAIN_6
+46    0x6162    //RX_FDEQ_GAIN_7
+47    0x5252    //RX_FDEQ_GAIN_8
+48    0x5256    //RX_FDEQ_GAIN_9
+49    0x5248    //RX_FDEQ_GAIN_10
+50    0x3434    //RX_FDEQ_GAIN_11
+51    0x3436    //RX_FDEQ_GAIN_12
+52    0x2A18    //RX_FDEQ_GAIN_13
+53    0x1830    //RX_FDEQ_GAIN_14
+54    0x3648    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x023E    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x0D90    //RX_TPKA_FP
+127    0x032D    //RX_MIN_G_FP
+128    0x0A00    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0011    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0030    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0050    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0089    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x243C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E52    //RX_FDEQ_GAIN_0
+197    0x5252    //RX_FDEQ_GAIN_1
+198    0x5252    //RX_FDEQ_GAIN_2
+199    0x5250    //RX_FDEQ_GAIN_3
+200    0x4C46    //RX_FDEQ_GAIN_4
+201    0x4748    //RX_FDEQ_GAIN_5
+202    0x5768    //RX_FDEQ_GAIN_6
+203    0x6162    //RX_FDEQ_GAIN_7
+204    0x5252    //RX_FDEQ_GAIN_8
+205    0x5256    //RX_FDEQ_GAIN_9
+206    0x5248    //RX_FDEQ_GAIN_10
+207    0x3434    //RX_FDEQ_GAIN_11
+208    0x3436    //RX_FDEQ_GAIN_12
+209    0x2A18    //RX_FDEQ_GAIN_13
+210    0x1830    //RX_FDEQ_GAIN_14
+211    0x3648    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x023E    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x0D90    //RX_TPKA_FP
+284    0x032D    //RX_MIN_G_FP
+285    0x0A00    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0011    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0030    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0050    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0089    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-USB_BLACKBIRD-VOICE_GENERIC-FB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0009    //TX_OPERATION_MODE_1
+2    0x0020    //TX_PATCH_REG
+3    0x6B6A    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B4C    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0200    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x61A8    //TX_EAD_THR
+151    0x0400    //TX_THR_RE_EST
+152    0x3000    //TX_MIN_EQ_RE_EST_0
+153    0x3000    //TX_MIN_EQ_RE_EST_1
+154    0x4000    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x6000    //TX_MIN_EQ_RE_EST_6
+159    0x6000    //TX_MIN_EQ_RE_EST_7
+160    0x6000    //TX_MIN_EQ_RE_EST_8
+161    0x6000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x4000    //TX_MIN_EQ_RE_EST_11
+164    0x4000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x3000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x0800    //TX_DTD_THR1_0
+198    0x0800    //TX_DTD_THR1_1
+199    0x0800    //TX_DTD_THR1_2
+200    0x0800    //TX_DTD_THR1_3
+201    0x0800    //TX_DTD_THR1_4
+202    0x0800    //TX_DTD_THR1_5
+203    0x0800    //TX_DTD_THR1_6
+204    0x0800    //TX_DTD_THR2_0
+205    0x0800    //TX_DTD_THR2_1
+206    0x0800    //TX_DTD_THR2_2
+207    0x0800    //TX_DTD_THR2_3
+208    0x0800    //TX_DTD_THR2_4
+209    0x0100    //TX_DTD_THR2_5
+210    0x0100    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00C0    //TX_EPD_OFFSET_00
+233    0x00C0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF700    //TX_THR_SN_EST_0
+243    0xFB00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF700    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF600    //TX_THR_SN_EST_5
+248    0xF600    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0200    //TX_DELTA_THR_SN_EST_0
+251    0x0400    //TX_DELTA_THR_SN_EST_1
+252    0x0300    //TX_DELTA_THR_SN_EST_2
+253    0x0600    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0012    //TX_NS_LVL_CTRL_0
+282    0x0020    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0019    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x0011    //TX_MIN_GAIN_S_6
+296    0x000C    //TX_MIN_GAIN_S_7
+297    0x0800    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7000    //TX_SNRI_SUP_0
+301    0x1000    //TX_SNRI_SUP_1
+302    0x7000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0016    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x6000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x6000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7CCD    //TX_LAMBDA_PFILT_S_0
+340    0x7CCD    //TX_LAMBDA_PFILT_S_1
+341    0x7CCD    //TX_LAMBDA_PFILT_S_2
+342    0x7CCD    //TX_LAMBDA_PFILT_S_3
+343    0x7CCD    //TX_LAMBDA_PFILT_S_4
+344    0x7CCD    //TX_LAMBDA_PFILT_S_5
+345    0x7CCD    //TX_LAMBDA_PFILT_S_6
+346    0x7CCD    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0500    //TX_A_PEPPER
+349    0x1600    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x04E8    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x02A6    //TX_NOISE_TH_1
+371    0x07DA    //TX_NOISE_TH_2
+372    0x3194    //TX_NOISE_TH_3
+373    0x0960    //TX_NOISE_TH_4
+374    0x5555    //TX_NOISE_TH_5
+375    0x3FF4    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x02BC    //TX_NOISE_TH_6
+379    0x02BC    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x04E7    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x484C    //TX_FDEQ_GAIN_10
+578    0x5054    //TX_FDEQ_GAIN_11
+579    0x606C    //TX_FDEQ_GAIN_12
+580    0x7890    //TX_FDEQ_GAIN_13
+581    0x9C9C    //TX_FDEQ_GAIN_14
+582    0x9C9C    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2020    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0001    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x242C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7B02    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0500    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000A    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7000    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4858    //RX_FDEQ_GAIN_0
+40    0x6265    //RX_FDEQ_GAIN_1
+41    0x6568    //RX_FDEQ_GAIN_2
+42    0x5654    //RX_FDEQ_GAIN_3
+43    0x676E    //RX_FDEQ_GAIN_4
+44    0x6E6B    //RX_FDEQ_GAIN_5
+45    0x5B5F    //RX_FDEQ_GAIN_6
+46    0x5864    //RX_FDEQ_GAIN_7
+47    0x6548    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0231    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x280A    //RX_TPKA_FP
+127    0x032D    //RX_MIN_G_FP
+128    0x0A00    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0231    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4858    //RX_FDEQ_GAIN_0
+40    0x6265    //RX_FDEQ_GAIN_1
+41    0x6568    //RX_FDEQ_GAIN_2
+42    0x5654    //RX_FDEQ_GAIN_3
+43    0x676E    //RX_FDEQ_GAIN_4
+44    0x6E6B    //RX_FDEQ_GAIN_5
+45    0x5B5F    //RX_FDEQ_GAIN_6
+46    0x5864    //RX_FDEQ_GAIN_7
+47    0x6548    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0231    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4858    //RX_FDEQ_GAIN_0
+40    0x6265    //RX_FDEQ_GAIN_1
+41    0x6568    //RX_FDEQ_GAIN_2
+42    0x5654    //RX_FDEQ_GAIN_3
+43    0x676E    //RX_FDEQ_GAIN_4
+44    0x6E6B    //RX_FDEQ_GAIN_5
+45    0x5B5F    //RX_FDEQ_GAIN_6
+46    0x5864    //RX_FDEQ_GAIN_7
+47    0x6548    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0012    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0231    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4858    //RX_FDEQ_GAIN_0
+40    0x6265    //RX_FDEQ_GAIN_1
+41    0x6568    //RX_FDEQ_GAIN_2
+42    0x5654    //RX_FDEQ_GAIN_3
+43    0x676E    //RX_FDEQ_GAIN_4
+44    0x6E6B    //RX_FDEQ_GAIN_5
+45    0x5B5F    //RX_FDEQ_GAIN_6
+46    0x5864    //RX_FDEQ_GAIN_7
+47    0x6548    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0231    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4858    //RX_FDEQ_GAIN_0
+40    0x6265    //RX_FDEQ_GAIN_1
+41    0x6568    //RX_FDEQ_GAIN_2
+42    0x5654    //RX_FDEQ_GAIN_3
+43    0x676E    //RX_FDEQ_GAIN_4
+44    0x6E6B    //RX_FDEQ_GAIN_5
+45    0x5B5F    //RX_FDEQ_GAIN_6
+46    0x5864    //RX_FDEQ_GAIN_7
+47    0x6548    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0034    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0231    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4858    //RX_FDEQ_GAIN_0
+40    0x6265    //RX_FDEQ_GAIN_1
+41    0x6568    //RX_FDEQ_GAIN_2
+42    0x5654    //RX_FDEQ_GAIN_3
+43    0x676E    //RX_FDEQ_GAIN_4
+44    0x6E6B    //RX_FDEQ_GAIN_5
+45    0x5B5F    //RX_FDEQ_GAIN_6
+46    0x5864    //RX_FDEQ_GAIN_7
+47    0x6548    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0056    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0231    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4858    //RX_FDEQ_GAIN_0
+40    0x6265    //RX_FDEQ_GAIN_1
+41    0x6568    //RX_FDEQ_GAIN_2
+42    0x5654    //RX_FDEQ_GAIN_3
+43    0x676E    //RX_FDEQ_GAIN_4
+44    0x6E6B    //RX_FDEQ_GAIN_5
+45    0x5B5F    //RX_FDEQ_GAIN_6
+46    0x5864    //RX_FDEQ_GAIN_7
+47    0x6548    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0090    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0231    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4858    //RX_FDEQ_GAIN_0
+40    0x6265    //RX_FDEQ_GAIN_1
+41    0x6568    //RX_FDEQ_GAIN_2
+42    0x5654    //RX_FDEQ_GAIN_3
+43    0x676E    //RX_FDEQ_GAIN_4
+44    0x6E6B    //RX_FDEQ_GAIN_5
+45    0x5B5F    //RX_FDEQ_GAIN_6
+46    0x5864    //RX_FDEQ_GAIN_7
+47    0x6548    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x242C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7B02    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0500    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000A    //RX_NS_LVL_CTRL
+180    0xF600    //RX_THR_SN_EST
+181    0x7000    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4858    //RX_FDEQ_GAIN_0
+197    0x6265    //RX_FDEQ_GAIN_1
+198    0x6568    //RX_FDEQ_GAIN_2
+199    0x5654    //RX_FDEQ_GAIN_3
+200    0x676E    //RX_FDEQ_GAIN_4
+201    0x6E6B    //RX_FDEQ_GAIN_5
+202    0x5B5F    //RX_FDEQ_GAIN_6
+203    0x5864    //RX_FDEQ_GAIN_7
+204    0x6548    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0231    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x280A    //RX_TPKA_FP
+284    0x032D    //RX_MIN_G_FP
+285    0x0A00    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0231    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4858    //RX_FDEQ_GAIN_0
+197    0x6265    //RX_FDEQ_GAIN_1
+198    0x6568    //RX_FDEQ_GAIN_2
+199    0x5654    //RX_FDEQ_GAIN_3
+200    0x676E    //RX_FDEQ_GAIN_4
+201    0x6E6B    //RX_FDEQ_GAIN_5
+202    0x5B5F    //RX_FDEQ_GAIN_6
+203    0x5864    //RX_FDEQ_GAIN_7
+204    0x6548    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0231    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4858    //RX_FDEQ_GAIN_0
+197    0x6265    //RX_FDEQ_GAIN_1
+198    0x6568    //RX_FDEQ_GAIN_2
+199    0x5654    //RX_FDEQ_GAIN_3
+200    0x676E    //RX_FDEQ_GAIN_4
+201    0x6E6B    //RX_FDEQ_GAIN_5
+202    0x5B5F    //RX_FDEQ_GAIN_6
+203    0x5864    //RX_FDEQ_GAIN_7
+204    0x6548    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0231    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4858    //RX_FDEQ_GAIN_0
+197    0x6265    //RX_FDEQ_GAIN_1
+198    0x6568    //RX_FDEQ_GAIN_2
+199    0x5654    //RX_FDEQ_GAIN_3
+200    0x676E    //RX_FDEQ_GAIN_4
+201    0x6E6B    //RX_FDEQ_GAIN_5
+202    0x5B5F    //RX_FDEQ_GAIN_6
+203    0x5864    //RX_FDEQ_GAIN_7
+204    0x6548    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001F    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0231    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4858    //RX_FDEQ_GAIN_0
+197    0x6265    //RX_FDEQ_GAIN_1
+198    0x6568    //RX_FDEQ_GAIN_2
+199    0x5654    //RX_FDEQ_GAIN_3
+200    0x676E    //RX_FDEQ_GAIN_4
+201    0x6E6B    //RX_FDEQ_GAIN_5
+202    0x5B5F    //RX_FDEQ_GAIN_6
+203    0x5864    //RX_FDEQ_GAIN_7
+204    0x6548    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0034    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0231    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4858    //RX_FDEQ_GAIN_0
+197    0x6265    //RX_FDEQ_GAIN_1
+198    0x6568    //RX_FDEQ_GAIN_2
+199    0x5654    //RX_FDEQ_GAIN_3
+200    0x676E    //RX_FDEQ_GAIN_4
+201    0x6E6B    //RX_FDEQ_GAIN_5
+202    0x5B5F    //RX_FDEQ_GAIN_6
+203    0x5864    //RX_FDEQ_GAIN_7
+204    0x6548    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0056    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0231    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4858    //RX_FDEQ_GAIN_0
+197    0x6265    //RX_FDEQ_GAIN_1
+198    0x6568    //RX_FDEQ_GAIN_2
+199    0x5654    //RX_FDEQ_GAIN_3
+200    0x676E    //RX_FDEQ_GAIN_4
+201    0x6E6B    //RX_FDEQ_GAIN_5
+202    0x5B5F    //RX_FDEQ_GAIN_6
+203    0x5864    //RX_FDEQ_GAIN_7
+204    0x6548    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0090    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0231    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4858    //RX_FDEQ_GAIN_0
+197    0x6265    //RX_FDEQ_GAIN_1
+198    0x6568    //RX_FDEQ_GAIN_2
+199    0x5654    //RX_FDEQ_GAIN_3
+200    0x676E    //RX_FDEQ_GAIN_4
+201    0x6E6B    //RX_FDEQ_GAIN_5
+202    0x5B5F    //RX_FDEQ_GAIN_6
+203    0x5864    //RX_FDEQ_GAIN_7
+204    0x6548    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-NB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7646    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7CCC    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6333    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0010    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x1000    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x2000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x0064    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x5000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7F00    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x2000    //TX_DTD_THR2_3
+208    0x2000    //TX_DTD_THR2_4
+209    0x2000    //TX_DTD_THR2_5
+210    0x2000    //TX_DTD_THR2_6
+211    0x4100    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x1000    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0010    //TX_EPD_OFFSET_00
+233    0x0010    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xFA00    //TX_THR_SN_EST_6
+249    0xFA00    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0000    //TX_DELTA_THR_SN_EST_2
+253    0x0000    //TX_DELTA_THR_SN_EST_3
+254    0x0000    //TX_DELTA_THR_SN_EST_4
+255    0x0000    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0000    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0400    //TX_B_POST_FLT_0
+280    0x0400    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0010    //TX_NS_LVL_CTRL_1
+283    0x0010    //TX_NS_LVL_CTRL_2
+284    0x0010    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0010    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000D    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x000D    //TX_MIN_GAIN_S_2
+292    0x000D    //TX_MIN_GAIN_S_3
+293    0x000D    //TX_MIN_GAIN_S_4
+294    0x000D    //TX_MIN_GAIN_S_5
+295    0x000D    //TX_MIN_GAIN_S_6
+296    0x000D    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0014    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x1000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x4000    //TX_A_POST_FILT_S_7
+322    0x0400    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x0400    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x0FA0    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x003B    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x02BC    //TX_NOISE_TH_1
+371    0x1F40    //TX_NOISE_TH_2
+372    0x4650    //TX_NOISE_TH_3
+373    0x7148    //TX_NOISE_TH_4
+374    0x044C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x0032    //TX_NOISE_TH_6
+379    0x00C8    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0032    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0280    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2400    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0640    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0014    //TX_FDEQ_SUBNUM
+567    0x6048    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4844    //TX_FDEQ_GAIN_6
+574    0x4242    //TX_FDEQ_GAIN_7
+575    0x3C34    //TX_FDEQ_GAIN_8
+576    0x343A    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0401    //TX_FDEQ_BIN_0
+592    0x0103    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0010    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0802    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0010    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0802    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0010    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0802    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x000B    //TX_GAIN_LIMIT_0
+774    0x000B    //TX_GAIN_LIMIT_1
+775    0x000B    //TX_GAIN_LIMIT_2
+776    0x000B    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0001    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0650    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
 891    0x4000    //TX_A_LESSCUT_RTO_MASK
@@ -4409,3514 +11585,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0024    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x1800    //RX_THR_PITCH_DET_0
-14    0x1000    //RX_THR_PITCH_DET_1
-15    0x0800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0003    //RX_NS_LVL_CTRL
-23    0x9000    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x5454    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x3648    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x5454    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x3648    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x5454    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x3648    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x5454    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x3648    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x5454    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x3648    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x5454    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x3648    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x5454    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x3648    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x5454    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x3648    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HEADSET-USB_BLACKBIRD-VOICE_GENERIC-FB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
-#TX
-0    0x0009    //TX_OPERATION_MODE_0
-1    0x0009    //TX_OPERATION_MODE_1
-2    0x0020    //TX_PATCH_REG
-3    0x6B6A    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0004    //TX_SAMPLINGFREQ_SIG
-7    0x0004    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0B4C    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x6800    //TX_THR_PITCH_DET_0
-131    0x6000    //TX_THR_PITCH_DET_1
-132    0x5800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0200    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x61A8    //TX_EAD_THR
-151    0x0400    //TX_THR_RE_EST
-152    0x3000    //TX_MIN_EQ_RE_EST_0
-153    0x3000    //TX_MIN_EQ_RE_EST_1
-154    0x4000    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x6000    //TX_MIN_EQ_RE_EST_6
-159    0x6000    //TX_MIN_EQ_RE_EST_7
-160    0x6000    //TX_MIN_EQ_RE_EST_8
-161    0x6000    //TX_MIN_EQ_RE_EST_9
-162    0x4000    //TX_MIN_EQ_RE_EST_10
-163    0x4000    //TX_MIN_EQ_RE_EST_11
-164    0x4000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x4000    //TX_LAMBDA_CB_NLE
-167    0x3000    //TX_C_POST_FLT
-168    0x7FFF    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x0800    //TX_DTD_THR1_0
-198    0x0800    //TX_DTD_THR1_1
-199    0x0800    //TX_DTD_THR1_2
-200    0x0800    //TX_DTD_THR1_3
-201    0x0800    //TX_DTD_THR1_4
-202    0x0800    //TX_DTD_THR1_5
-203    0x0800    //TX_DTD_THR1_6
-204    0x0800    //TX_DTD_THR2_0
-205    0x0800    //TX_DTD_THR2_1
-206    0x0800    //TX_DTD_THR2_2
-207    0x0800    //TX_DTD_THR2_3
-208    0x0800    //TX_DTD_THR2_4
-209    0x0100    //TX_DTD_THR2_5
-210    0x0100    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x03E8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x00C0    //TX_EPD_OFFSET_00
-233    0x00C0    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF700    //TX_THR_SN_EST_0
-243    0xFB00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF700    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xF600    //TX_THR_SN_EST_5
-248    0xF600    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0200    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0400    //TX_DELTA_THR_SN_EST_2
-253    0x0300    //TX_DELTA_THR_SN_EST_3
-254    0x0600    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x2000    //TX_B_POST_FLT_1
-281    0x0012    //TX_NS_LVL_CTRL_0
-282    0x0019    //TX_NS_LVL_CTRL_1
-283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0019    //TX_NS_LVL_CTRL_4
-286    0x0010    //TX_NS_LVL_CTRL_5
-287    0x0010    //TX_NS_LVL_CTRL_6
-288    0x0010    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x0011    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000F    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000C    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7000    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
-302    0x7000    //TX_SNRI_SUP_2
-303    0x7000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0016    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x6000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x6000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x6000    //TX_A_POST_FILT_S_5
-320    0x6000    //TX_A_POST_FILT_S_6
-321    0x6000    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x4000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x2000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7CCD    //TX_LAMBDA_PFILT
-339    0x7CCD    //TX_LAMBDA_PFILT_S_0
-340    0x7CCD    //TX_LAMBDA_PFILT_S_1
-341    0x7CCD    //TX_LAMBDA_PFILT_S_2
-342    0x7CCD    //TX_LAMBDA_PFILT_S_3
-343    0x7CCD    //TX_LAMBDA_PFILT_S_4
-344    0x7CCD    //TX_LAMBDA_PFILT_S_5
-345    0x7CCD    //TX_LAMBDA_PFILT_S_6
-346    0x7CCD    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0500    //TX_A_PEPPER
-349    0x1600    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0020    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x02A6    //TX_NOISE_TH_1
-371    0x04B0    //TX_NOISE_TH_2
-372    0x3194    //TX_NOISE_TH_3
-373    0x0960    //TX_NOISE_TH_4
-374    0x5555    //TX_NOISE_TH_5
-375    0x3FF4    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x0000    //TX_NOISE_TH_5_4
-378    0x02BC    //TX_NOISE_TH_6
-379    0x0020    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0020    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0304    //TX_FDEQ_BIN_2
-594    0x0405    //TX_FDEQ_BIN_3
-595    0x0607    //TX_FDEQ_BIN_4
-596    0x0809    //TX_FDEQ_BIN_5
-597    0x0A0B    //TX_FDEQ_BIN_6
-598    0x0C0D    //TX_FDEQ_BIN_7
-599    0x0E0F    //TX_FDEQ_BIN_8
-600    0x1011    //TX_FDEQ_BIN_9
-601    0x1214    //TX_FDEQ_BIN_10
-602    0x1618    //TX_FDEQ_BIN_11
-603    0x1C1C    //TX_FDEQ_BIN_12
-604    0x2020    //TX_FDEQ_BIN_13
-605    0x2020    //TX_FDEQ_BIN_14
-606    0x2011    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0060    //TX_MIC_CALIBRATION_0
-766    0x0060    //TX_MIC_CALIBRATION_1
-767    0x0070    //TX_MIC_CALIBRATION_2
-768    0x0070    //TX_MIC_CALIBRATION_3
-769    0x0050    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0040    //TX_MIC_PWR_BIAS_2
-772    0x0040    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0C00    //TX_TDDRC_ALPHA_UP_01
-784    0x0C00    //TX_TDDRC_ALPHA_UP_02
-785    0x0C00    //TX_TDDRC_ALPHA_UP_03
-786    0x0C00    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0001    //TX_TDDRC_THRD_0
-855    0x0001    //TX_TDDRC_THRD_1
-856    0x1900    //TX_TDDRC_THRD_2
-857    0x1900    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x7B00    //TX_TDDRC_SLANT_1
-860    0x0C00    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x07F2    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-#RX
-0    0x002C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0004    //RX_SAMPLINGFREQ_SIG
-3    0x0004    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7B02    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0500    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x000A    //RX_NS_LVL_CTRL
-23    0xF600    //RX_THR_SN_EST
-24    0x7000    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-NB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
-#TX
-0    0x0008    //TX_OPERATION_MODE_0
-1    0x0008    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2B68    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0000    //TX_SAMPLINGFREQ_SIG
-7    0x0000    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0B80    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7646    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x7CCC    //TX_THR_PITCH_DET_0
-131    0x7000    //TX_THR_PITCH_DET_1
-132    0x6333    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0010    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x1000    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x2000    //TX_C_POST_FLT
-168    0x2000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x0064    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x5000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7F00    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x2000    //TX_DTD_THR2_0
-205    0x2000    //TX_DTD_THR2_1
-206    0x2000    //TX_DTD_THR2_2
-207    0x2000    //TX_DTD_THR2_3
-208    0x2000    //TX_DTD_THR2_4
-209    0x2000    //TX_DTD_THR2_5
-210    0x2000    //TX_DTD_THR2_6
-211    0x4100    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x03E8    //TX_DT_CUT_K
-214    0x1000    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0010    //TX_EPD_OFFSET_00
-233    0x0010    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xFA00    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFA00    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xFA00    //TX_THR_SN_EST_6
-249    0xFA00    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
-252    0x0000    //TX_DELTA_THR_SN_EST_2
-253    0x0000    //TX_DELTA_THR_SN_EST_3
-254    0x0000    //TX_DELTA_THR_SN_EST_4
-255    0x0000    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0000    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x0400    //TX_B_POST_FLT_0
-280    0x0400    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0010    //TX_NS_LVL_CTRL_1
-283    0x0010    //TX_NS_LVL_CTRL_2
-284    0x0010    //TX_NS_LVL_CTRL_3
-285    0x0010    //TX_NS_LVL_CTRL_4
-286    0x0010    //TX_NS_LVL_CTRL_5
-287    0x0010    //TX_NS_LVL_CTRL_6
-288    0x0010    //TX_NS_LVL_CTRL_7
-289    0x000D    //TX_MIN_GAIN_S_0
-290    0x000D    //TX_MIN_GAIN_S_1
-291    0x000D    //TX_MIN_GAIN_S_2
-292    0x000D    //TX_MIN_GAIN_S_3
-293    0x000D    //TX_MIN_GAIN_S_4
-294    0x000D    //TX_MIN_GAIN_S_5
-295    0x000D    //TX_MIN_GAIN_S_6
-296    0x000D    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0014    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
-316    0x1000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x4000    //TX_A_POST_FILT_S_7
-322    0x0400    //TX_B_POST_FILT_0
-323    0x0400    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x2000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7E14    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7C29    //TX_LAMBDA_PFILT_S_2
-342    0x7C29    //TX_LAMBDA_PFILT_S_3
-343    0x7C29    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x0FA0    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
-370    0x02BC    //TX_NOISE_TH_1
-371    0x1F40    //TX_NOISE_TH_2
-372    0x4650    //TX_NOISE_TH_3
-373    0x7148    //TX_NOISE_TH_4
-374    0x044C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
-377    0x0000    //TX_NOISE_TH_5_4
-378    0x0032    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x00CE    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x7FFF    //TX_NOISEDET_BOOST_TH
-412    0x0000    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0280    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2400    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0640    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x2000    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0064    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x0000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0014    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D08    //TX_FDEQ_BIN_9
-601    0x0000    //TX_FDEQ_BIN_10
-602    0x0000    //TX_FDEQ_BIN_11
-603    0x0000    //TX_FDEQ_BIN_12
-604    0x0000    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0010    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0802    //TX_PREEQ_BIN_MIC0_7
-649    0x0000    //TX_PREEQ_BIN_MIC0_8
-650    0x0000    //TX_PREEQ_BIN_MIC0_9
-651    0x0000    //TX_PREEQ_BIN_MIC0_10
-652    0x0000    //TX_PREEQ_BIN_MIC0_11
-653    0x0000    //TX_PREEQ_BIN_MIC0_12
-654    0x0000    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0010    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0802    //TX_PREEQ_BIN_MIC1_7
-698    0x0000    //TX_PREEQ_BIN_MIC1_8
-699    0x0000    //TX_PREEQ_BIN_MIC1_9
-700    0x0000    //TX_PREEQ_BIN_MIC1_10
-701    0x0000    //TX_PREEQ_BIN_MIC1_11
-702    0x0000    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0010    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0802    //TX_PREEQ_BIN_MIC2_7
-747    0x0000    //TX_PREEQ_BIN_MIC2_8
-748    0x0000    //TX_PREEQ_BIN_MIC2_9
-749    0x0000    //TX_PREEQ_BIN_MIC2_10
-750    0x0000    //TX_PREEQ_BIN_MIC2_11
-751    0x0000    //TX_PREEQ_BIN_MIC2_12
-752    0x0000    //TX_PREEQ_BIN_MIC2_13
-753    0x0000    //TX_PREEQ_BIN_MIC2_14
-754    0x0000    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0065    //TX_MIC_CALIBRATION_0
-766    0x0065    //TX_MIC_CALIBRATION_1
-767    0x0065    //TX_MIC_CALIBRATION_2
-768    0x0065    //TX_MIC_CALIBRATION_3
-769    0x0044    //TX_MIC_PWR_BIAS_0
-770    0x0044    //TX_MIC_PWR_BIAS_1
-771    0x0044    //TX_MIC_PWR_BIAS_2
-772    0x0044    //TX_MIC_PWR_BIAS_3
-773    0x000B    //TX_GAIN_LIMIT_0
-774    0x000B    //TX_GAIN_LIMIT_1
-775    0x000B    //TX_GAIN_LIMIT_2
-776    0x000B    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0001    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-#RX
-0    0x0024    //RX_RECVFUNC_MODE_0
+0    0x202C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -7941,7 +11676,7 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -8045,7 +11780,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -8104,10 +11839,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -8170,7 +11905,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -8203,10 +11938,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -8269,7 +12004,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0013    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -8302,10 +12037,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -8368,7 +12103,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0020    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -8401,10 +12136,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -8467,7 +12202,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0036    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -8500,10 +12235,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -8599,10 +12334,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -8698,10 +12433,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -8766,12 +12501,864 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x202C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-WB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
-0    0x0008    //TX_OPERATION_MODE_0
+0    0x0009    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
 3    0x2B68    //TX_SENDFUNC_MODE_0
@@ -9013,7 +13600,7 @@
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
+242    0xFA00    //TX_THR_SN_EST_0
 243    0xF400    //TX_THR_SN_EST_1
 244    0xF600    //TX_THR_SN_EST_2
 245    0xF400    //TX_THR_SN_EST_3
@@ -9022,20 +13609,20 @@
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -9053,16 +13640,16 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x000F    //TX_NS_LVL_CTRL_1
-283    0x0011    //TX_NS_LVL_CTRL_2
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
 284    0x000F    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
 287    0x000F    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
 292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
@@ -9086,12 +13673,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
@@ -9138,7 +13725,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
+367    0x0102    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
@@ -9150,11 +13737,11 @@
 376    0x7FFF    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x00F8    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -9162,22 +13749,22 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x00DC    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x7FFF    //TX_MIN_G_CTRL_SSNS
 409    0x0000    //TX_METAL_RTO_THR
@@ -9285,16 +13872,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -9323,22 +13910,22 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x001C    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
+567    0x6056    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4848    //TX_FDEQ_GAIN_2
 570    0x4848    //TX_FDEQ_GAIN_3
@@ -9363,7 +13950,7 @@
 589    0x4848    //TX_FDEQ_GAIN_22
 590    0x4848    //TX_FDEQ_GAIN_23
 591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
+592    0x0302    //TX_FDEQ_BIN_1
 593    0x0303    //TX_FDEQ_BIN_2
 594    0x0304    //TX_FDEQ_BIN_3
 595    0x0405    //TX_FDEQ_BIN_4
@@ -9371,11 +13958,11 @@
 597    0x0708    //TX_FDEQ_BIN_6
 598    0x090A    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
+600    0x0D07    //TX_FDEQ_BIN_9
 601    0x0E0F    //TX_FDEQ_BIN_10
 602    0x0F10    //TX_FDEQ_BIN_11
 603    0x1011    //TX_FDEQ_BIN_12
-604    0x1104    //TX_FDEQ_BIN_13
+604    0x1119    //TX_FDEQ_BIN_13
 605    0x0000    //TX_FDEQ_BIN_14
 606    0x0000    //TX_FDEQ_BIN_15
 607    0x0000    //TX_FDEQ_BIN_16
@@ -9637,7 +14224,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
+866    0x0619    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -9662,14 +14249,79 @@
 888    0x00C8    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0024    //RX_RECVFUNC_MODE_0
+0    0x202C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -9694,7 +14346,7 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -9798,7 +14450,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -9923,7 +14575,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -10022,7 +14674,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0013    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -10121,7 +14773,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0020    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -10220,7 +14872,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0036    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -10519,12 +15171,864 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x202C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-SWB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
-0    0x0001    //TX_OPERATION_MODE_0
+0    0x0009    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
 3    0x2B68    //TX_SENDFUNC_MODE_0
@@ -10766,7 +16270,7 @@
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
+242    0xFA00    //TX_THR_SN_EST_0
 243    0xF400    //TX_THR_SN_EST_1
 244    0xF600    //TX_THR_SN_EST_2
 245    0xF400    //TX_THR_SN_EST_3
@@ -10775,20 +16279,20 @@
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -10806,16 +16310,16 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000B    //TX_NS_LVL_CTRL_0
-282    0x000F    //TX_NS_LVL_CTRL_1
-283    0x0011    //TX_NS_LVL_CTRL_2
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
 284    0x000F    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
 287    0x000F    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
 292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
@@ -10839,12 +16343,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x2000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
@@ -10891,7 +16395,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
+367    0x0383    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
@@ -10903,11 +16407,11 @@
 376    0x7FFF    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -10915,22 +16419,22 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x02F3    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x2900    //TX_MIN_G_CTRL_SSNS
 409    0x0800    //TX_METAL_RTO_THR
@@ -11038,16 +16542,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -11076,19 +16580,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -11413,16 +16917,81 @@
 886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
 888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0024    //RX_RECVFUNC_MODE_0
+0    0x202C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -11447,7 +17016,7 @@
 22    0x0003    //RX_NS_LVL_CTRL
 23    0x9000    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -11551,7 +17120,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -11676,7 +17245,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -11775,7 +17344,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0013    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -11874,7 +17443,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0020    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -11973,7 +17542,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0036    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -12272,10 +17841,862 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x202C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-FB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
@@ -12528,10 +18949,10 @@
 248    0xF600    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0200    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0400    //TX_DELTA_THR_SN_EST_2
-253    0x0300    //TX_DELTA_THR_SN_EST_3
-254    0x0600    //TX_DELTA_THR_SN_EST_4
+251    0x0400    //TX_DELTA_THR_SN_EST_1
+252    0x0300    //TX_DELTA_THR_SN_EST_2
+253    0x0600    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0200    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
@@ -12559,31 +18980,31 @@
 279    0x2000    //TX_B_POST_FLT_0
 280    0x2000    //TX_B_POST_FLT_1
 281    0x0012    //TX_NS_LVL_CTRL_0
-282    0x0019    //TX_NS_LVL_CTRL_1
+282    0x0016    //TX_NS_LVL_CTRL_1
 283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0019    //TX_NS_LVL_CTRL_4
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
 286    0x0010    //TX_NS_LVL_CTRL_5
-287    0x0010    //TX_NS_LVL_CTRL_6
+287    0x0019    //TX_NS_LVL_CTRL_6
 288    0x0010    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x0011    //TX_MIN_GAIN_S_1
+290    0x000C    //TX_MIN_GAIN_S_1
 291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000F    //TX_MIN_GAIN_S_4
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
+295    0x0011    //TX_MIN_GAIN_S_6
 296    0x000C    //TX_MIN_GAIN_S_7
 297    0x7FFF    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7000    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
+301    0x7000    //TX_SNRI_SUP_1
 302    0x7000    //TX_SNRI_SUP_2
-303    0x7000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
+303    0x6000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
 305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
+306    0x6000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0016    //TX_G_LFNS
@@ -12600,8 +19021,8 @@
 320    0x6000    //TX_A_POST_FILT_S_6
 321    0x6000    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x4000    //TX_B_POST_FILT_2
+323    0x4000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
 325    0x2000    //TX_B_POST_FILT_3
 326    0x2000    //TX_B_POST_FILT_4
 327    0x2000    //TX_B_POST_FILT_5
@@ -12644,7 +19065,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
-367    0x0020    //TX_NOISE_TH_0
+367    0x04E8    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x02A6    //TX_NOISE_TH_1
@@ -12656,11 +19077,11 @@
 376    0x0001    //TX_NOISE_TH_5_3
 377    0x0000    //TX_NOISE_TH_5_4
 378    0x02BC    //TX_NOISE_TH_6
-379    0x0020    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x02BC    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -12668,22 +19089,22 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0004    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0020    //TX_MINENOISE_MIC0_TH
+406    0x04E7    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x2900    //TX_MIN_G_CTRL_SSNS
 409    0x0800    //TX_METAL_RTO_THR
@@ -12791,16 +19212,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -12829,19 +19250,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -13174,8 +19595,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x002C    //RX_RECVFUNC_MODE_0
+0    0x202C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0004    //RX_SAMPLINGFREQ_SIG
 3    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -13200,7 +19686,7 @@
 22    0x000A    //RX_NS_LVL_CTRL
 23    0xF600    //RX_THR_SN_EST
 24    0x7000    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -13304,7 +19790,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -13429,7 +19915,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -13528,7 +20014,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0013    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -13627,7 +20113,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0020    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -13726,7 +20212,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0036    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -14025,12 +20511,864 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x202C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7B02    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0500    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000A    //RX_NS_LVL_CTRL
+180    0xF600    //RX_THR_SN_EST
+181    0x7000    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-NB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
-0    0x0008    //TX_OPERATION_MODE_0
+0    0x0009    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
 3    0x2B68    //TX_SENDFUNC_MODE_0
@@ -14345,20 +21683,20 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
-316    0x1000    //TX_A_POST_FILT_S_2
+315    0x1000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
 317    0x4000    //TX_A_POST_FILT_S_3
 318    0x4000    //TX_A_POST_FILT_S_4
 319    0x4000    //TX_A_POST_FILT_S_5
 320    0x4000    //TX_A_POST_FILT_S_6
 321    0x4000    //TX_A_POST_FILT_S_7
 322    0x0400    //TX_B_POST_FILT_0
-323    0x0400    //TX_B_POST_FILT_1
+323    0x2000    //TX_B_POST_FILT_1
 324    0x2000    //TX_B_POST_FILT_2
 325    0x2000    //TX_B_POST_FILT_3
 326    0x2000    //TX_B_POST_FILT_4
 327    0x2000    //TX_B_POST_FILT_5
-328    0x2000    //TX_B_POST_FILT_6
+328    0x0400    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
 331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
@@ -14397,7 +21735,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
+367    0x003B    //TX_NOISE_TH_0
 368    0x1B58    //TX_NOISE_TH_0_2
 369    0x2134    //TX_NOISE_TH_0_3
 370    0x02BC    //TX_NOISE_TH_1
@@ -14409,11 +21747,11 @@
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x0000    //TX_NOISE_TH_5_4
 378    0x0032    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x00C8    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
 385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
@@ -14421,22 +21759,22 @@
 388    0x00CE    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x0032    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x7FFF    //TX_MIN_G_CTRL_SSNS
 409    0x0000    //TX_METAL_RTO_THR
@@ -14544,16 +21882,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -14582,31 +21920,31 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0014    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
+567    0x6048    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4848    //TX_FDEQ_GAIN_2
 570    0x4848    //TX_FDEQ_GAIN_3
 571    0x4848    //TX_FDEQ_GAIN_4
 572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
+573    0x4844    //TX_FDEQ_GAIN_6
+574    0x4444    //TX_FDEQ_GAIN_7
+575    0x4040    //TX_FDEQ_GAIN_8
+576    0x3C3C    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
 579    0x4848    //TX_FDEQ_GAIN_12
@@ -14621,8 +21959,8 @@
 588    0x4848    //TX_FDEQ_GAIN_21
 589    0x4848    //TX_FDEQ_GAIN_22
 590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
+591    0x0401    //TX_FDEQ_BIN_0
+592    0x0103    //TX_FDEQ_BIN_1
 593    0x0303    //TX_FDEQ_BIN_2
 594    0x0304    //TX_FDEQ_BIN_3
 595    0x0405    //TX_FDEQ_BIN_4
@@ -14630,7 +21968,7 @@
 597    0x0708    //TX_FDEQ_BIN_6
 598    0x090A    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D08    //TX_FDEQ_BIN_9
+600    0x0D0E    //TX_FDEQ_BIN_9
 601    0x0000    //TX_FDEQ_BIN_10
 602    0x0000    //TX_FDEQ_BIN_11
 603    0x0000    //TX_FDEQ_BIN_12
@@ -14921,14 +22259,79 @@
 888    0x00C8    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0024    //RX_RECVFUNC_MODE_0
+0    0x202C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -14953,7 +22356,7 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -15057,7 +22460,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -15182,7 +22585,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -15281,7 +22684,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0013    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -15380,7 +22783,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0020    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -15479,7 +22882,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0036    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -15778,12 +23181,864 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x202C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-WB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
-0    0x0008    //TX_OPERATION_MODE_0
+0    0x0009    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
 3    0x2B68    //TX_SENDFUNC_MODE_0
@@ -16025,7 +24280,7 @@
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
+242    0xFA00    //TX_THR_SN_EST_0
 243    0xF400    //TX_THR_SN_EST_1
 244    0xF600    //TX_THR_SN_EST_2
 245    0xF400    //TX_THR_SN_EST_3
@@ -16034,20 +24289,20 @@
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -16065,16 +24320,16 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x000F    //TX_NS_LVL_CTRL_1
-283    0x0011    //TX_NS_LVL_CTRL_2
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
 284    0x000F    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
 287    0x000F    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
 292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
@@ -16098,12 +24353,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
@@ -16150,7 +24405,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
+367    0x0102    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
@@ -16162,11 +24417,11 @@
 376    0x7FFF    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x00F8    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -16174,22 +24429,22 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x00DC    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x7FFF    //TX_MIN_G_CTRL_SSNS
 409    0x0000    //TX_METAL_RTO_THR
@@ -16297,16 +24552,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -16335,22 +24590,22 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x001C    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
+567    0x5850    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4848    //TX_FDEQ_GAIN_2
 570    0x4848    //TX_FDEQ_GAIN_3
@@ -16375,7 +24630,7 @@
 589    0x4848    //TX_FDEQ_GAIN_22
 590    0x4848    //TX_FDEQ_GAIN_23
 591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
+592    0x0302    //TX_FDEQ_BIN_1
 593    0x0303    //TX_FDEQ_BIN_2
 594    0x0304    //TX_FDEQ_BIN_3
 595    0x0405    //TX_FDEQ_BIN_4
@@ -16383,11 +24638,11 @@
 597    0x0708    //TX_FDEQ_BIN_6
 598    0x090A    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
+600    0x0D07    //TX_FDEQ_BIN_9
 601    0x0E0F    //TX_FDEQ_BIN_10
 602    0x0F10    //TX_FDEQ_BIN_11
 603    0x1011    //TX_FDEQ_BIN_12
-604    0x1104    //TX_FDEQ_BIN_13
+604    0x1119    //TX_FDEQ_BIN_13
 605    0x0000    //TX_FDEQ_BIN_14
 606    0x0000    //TX_FDEQ_BIN_15
 607    0x0000    //TX_FDEQ_BIN_16
@@ -16674,14 +24929,79 @@
 888    0x00C8    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0024    //RX_RECVFUNC_MODE_0
+0    0x202C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -16706,7 +25026,7 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -16810,7 +25130,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -16935,7 +25255,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -17034,7 +25354,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0013    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -17133,7 +25453,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0020    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -17232,7 +25552,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0036    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -17531,12 +25851,864 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x202C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-SWB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
-0    0x0001    //TX_OPERATION_MODE_0
+0    0x0009    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
 3    0x2B68    //TX_SENDFUNC_MODE_0
@@ -17778,7 +26950,7 @@
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
+242    0xFA00    //TX_THR_SN_EST_0
 243    0xF400    //TX_THR_SN_EST_1
 244    0xF600    //TX_THR_SN_EST_2
 245    0xF400    //TX_THR_SN_EST_3
@@ -17787,20 +26959,20 @@
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -17818,16 +26990,16 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000B    //TX_NS_LVL_CTRL_0
-282    0x000F    //TX_NS_LVL_CTRL_1
-283    0x0011    //TX_NS_LVL_CTRL_2
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
 284    0x000F    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
 287    0x000F    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
 292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
@@ -17851,12 +27023,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x2000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
@@ -17903,7 +27075,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
+367    0x0383    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
@@ -17915,11 +27087,11 @@
 376    0x7FFF    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -17927,22 +27099,22 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x02F3    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x2900    //TX_MIN_G_CTRL_SSNS
 409    0x0800    //TX_METAL_RTO_THR
@@ -18050,16 +27222,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -18088,19 +27260,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -18425,16 +27597,81 @@
 886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
 888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0024    //RX_RECVFUNC_MODE_0
+0    0x202C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -18459,7 +27696,7 @@
 22    0x0003    //RX_NS_LVL_CTRL
 23    0x9000    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -18563,7 +27800,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -18688,7 +27925,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -18787,7 +28024,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0013    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -18886,7 +28123,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0020    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -18985,7 +28222,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0036    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -19284,10 +28521,862 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x202C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-FB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
@@ -19540,10 +29629,10 @@
 248    0xF600    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0200    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0400    //TX_DELTA_THR_SN_EST_2
-253    0x0300    //TX_DELTA_THR_SN_EST_3
-254    0x0600    //TX_DELTA_THR_SN_EST_4
+251    0x0400    //TX_DELTA_THR_SN_EST_1
+252    0x0300    //TX_DELTA_THR_SN_EST_2
+253    0x0600    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0200    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
@@ -19571,31 +29660,31 @@
 279    0x2000    //TX_B_POST_FLT_0
 280    0x2000    //TX_B_POST_FLT_1
 281    0x0012    //TX_NS_LVL_CTRL_0
-282    0x0019    //TX_NS_LVL_CTRL_1
+282    0x0016    //TX_NS_LVL_CTRL_1
 283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0019    //TX_NS_LVL_CTRL_4
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
 286    0x0010    //TX_NS_LVL_CTRL_5
-287    0x0010    //TX_NS_LVL_CTRL_6
+287    0x0019    //TX_NS_LVL_CTRL_6
 288    0x0010    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x0011    //TX_MIN_GAIN_S_1
+290    0x000C    //TX_MIN_GAIN_S_1
 291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000F    //TX_MIN_GAIN_S_4
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
+295    0x0011    //TX_MIN_GAIN_S_6
 296    0x000C    //TX_MIN_GAIN_S_7
 297    0x7FFF    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7000    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
+301    0x7000    //TX_SNRI_SUP_1
 302    0x7000    //TX_SNRI_SUP_2
-303    0x7000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
+303    0x6000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
 305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
+306    0x6000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0016    //TX_G_LFNS
@@ -19612,8 +29701,8 @@
 320    0x6000    //TX_A_POST_FILT_S_6
 321    0x6000    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x4000    //TX_B_POST_FILT_2
+323    0x4000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
 325    0x2000    //TX_B_POST_FILT_3
 326    0x2000    //TX_B_POST_FILT_4
 327    0x2000    //TX_B_POST_FILT_5
@@ -19656,7 +29745,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
-367    0x0020    //TX_NOISE_TH_0
+367    0x04E8    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x02A6    //TX_NOISE_TH_1
@@ -19668,11 +29757,11 @@
 376    0x0001    //TX_NOISE_TH_5_3
 377    0x0000    //TX_NOISE_TH_5_4
 378    0x02BC    //TX_NOISE_TH_6
-379    0x0020    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x02BC    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -19680,22 +29769,22 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0004    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0020    //TX_MINENOISE_MIC0_TH
+406    0x04E7    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x2900    //TX_MIN_G_CTRL_SSNS
 409    0x0800    //TX_METAL_RTO_THR
@@ -19803,16 +29892,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -19841,19 +29930,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -20186,8 +30275,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x002C    //RX_RECVFUNC_MODE_0
+0    0x202C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0004    //RX_SAMPLINGFREQ_SIG
 3    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -20212,7 +30366,7 @@
 22    0x000A    //RX_NS_LVL_CTRL
 23    0xF600    //RX_THR_SN_EST
 24    0x7000    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -20316,7 +30470,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -20441,7 +30595,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -20540,7 +30694,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0013    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -20639,7 +30793,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0020    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -20738,7 +30892,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0036    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -21037,16 +31191,868 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x202C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7B02    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0500    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000A    //RX_NS_LVL_CTRL
+180    0xF600    //RX_THR_SN_EST
+181    0x7000    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-NB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2F7C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x0073    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0003    //TX_NUM_MIC
 6    0x0000    //TX_SAMPLINGFREQ_SIG
 7    0x0000    //TX_SAMPLINGFREQ_PROC
@@ -21063,8 +32069,8 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
-22    0x000D    //TX_DIST2REF_02
+21    0x009C    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
@@ -21083,8 +32089,8 @@
 38    0x0002    //TX_MICS_OF_PAIR1
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
 43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
@@ -21150,7 +32156,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -21192,7 +32198,7 @@
 147    0x0100    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7500    //TX_EAD_THR
+150    0x7A00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
 152    0x0200    //TX_MIN_EQ_RE_EST_0
 153    0x0200    //TX_MIN_EQ_RE_EST_1
@@ -21207,13 +32213,13 @@
 162    0x4000    //TX_MIN_EQ_RE_EST_10
 163    0x6000    //TX_MIN_EQ_RE_EST_11
 164    0x7FFF    //TX_MIN_EQ_RE_EST_12
-165    0x2000    //TX_LAMBDA_RE_EST
+165    0x4000    //TX_LAMBDA_RE_EST
 166    0x0000    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x2000    //TX_GAIN_NP
 169    0x0180    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
+171    0x0200    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -21239,14 +32245,14 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7FF0    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
+197    0x7148    //TX_DTD_THR1_0
+198    0x7148    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
-204    0x7E00    //TX_DTD_THR2_0
+204    0x0CCD    //TX_DTD_THR2_0
 205    0x0CCD    //TX_DTD_THR2_1
 206    0x0CCD    //TX_DTD_THR2_2
 207    0x0CCD    //TX_DTD_THR2_3
@@ -21270,7 +32276,7 @@
 225    0x1770    //TX_RATIO_DT_L_TH_HIGH
 226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
 227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
+228    0x2000    //TX_B_POST_FILT_ECHO_L
 229    0x2000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
@@ -21279,8 +32285,8 @@
 234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -21293,12 +32299,12 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0050    //TX_DELTA_THR_SN_EST_0
-251    0x01A0    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x01A0    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -21324,28 +32330,28 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0012    //TX_NS_LVL_CTRL_1
-283    0x0017    //TX_NS_LVL_CTRL_2
-284    0x0015    //TX_NS_LVL_CTRL_3
+282    0x0017    //TX_NS_LVL_CTRL_1
+283    0x0015    //TX_NS_LVL_CTRL_2
+284    0x0012    //TX_NS_LVL_CTRL_3
 285    0x0012    //TX_NS_LVL_CTRL_4
-286    0x0012    //TX_NS_LVL_CTRL_5
-287    0x0011    //TX_NS_LVL_CTRL_6
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0012    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000F    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000D    //TX_MIN_GAIN_S_2
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
 292    0x000F    //TX_MIN_GAIN_S_3
 293    0x000F    //TX_MIN_GAIN_S_4
-294    0x000F    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x000F    //TX_MIN_GAIN_S_6
 296    0x000F    //TX_MIN_GAIN_S_7
 297    0x4000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
+301    0x1000    //TX_SNRI_SUP_1
 302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
+303    0x2400    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
 306    0x4000    //TX_SNRI_SUP_6
@@ -21357,19 +32363,19 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x3000    //TX_A_POST_FILT_S_5
+315    0x2000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x1000    //TX_A_POST_FILT_S_3
+318    0x3000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
 320    0x5000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x5000    //TX_B_POST_FILT_4
-327    0x3000    //TX_B_POST_FILT_5
+324    0x1000    //TX_B_POST_FILT_2
+325    0x5000    //TX_B_POST_FILT_3
+326    0x3000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
@@ -21382,12 +32388,12 @@
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7E00    //TX_LAMBDA_PFILT
 339    0x7D00    //TX_LAMBDA_PFILT_S_0
-340    0x7900    //TX_LAMBDA_PFILT_S_1
-341    0x7400    //TX_LAMBDA_PFILT_S_2
-342    0x7900    //TX_LAMBDA_PFILT_S_3
+340    0x7400    //TX_LAMBDA_PFILT_S_1
+341    0x7900    //TX_LAMBDA_PFILT_S_2
+342    0x7000    //TX_LAMBDA_PFILT_S_3
 343    0x7D00    //TX_LAMBDA_PFILT_S_4
 344    0x7D00    //TX_LAMBDA_PFILT_S_5
-345    0x7D00    //TX_LAMBDA_PFILT_S_6
+345    0x7900    //TX_LAMBDA_PFILT_S_6
 346    0x7D00    //TX_LAMBDA_PFILT_S_7
 347    0x0200    //TX_K_PEPPER
 348    0x0800    //TX_A_PEPPER
@@ -21400,7 +32406,7 @@
 355    0x0800    //TX_DT_BINVAD_TH_2
 356    0x0800    //TX_DT_BINVAD_TH_3
 357    0x0FA0    //TX_DT_BINVAD_ENDF
-358    0x0400    //TX_C_POST_FLT_DT
+358    0x0200    //TX_C_POST_FLT_DT
 359    0x4000    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0100    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -21415,17 +32421,17 @@
 370    0x07D0    //TX_NOISE_TH_1
 371    0x03ED    //TX_NOISE_TH_2
 372    0x2EE0    //TX_NOISE_TH_3
-373    0x55F0    //TX_NOISE_TH_4
+373    0x5528    //TX_NOISE_TH_4
 374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x0FA0    //TX_NOISE_TH_6
 379    0x000A    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -21433,17 +32439,17 @@
 388    0x1000    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x7000    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
+401    0x0004    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
@@ -21551,21 +32557,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -21594,31 +32600,31 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0014    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
+567    0x5250    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4848    //TX_FDEQ_GAIN_2
-570    0x483C    //TX_FDEQ_GAIN_3
-571    0x303C    //TX_FDEQ_GAIN_4
-572    0x3048    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
+570    0x4A43    //TX_FDEQ_GAIN_3
+571    0x374B    //TX_FDEQ_GAIN_4
+572    0x3444    //TX_FDEQ_GAIN_5
+573    0x433C    //TX_FDEQ_GAIN_6
+574    0x3A37    //TX_FDEQ_GAIN_7
+575    0x2A2A    //TX_FDEQ_GAIN_8
+576    0x2C2C    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
 579    0x4848    //TX_FDEQ_GAIN_12
@@ -21642,7 +32648,7 @@
 597    0x0708    //TX_FDEQ_BIN_6
 598    0x090A    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D08    //TX_FDEQ_BIN_9
+600    0x0D0E    //TX_FDEQ_BIN_9
 601    0x0000    //TX_FDEQ_BIN_10
 602    0x0000    //TX_FDEQ_BIN_11
 603    0x0000    //TX_FDEQ_BIN_12
@@ -21658,7 +32664,7 @@
 613    0x0000    //TX_FDEQ_BIN_22
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+616    0x0014    //TX_PREEQ_SUBNUM_MIC0
 617    0x4848    //TX_PREEQ_GAIN_MIC0_0
 618    0x4848    //TX_PREEQ_GAIN_MIC0_1
 619    0x4848    //TX_PREEQ_GAIN_MIC0_2
@@ -21683,16 +32689,16 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x7800    //TX_PREEQ_BIN_MIC0_0
-642    0x0000    //TX_PREEQ_BIN_MIC0_1
-643    0x0000    //TX_PREEQ_BIN_MIC0_2
-644    0x0000    //TX_PREEQ_BIN_MIC0_3
-645    0x0000    //TX_PREEQ_BIN_MIC0_4
-646    0x0000    //TX_PREEQ_BIN_MIC0_5
-647    0x0000    //TX_PREEQ_BIN_MIC0_6
-648    0x0000    //TX_PREEQ_BIN_MIC0_7
-649    0x0000    //TX_PREEQ_BIN_MIC0_8
-650    0x0000    //TX_PREEQ_BIN_MIC0_9
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
 651    0x0000    //TX_PREEQ_BIN_MIC0_10
 652    0x0000    //TX_PREEQ_BIN_MIC0_11
 653    0x0000    //TX_PREEQ_BIN_MIC0_12
@@ -21708,16 +32714,16 @@
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
 665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4846    //TX_PREEQ_GAIN_MIC1_0
-667    0x4544    //TX_PREEQ_GAIN_MIC1_1
-668    0x4240    //TX_PREEQ_GAIN_MIC1_2
-669    0x3E48    //TX_PREEQ_GAIN_MIC1_3
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+673    0x4A4A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4B4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4D4E    //TX_PREEQ_GAIN_MIC1_9
 676    0x4848    //TX_PREEQ_GAIN_MIC1_10
 677    0x4848    //TX_PREEQ_GAIN_MIC1_11
 678    0x4848    //TX_PREEQ_GAIN_MIC1_12
@@ -21732,16 +32738,16 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x251A    //TX_PREEQ_BIN_MIC1_0
-691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
-692    0x0C08    //TX_PREEQ_BIN_MIC1_2
-693    0x0700    //TX_PREEQ_BIN_MIC1_3
-694    0x0000    //TX_PREEQ_BIN_MIC1_4
-695    0x0000    //TX_PREEQ_BIN_MIC1_5
-696    0x0000    //TX_PREEQ_BIN_MIC1_6
-697    0x0000    //TX_PREEQ_BIN_MIC1_7
-698    0x0000    //TX_PREEQ_BIN_MIC1_8
-699    0x0000    //TX_PREEQ_BIN_MIC1_9
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
 700    0x0000    //TX_PREEQ_BIN_MIC1_10
 701    0x0000    //TX_PREEQ_BIN_MIC1_11
 702    0x0000    //TX_PREEQ_BIN_MIC1_12
@@ -21763,10 +32769,10 @@
 718    0x4848    //TX_PREEQ_GAIN_MIC2_3
 719    0x4848    //TX_PREEQ_GAIN_MIC2_4
 720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+721    0x484A    //TX_PREEQ_GAIN_MIC2_6
+722    0x4B4B    //TX_PREEQ_GAIN_MIC2_7
+723    0x4B4C    //TX_PREEQ_GAIN_MIC2_8
+724    0x4D50    //TX_PREEQ_GAIN_MIC2_9
 725    0x4848    //TX_PREEQ_GAIN_MIC2_10
 726    0x4848    //TX_PREEQ_GAIN_MIC2_11
 727    0x4848    //TX_PREEQ_GAIN_MIC2_12
@@ -21781,16 +32787,16 @@
 736    0x4848    //TX_PREEQ_GAIN_MIC2_21
 737    0x4848    //TX_PREEQ_GAIN_MIC2_22
 738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x7800    //TX_PREEQ_BIN_MIC2_0
-740    0x0000    //TX_PREEQ_BIN_MIC2_1
-741    0x0000    //TX_PREEQ_BIN_MIC2_2
-742    0x0000    //TX_PREEQ_BIN_MIC2_3
-743    0x0000    //TX_PREEQ_BIN_MIC2_4
-744    0x0000    //TX_PREEQ_BIN_MIC2_5
-745    0x0000    //TX_PREEQ_BIN_MIC2_6
-746    0x0000    //TX_PREEQ_BIN_MIC2_7
-747    0x0000    //TX_PREEQ_BIN_MIC2_8
-748    0x0000    //TX_PREEQ_BIN_MIC2_9
+739    0x0202    //TX_PREEQ_BIN_MIC2_0
+740    0x0203    //TX_PREEQ_BIN_MIC2_1
+741    0x0303    //TX_PREEQ_BIN_MIC2_2
+742    0x0304    //TX_PREEQ_BIN_MIC2_3
+743    0x0405    //TX_PREEQ_BIN_MIC2_4
+744    0x0506    //TX_PREEQ_BIN_MIC2_5
+745    0x0708    //TX_PREEQ_BIN_MIC2_6
+746    0x090A    //TX_PREEQ_BIN_MIC2_7
+747    0x0B0C    //TX_PREEQ_BIN_MIC2_8
+748    0x0D0E    //TX_PREEQ_BIN_MIC2_9
 749    0x0000    //TX_PREEQ_BIN_MIC2_10
 750    0x0000    //TX_PREEQ_BIN_MIC2_11
 751    0x0000    //TX_PREEQ_BIN_MIC2_12
@@ -21815,7 +32821,7 @@
 770    0x0044    //TX_MIC_PWR_BIAS_1
 771    0x0044    //TX_MIC_PWR_BIAS_2
 772    0x0044    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
+773    0x0000    //TX_GAIN_LIMIT_0
 774    0x000F    //TX_GAIN_LIMIT_1
 775    0x000F    //TX_GAIN_LIMIT_2
 776    0x000F    //TX_GAIN_LIMIT_3
@@ -21908,7 +32914,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0970    //TX_TDDRC_DRC_GAIN
+866    0x0DCE    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -21933,14 +32939,79 @@
 888    0x0028    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x0050    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x000C    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7E90    //TX_DTD_THR1_MICMUTE_0
+912    0x7918    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0xE0C0    //TX_AMS_RESRV_02
+945    0x1770    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0024    //RX_RECVFUNC_MODE_0
+0    0x202C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -21965,7 +33036,7 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -21973,7 +33044,7 @@
 30    0x0002    //RX_EXTRA_NS_L
 31    0x0800    //RX_EXTRA_NS_A
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 35    0x199A    //RX_A_POST_FLT
 36    0x0000    //RX_LMT_THRD
@@ -22054,9 +33125,9 @@
 111    0x0002    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1D00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -22064,7 +33135,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
+124    0x0200    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
@@ -22106,13 +33177,13 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1D00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -22120,7 +33191,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
+124    0x0200    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -22205,13 +33276,13 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1D00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -22219,7 +33290,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
+124    0x0200    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -22293,7 +33364,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0013    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -22304,13 +33375,13 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1D00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -22318,7 +33389,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
+124    0x0200    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -22392,7 +33463,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0020    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -22403,13 +33474,13 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1D00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -22417,7 +33488,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
+124    0x0200    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -22491,7 +33562,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0036    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -22502,13 +33573,13 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1D00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -22516,7 +33587,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
+124    0x0200    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -22601,13 +33672,13 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1D00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -22615,7 +33686,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
+124    0x0200    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -22700,13 +33771,13 @@
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1D00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -22714,7 +33785,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
+124    0x0200    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -22790,16 +33861,868 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x202C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-WB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2F3C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x0073    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0003    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
 7    0x0001    //TX_SAMPLINGFREQ_PROC
@@ -22816,14 +34739,14 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
-22    0x000D    //TX_DIST2REF_02
+21    0x009C    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
 27    0x1000    //TX_PGA_0
-28    0x0800    //TX_PGA_1
+28    0x1000    //TX_PGA_1
 29    0x1000    //TX_PGA_2
 30    0x0000    //TX_PGA_3
 31    0x0000    //TX_PGA_4
@@ -22836,8 +34759,8 @@
 38    0x0002    //TX_MICS_OF_PAIR1
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
 43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
@@ -22902,8 +34825,8 @@
 104    0x0000    //TX_MIC_LOC_23
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0C00    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -22945,9 +34868,9 @@
 147    0x0300    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
+150    0x6C00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x3000    //TX_MIN_EQ_RE_EST_0
+152    0x0200    //TX_MIN_EQ_RE_EST_0
 153    0x0100    //TX_MIN_EQ_RE_EST_1
 154    0x0200    //TX_MIN_EQ_RE_EST_2
 155    0x0200    //TX_MIN_EQ_RE_EST_3
@@ -22964,9 +34887,9 @@
 166    0x4000    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x5000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
+169    0x02A0    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
+171    0x01B0    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -22992,15 +34915,15 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7FF0    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
+197    0x7148    //TX_DTD_THR1_0
+198    0x7148    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
-204    0x7E00    //TX_DTD_THR2_0
-205    0x7E00    //TX_DTD_THR2_1
+204    0x5000    //TX_DTD_THR2_0
+205    0x5000    //TX_DTD_THR2_1
 206    0x5000    //TX_DTD_THR2_2
 207    0x5000    //TX_DTD_THR2_3
 208    0x5000    //TX_DTD_THR2_4
@@ -23008,8 +34931,8 @@
 210    0x5000    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x03E8    //TX_DT_CUT_K
-214    0x0010    //TX_DT_CUT_THR
+213    0x07D0    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
 217    0x4000    //TX_FDPFGAINECHO
@@ -23018,22 +34941,22 @@
 220    0x0000    //TX_DTD_MIC_BLK
 221    0x023E    //TX_ADPT_STRICT_L
 222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
+225    0x01CC    //TX_RATIO_DT_L_TH_HIGH
+226    0x4A38    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+234    0x015E    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -23046,11 +34969,11 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
 254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
+255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0200    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
@@ -23078,11 +35001,11 @@
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
 282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0016    //TX_NS_LVL_CTRL_4
-286    0x0014    //TX_NS_LVL_CTRL_5
-287    0x0011    //TX_NS_LVL_CTRL_6
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000F    //TX_MIN_GAIN_S_0
 290    0x0010    //TX_MIN_GAIN_S_1
@@ -23100,8 +35023,8 @@
 302    0x4000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x50C0    //TX_SNRI_SUP_6
+305    0x50C0    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
@@ -23110,19 +35033,19 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x5000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x4C00    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+315    0x4C00    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
+323    0x2000    //TX_B_POST_FILT_1
 324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
+325    0x4000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
-327    0x4000    //TX_B_POST_FILT_5
+327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
@@ -23130,14 +35053,14 @@
 332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
 333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
 334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x6000    //TX_B_LESSCUT_RTO_S_6
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7C00    //TX_LAMBDA_PFILT
 339    0x7C00    //TX_LAMBDA_PFILT_S_0
 340    0x7C00    //TX_LAMBDA_PFILT_S_1
-341    0x7C00    //TX_LAMBDA_PFILT_S_2
-342    0x7A00    //TX_LAMBDA_PFILT_S_3
+341    0x7A00    //TX_LAMBDA_PFILT_S_2
+342    0x7C00    //TX_LAMBDA_PFILT_S_3
 343    0x7C00    //TX_LAMBDA_PFILT_S_4
 344    0x7C00    //TX_LAMBDA_PFILT_S_5
 345    0x7C00    //TX_LAMBDA_PFILT_S_6
@@ -23148,12 +35071,12 @@
 350    0x0600    //TX_A_PEPPER_HF
 351    0x0001    //TX_HMNC_BST_FLG
 352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
 356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0800    //TX_C_POST_FLT_DT
+357    0x1388    //TX_DT_BINVAD_ENDF
+358    0x2000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0140    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -23175,10 +35098,10 @@
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x0F0A    //TX_NOISE_TH_6
 379    0x0033    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -23186,17 +35109,17 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x7FFF    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x4000    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
+401    0x0005    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
@@ -23304,21 +35227,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -23347,33 +35270,33 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
-566    0x001C    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x5048    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
+569    0x4A4F    //TX_FDEQ_GAIN_2
+570    0x4E48    //TX_FDEQ_GAIN_3
+571    0x4444    //TX_FDEQ_GAIN_4
+572    0x444B    //TX_FDEQ_GAIN_5
+573    0x4E50    //TX_FDEQ_GAIN_6
+574    0x544D    //TX_FDEQ_GAIN_7
+575    0x464C    //TX_FDEQ_GAIN_8
+576    0x4844    //TX_FDEQ_GAIN_9
+577    0x393C    //TX_FDEQ_GAIN_10
+578    0x3C3C    //TX_FDEQ_GAIN_11
 579    0x4848    //TX_FDEQ_GAIN_12
 580    0x4848    //TX_FDEQ_GAIN_13
 581    0x4848    //TX_FDEQ_GAIN_14
@@ -23396,10 +35319,10 @@
 598    0x090A    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
 600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x0E0F    //TX_FDEQ_BIN_10
-602    0x0F10    //TX_FDEQ_BIN_11
-603    0x1011    //TX_FDEQ_BIN_12
-604    0x1104    //TX_FDEQ_BIN_13
+601    0x0F10    //TX_FDEQ_BIN_10
+602    0x1011    //TX_FDEQ_BIN_11
+603    0x1112    //TX_FDEQ_BIN_12
+604    0x120B    //TX_FDEQ_BIN_13
 605    0x0000    //TX_FDEQ_BIN_14
 606    0x0000    //TX_FDEQ_BIN_15
 607    0x0000    //TX_FDEQ_BIN_16
@@ -23436,22 +35359,22 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0808    //TX_PREEQ_BIN_MIC0_7
-649    0x0808    //TX_PREEQ_BIN_MIC0_8
-650    0x0808    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0808    //TX_PREEQ_BIN_MIC0_11
-653    0x0808    //TX_PREEQ_BIN_MIC0_12
-654    0x0808    //TX_PREEQ_BIN_MIC0_13
-655    0x0808    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+651    0x0F10    //TX_PREEQ_BIN_MIC0_10
+652    0x1011    //TX_PREEQ_BIN_MIC0_11
+653    0x1112    //TX_PREEQ_BIN_MIC0_12
+654    0x120B    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
 657    0x0000    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
@@ -23461,20 +35384,20 @@
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
 665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4846    //TX_PREEQ_GAIN_MIC1_0
-667    0x4544    //TX_PREEQ_GAIN_MIC1_1
-668    0x4240    //TX_PREEQ_GAIN_MIC1_2
-669    0x3E3C    //TX_PREEQ_GAIN_MIC1_3
-670    0x3A38    //TX_PREEQ_GAIN_MIC1_4
-671    0x3635    //TX_PREEQ_GAIN_MIC1_5
-672    0x3330    //TX_PREEQ_GAIN_MIC1_6
-673    0x2E2A    //TX_PREEQ_GAIN_MIC1_7
-674    0x2648    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x484A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5454    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
 680    0x4848    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
@@ -23485,20 +35408,20 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x251A    //TX_PREEQ_BIN_MIC1_0
-691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
-692    0x0C0C    //TX_PREEQ_BIN_MIC1_2
-693    0x0C0F    //TX_PREEQ_BIN_MIC1_3
-694    0x0F0F    //TX_PREEQ_BIN_MIC1_4
-695    0x0F09    //TX_PREEQ_BIN_MIC1_5
-696    0x0909    //TX_PREEQ_BIN_MIC1_6
-697    0x0908    //TX_PREEQ_BIN_MIC1_7
-698    0x0700    //TX_PREEQ_BIN_MIC1_8
-699    0x0000    //TX_PREEQ_BIN_MIC1_9
-700    0x0000    //TX_PREEQ_BIN_MIC1_10
-701    0x0000    //TX_PREEQ_BIN_MIC1_11
-702    0x0000    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0F10    //TX_PREEQ_BIN_MIC1_10
+701    0x1011    //TX_PREEQ_BIN_MIC1_11
+702    0x1112    //TX_PREEQ_BIN_MIC1_12
+703    0x120B    //TX_PREEQ_BIN_MIC1_13
 704    0x0000    //TX_PREEQ_BIN_MIC1_14
 705    0x0000    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
@@ -23513,19 +35436,19 @@
 715    0x4848    //TX_PREEQ_GAIN_MIC2_0
 716    0x4848    //TX_PREEQ_GAIN_MIC2_1
 717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+718    0x484A    //TX_PREEQ_GAIN_MIC2_3
+719    0x4B4A    //TX_PREEQ_GAIN_MIC2_4
+720    0x4B4C    //TX_PREEQ_GAIN_MIC2_5
+721    0x4C4D    //TX_PREEQ_GAIN_MIC2_6
+722    0x4F50    //TX_PREEQ_GAIN_MIC2_7
+723    0x5050    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5252    //TX_PREEQ_GAIN_MIC2_10
+726    0x5253    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x5454    //TX_PREEQ_GAIN_MIC2_13
+729    0x5455    //TX_PREEQ_GAIN_MIC2_14
+730    0x5555    //TX_PREEQ_GAIN_MIC2_15
 731    0x4848    //TX_PREEQ_GAIN_MIC2_16
 732    0x4848    //TX_PREEQ_GAIN_MIC2_17
 733    0x4848    //TX_PREEQ_GAIN_MIC2_18
@@ -23549,7 +35472,7 @@
 751    0x0808    //TX_PREEQ_BIN_MIC2_12
 752    0x0808    //TX_PREEQ_BIN_MIC2_13
 753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
+754    0x0808    //TX_PREEQ_BIN_MIC2_15
 755    0x0000    //TX_PREEQ_BIN_MIC2_16
 756    0x0000    //TX_PREEQ_BIN_MIC2_17
 757    0x0000    //TX_PREEQ_BIN_MIC2_18
@@ -23568,8 +35491,8 @@
 770    0x0046    //TX_MIC_PWR_BIAS_1
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
 775    0x000F    //TX_GAIN_LIMIT_2
 776    0x000F    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
@@ -23661,7 +35584,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0B50    //TX_TDDRC_DRC_GAIN
+866    0x10CA    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -23686,23 +35609,88 @@
 888    0x0028    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x03C0    //TX_MICMUTE_RATIO_THR
+900    0x0122    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x6590    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0xE4A8    //TX_AMS_RESRV_02
+945    0x1770    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x002C    //RX_RECVFUNC_MODE_0
+0    0x202C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
 4    0x000A    //RX_FRAME_SZ
 5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
 10    0x0800    //RX_PGA
 11    0x7FFF    //RX_A_HP
 12    0x4000    //RX_B_PE
@@ -23718,7 +35706,7 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -23807,17 +35795,17 @@
 111    0x0002    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1200    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x0196    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
@@ -23851,10 +35839,10 @@
 155    0x0000    //RX_BWE_RESRV_1
 156    0x0000    //RX_BWE_RESRV_2
 #VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -23863,17 +35851,17 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1200    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x0196    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -23950,10 +35938,10 @@
 129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -23962,17 +35950,17 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1200    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x0196    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -24046,13 +36034,13 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0013    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -24061,17 +36049,17 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1200    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x0196    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -24145,13 +36133,13 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0020    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -24160,17 +36148,17 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1200    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x0196    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -24244,13 +36232,13 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0036    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -24259,17 +36247,17 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1200    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x0196    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -24346,10 +36334,10 @@
 129    0x005B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -24358,17 +36346,17 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1200    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x0196    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -24445,10 +36433,10 @@
 129    0x0099    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -24457,17 +36445,17 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1200    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x0196    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -24543,16 +36531,868 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x202C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-SWB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2F7C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x00F3    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0003    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
 7    0x0003    //TX_SAMPLINGFREQ_PROC
@@ -24569,8 +37409,8 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0093    //TX_DIST2REF1
-22    0x001A    //TX_DIST2REF_02
+21    0x009C    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
@@ -24589,8 +37429,8 @@
 38    0x0002    //TX_MICS_OF_PAIR1
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
 43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
@@ -24656,7 +37496,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -24702,24 +37542,24 @@
 151    0x1000    //TX_THR_RE_EST
 152    0x2000    //TX_MIN_EQ_RE_EST_0
 153    0x0600    //TX_MIN_EQ_RE_EST_1
-154    0x0200    //TX_MIN_EQ_RE_EST_2
-155    0x0200    //TX_MIN_EQ_RE_EST_3
-156    0x0200    //TX_MIN_EQ_RE_EST_4
-157    0x0200    //TX_MIN_EQ_RE_EST_5
-158    0x0200    //TX_MIN_EQ_RE_EST_6
+154    0x3000    //TX_MIN_EQ_RE_EST_2
+155    0x3000    //TX_MIN_EQ_RE_EST_3
+156    0x3000    //TX_MIN_EQ_RE_EST_4
+157    0x3000    //TX_MIN_EQ_RE_EST_5
+158    0x3000    //TX_MIN_EQ_RE_EST_6
 159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
+160    0x7800    //TX_MIN_EQ_RE_EST_8
+161    0x7800    //TX_MIN_EQ_RE_EST_9
+162    0x7800    //TX_MIN_EQ_RE_EST_10
+163    0x7800    //TX_MIN_EQ_RE_EST_11
+164    0x7800    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
 166    0x3000    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
+169    0x0260    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
+171    0x0680    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -24745,7 +37585,7 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7FF0    //TX_DTD_THR1_0
+197    0x7B0C    //TX_DTD_THR1_0
 198    0x7FF0    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
@@ -24771,22 +37611,22 @@
 220    0x7FFF    //TX_DTD_MIC_BLK
 221    0x023E    //TX_ADPT_STRICT_L
 222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x1000    //TX_B_POST_FILT_ECHO_H
+225    0x01F4    //TX_RATIO_DT_L_TH_HIGH
+226    0x59D8    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+234    0x00C8    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -24801,10 +37641,10 @@
 250    0x0100    //TX_DELTA_THR_SN_EST_0
 251    0x0100    //TX_DELTA_THR_SN_EST_1
 252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
-254    0x0000    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+253    0x0000    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -24830,21 +37670,21 @@
 279    0x2000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0014    //TX_NS_LVL_CTRL_3
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0024    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
 285    0x0014    //TX_NS_LVL_CTRL_4
-286    0x0014    //TX_NS_LVL_CTRL_5
-287    0x0011    //TX_NS_LVL_CTRL_6
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000F    //TX_MIN_GAIN_S_0
-290    0x0010    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x0010    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
 297    0x6000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
@@ -24854,28 +37694,28 @@
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
-306    0x50C0    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
 310    0x09C4    //TX_GAIN0_NTH
 311    0x000A    //TX_MUSIC_MORENS
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
-314    0x5000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x4C00    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x7FFF    //TX_A_POST_FILT_S_1
+316    0x7FFF    //TX_A_POST_FILT_S_2
+317    0x7FFF    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x7FFF    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x4000    //TX_B_POST_FILT_5
+323    0x6000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
@@ -24883,19 +37723,19 @@
 332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
 333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
 334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x6000    //TX_B_LESSCUT_RTO_S_6
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7C00    //TX_LAMBDA_PFILT
-339    0x7D00    //TX_LAMBDA_PFILT_S_0
-340    0x7D00    //TX_LAMBDA_PFILT_S_1
-341    0x7D00    //TX_LAMBDA_PFILT_S_2
-342    0x7D00    //TX_LAMBDA_PFILT_S_3
-343    0x7D00    //TX_LAMBDA_PFILT_S_4
-344    0x7D00    //TX_LAMBDA_PFILT_S_5
-345    0x7D00    //TX_LAMBDA_PFILT_S_6
-346    0x7D00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7F00    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x3E80    //TX_K_PEPPER
 348    0x0400    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
@@ -24904,7 +37744,7 @@
 353    0x0040    //TX_DT_BINVAD_TH_0
 354    0x0040    //TX_DT_BINVAD_TH_1
 355    0x0100    //TX_DT_BINVAD_TH_2
-356    0x0100    //TX_DT_BINVAD_TH_3
+356    0x2000    //TX_DT_BINVAD_TH_3
 357    0x36B0    //TX_DT_BINVAD_ENDF
 358    0x0200    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
@@ -24920,18 +37760,18 @@
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
 371    0x01F4    //TX_NOISE_TH_2
-372    0x4E20    //TX_NOISE_TH_3
+372    0x36B0    //TX_NOISE_TH_3
 373    0x2710    //TX_NOISE_TH_4
-374    0x2710    //TX_NOISE_TH_5
+374    0x2CEC    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x0DAC    //TX_NOISE_TH_6
 379    0x0050    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -24939,17 +37779,17 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
+401    0x0005    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
@@ -25057,21 +37897,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -25100,37 +37940,37 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4850    //TX_FDEQ_GAIN_2
 570    0x5050    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x484A    //TX_FDEQ_GAIN_5
-573    0x4E5E    //TX_FDEQ_GAIN_6
-574    0x5850    //TX_FDEQ_GAIN_7
-575    0x5050    //TX_FDEQ_GAIN_8
-576    0x5050    //TX_FDEQ_GAIN_9
-577    0x5064    //TX_FDEQ_GAIN_10
-578    0x5C70    //TX_FDEQ_GAIN_11
-579    0x7088    //TX_FDEQ_GAIN_12
-580    0x8080    //TX_FDEQ_GAIN_13
-581    0x7474    //TX_FDEQ_GAIN_14
-582    0x8080    //TX_FDEQ_GAIN_15
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E5C    //TX_FDEQ_GAIN_6
+574    0x564E    //TX_FDEQ_GAIN_7
+575    0x4C4E    //TX_FDEQ_GAIN_8
+576    0x4E45    //TX_FDEQ_GAIN_9
+577    0x494A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x5C54    //TX_FDEQ_GAIN_12
+580    0x5466    //TX_FDEQ_GAIN_13
+581    0x5C70    //TX_FDEQ_GAIN_14
+582    0x7C84    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
@@ -25164,7 +38004,7 @@
 613    0x0000    //TX_FDEQ_BIN_22
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
 617    0x4848    //TX_PREEQ_GAIN_MIC0_0
 618    0x4848    //TX_PREEQ_GAIN_MIC0_1
 619    0x4848    //TX_PREEQ_GAIN_MIC0_2
@@ -25189,23 +38029,23 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
 647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0808    //TX_PREEQ_BIN_MIC0_7
-649    0x0808    //TX_PREEQ_BIN_MIC0_8
-650    0x0808    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0808    //TX_PREEQ_BIN_MIC0_11
-653    0x0808    //TX_PREEQ_BIN_MIC0_12
-654    0x0808    //TX_PREEQ_BIN_MIC0_13
-655    0x0808    //TX_PREEQ_BIN_MIC0_14
-656    0xF200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
 660    0x0000    //TX_PREEQ_BIN_MIC0_19
@@ -25214,23 +38054,23 @@
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
 665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4846    //TX_PREEQ_GAIN_MIC1_0
-667    0x4544    //TX_PREEQ_GAIN_MIC1_1
-668    0x4240    //TX_PREEQ_GAIN_MIC1_2
-669    0x3E3C    //TX_PREEQ_GAIN_MIC1_3
-670    0x3A38    //TX_PREEQ_GAIN_MIC1_4
-671    0x3635    //TX_PREEQ_GAIN_MIC1_5
-672    0x3330    //TX_PREEQ_GAIN_MIC1_6
-673    0x2E2A    //TX_PREEQ_GAIN_MIC1_7
-674    0x2625    //TX_PREEQ_GAIN_MIC1_8
-675    0x2421    //TX_PREEQ_GAIN_MIC1_9
-676    0x1D19    //TX_PREEQ_GAIN_MIC1_10
-677    0x1820    //TX_PREEQ_GAIN_MIC1_11
-678    0x2830    //TX_PREEQ_GAIN_MIC1_12
-679    0x303C    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
 685    0x4848    //TX_PREEQ_GAIN_MIC1_19
@@ -25238,23 +38078,23 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x251A    //TX_PREEQ_BIN_MIC1_0
-691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
-692    0x0C0C    //TX_PREEQ_BIN_MIC1_2
-693    0x0C0F    //TX_PREEQ_BIN_MIC1_3
-694    0x0F0F    //TX_PREEQ_BIN_MIC1_4
-695    0x0F09    //TX_PREEQ_BIN_MIC1_5
-696    0x0909    //TX_PREEQ_BIN_MIC1_6
-697    0x0908    //TX_PREEQ_BIN_MIC1_7
-698    0x070F    //TX_PREEQ_BIN_MIC1_8
-699    0x1F08    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0920    //TX_PREEQ_BIN_MIC1_11
-702    0x2020    //TX_PREEQ_BIN_MIC1_12
-703    0x2021    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -25269,16 +38109,16 @@
 718    0x4848    //TX_PREEQ_GAIN_MIC2_3
 719    0x4848    //TX_PREEQ_GAIN_MIC2_4
 720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
 731    0x4848    //TX_PREEQ_GAIN_MIC2_16
 732    0x4848    //TX_PREEQ_GAIN_MIC2_17
 733    0x4848    //TX_PREEQ_GAIN_MIC2_18
@@ -25287,22 +38127,22 @@
 736    0x4848    //TX_PREEQ_GAIN_MIC2_21
 737    0x4848    //TX_PREEQ_GAIN_MIC2_22
 738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
 744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0xF200    //TX_PREEQ_BIN_MIC2_15
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
 755    0x0000    //TX_PREEQ_BIN_MIC2_16
 756    0x0000    //TX_PREEQ_BIN_MIC2_17
 757    0x0000    //TX_PREEQ_BIN_MIC2_18
@@ -25314,17 +38154,17 @@
 763    0x0006    //TX_MASKING_ABILITY
 764    0x0800    //TX_NND_WEIGHT
 765    0x0050    //TX_MIC_CALIBRATION_0
-766    0x0056    //TX_MIC_CALIBRATION_1
+766    0x0065    //TX_MIC_CALIBRATION_1
 767    0x0050    //TX_MIC_CALIBRATION_2
 768    0x0050    //TX_MIC_CALIBRATION_3
 769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0042    //TX_MIC_PWR_BIAS_1
+770    0x0046    //TX_MIC_PWR_BIAS_1
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
+773    0x0000    //TX_GAIN_LIMIT_0
 774    0x000F    //TX_GAIN_LIMIT_1
 775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
+776    0x0000    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -25402,8 +38242,8 @@
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
 853    0x0002    //TX_FILTINDX
-854    0x0001    //TX_TDDRC_THRD_0
-855    0x0002    //TX_TDDRC_THRD_1
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0004    //TX_TDDRC_THRD_1
 856    0x1000    //TX_TDDRC_THRD_2
 857    0x1000    //TX_TDDRC_THRD_3
 858    0x6000    //TX_TDDRC_SLANT_0
@@ -25414,7 +38254,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0BE0    //TX_TDDRC_DRC_GAIN
+866    0x1380    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -25445,8 +38285,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x01C2    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7918    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x3A98    //TX_DTD_THR1_MICMUTE_2
+914    0x32C8    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0xE4A8    //TX_AMS_RESRV_02
+945    0x1770    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0024    //RX_RECVFUNC_MODE_0
+0    0x202C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -25471,7 +38376,7 @@
 22    0x0003    //RX_NS_LVL_CTRL
 23    0x9000    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -25492,14 +38397,14 @@
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
 45    0x4848    //RX_FDEQ_GAIN_6
-46    0x5454    //RX_FDEQ_GAIN_7
+46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
 48    0x4848    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
-53    0x3648    //RX_FDEQ_GAIN_14
+53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -25570,7 +38475,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x01C8    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
@@ -25626,7 +38531,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x01C8    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -25635,14 +38540,14 @@
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
 45    0x4848    //RX_FDEQ_GAIN_6
-46    0x5454    //RX_FDEQ_GAIN_7
+46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
 48    0x4848    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
-53    0x3648    //RX_FDEQ_GAIN_14
+53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -25725,7 +38630,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x01C8    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -25734,14 +38639,14 @@
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
 45    0x4848    //RX_FDEQ_GAIN_6
-46    0x5454    //RX_FDEQ_GAIN_7
+46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
 48    0x4848    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
-53    0x3648    //RX_FDEQ_GAIN_14
+53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -25799,7 +38704,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0013    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -25824,7 +38729,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x01C8    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -25833,14 +38738,14 @@
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
 45    0x4848    //RX_FDEQ_GAIN_6
-46    0x5454    //RX_FDEQ_GAIN_7
+46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
 48    0x4848    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
-53    0x3648    //RX_FDEQ_GAIN_14
+53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -25898,7 +38803,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0020    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -25923,7 +38828,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x01C8    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -25932,14 +38837,14 @@
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
 45    0x4848    //RX_FDEQ_GAIN_6
-46    0x5454    //RX_FDEQ_GAIN_7
+46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
 48    0x4848    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
-53    0x3648    //RX_FDEQ_GAIN_14
+53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -25997,7 +38902,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0036    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -26022,7 +38927,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x01C8    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -26031,14 +38936,14 @@
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
 45    0x4848    //RX_FDEQ_GAIN_6
-46    0x5454    //RX_FDEQ_GAIN_7
+46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
 48    0x4848    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
-53    0x3648    //RX_FDEQ_GAIN_14
+53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -26121,7 +39026,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x01C8    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -26130,14 +39035,14 @@
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
 45    0x4848    //RX_FDEQ_GAIN_6
-46    0x5454    //RX_FDEQ_GAIN_7
+46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
 48    0x4848    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
-53    0x3648    //RX_FDEQ_GAIN_14
+53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -26220,7 +39125,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
+124    0x01C8    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -26229,14 +39134,14 @@
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
 45    0x4848    //RX_FDEQ_GAIN_6
-46    0x5454    //RX_FDEQ_GAIN_7
+46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
 48    0x4848    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
-53    0x3648    //RX_FDEQ_GAIN_14
+53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -26296,10 +39201,862 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x202C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-FB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -26322,8 +40079,8 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0093    //TX_DIST2REF1
-22    0x001A    //TX_DIST2REF_02
+21    0x009D    //TX_DIST2REF1
+22    0x0010    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
@@ -26409,7 +40166,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -26538,8 +40295,8 @@
 234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -26552,11 +40309,11 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
 254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
+255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0200    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
@@ -26584,11 +40341,11 @@
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
 282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0016    //TX_NS_LVL_CTRL_4
-286    0x0014    //TX_NS_LVL_CTRL_5
-287    0x0011    //TX_NS_LVL_CTRL_6
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000F    //TX_MIN_GAIN_S_0
 290    0x0010    //TX_MIN_GAIN_S_1
@@ -26606,8 +40363,8 @@
 302    0x4000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x50C0    //TX_SNRI_SUP_6
+305    0x50C0    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
@@ -26616,19 +40373,19 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x5000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x4C00    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+315    0x4C00    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
+323    0x2000    //TX_B_POST_FILT_1
 324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
+325    0x4000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
-327    0x4000    //TX_B_POST_FILT_5
+327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
@@ -26636,14 +40393,14 @@
 332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
 333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
 334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x6000    //TX_B_LESSCUT_RTO_S_6
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7C00    //TX_LAMBDA_PFILT
 339    0x7C00    //TX_LAMBDA_PFILT_S_0
 340    0x7C00    //TX_LAMBDA_PFILT_S_1
-341    0x7C00    //TX_LAMBDA_PFILT_S_2
-342    0x7A00    //TX_LAMBDA_PFILT_S_3
+341    0x7A00    //TX_LAMBDA_PFILT_S_2
+342    0x7C00    //TX_LAMBDA_PFILT_S_3
 343    0x7C00    //TX_LAMBDA_PFILT_S_4
 344    0x7C00    //TX_LAMBDA_PFILT_S_5
 345    0x7C00    //TX_LAMBDA_PFILT_S_6
@@ -26681,10 +40438,10 @@
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x2710    //TX_NOISE_TH_6
 379    0x0033    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -26692,15 +40449,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x4000    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -26815,16 +40572,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -26853,19 +40610,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -26873,14 +40630,14 @@
 569    0x4848    //TX_FDEQ_GAIN_2
 570    0x4848    //TX_FDEQ_GAIN_3
 571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
+572    0x5048    //TX_FDEQ_GAIN_5
 573    0x4848    //TX_FDEQ_GAIN_6
 574    0x4848    //TX_FDEQ_GAIN_7
 575    0x4848    //TX_FDEQ_GAIN_8
 576    0x4848    //TX_FDEQ_GAIN_9
 577    0x5B5B    //TX_FDEQ_GAIN_10
-578    0x7373    //TX_FDEQ_GAIN_11
-579    0x739A    //TX_FDEQ_GAIN_12
+578    0x737B    //TX_FDEQ_GAIN_11
+579    0x7B9A    //TX_FDEQ_GAIN_12
 580    0x9AC4    //TX_FDEQ_GAIN_13
 581    0xC4C4    //TX_FDEQ_GAIN_14
 582    0xC4C4    //TX_FDEQ_GAIN_15
@@ -26917,24 +40674,24 @@
 613    0x0000    //TX_FDEQ_BIN_22
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
 617    0x4848    //TX_PREEQ_GAIN_MIC0_0
 618    0x4848    //TX_PREEQ_GAIN_MIC0_1
 619    0x4848    //TX_PREEQ_GAIN_MIC0_2
 620    0x4848    //TX_PREEQ_GAIN_MIC0_3
 621    0x4848    //TX_PREEQ_GAIN_MIC0_4
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+623    0x4849    //TX_PREEQ_GAIN_MIC0_6
+624    0x4A4B    //TX_PREEQ_GAIN_MIC0_7
+625    0x4C4B    //TX_PREEQ_GAIN_MIC0_8
+626    0x4A48    //TX_PREEQ_GAIN_MIC0_9
+627    0x4B4C    //TX_PREEQ_GAIN_MIC0_10
+628    0x4C4B    //TX_PREEQ_GAIN_MIC0_11
+629    0x4838    //TX_PREEQ_GAIN_MIC0_12
+630    0x3858    //TX_PREEQ_GAIN_MIC0_13
+631    0x7060    //TX_PREEQ_GAIN_MIC0_14
+632    0x9870    //TX_PREEQ_GAIN_MIC0_15
+633    0x5848    //TX_PREEQ_GAIN_MIC0_16
 634    0x4848    //TX_PREEQ_GAIN_MIC0_17
 635    0x4848    //TX_PREEQ_GAIN_MIC0_18
 636    0x4848    //TX_PREEQ_GAIN_MIC0_19
@@ -26942,23 +40699,23 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x4000    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
 660    0x0000    //TX_PREEQ_BIN_MIC0_19
@@ -26967,21 +40724,21 @@
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
 665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4846    //TX_PREEQ_GAIN_MIC1_0
-667    0x4544    //TX_PREEQ_GAIN_MIC1_1
-668    0x4240    //TX_PREEQ_GAIN_MIC1_2
-669    0x3E3C    //TX_PREEQ_GAIN_MIC1_3
-670    0x3A38    //TX_PREEQ_GAIN_MIC1_4
-671    0x3635    //TX_PREEQ_GAIN_MIC1_5
-672    0x3330    //TX_PREEQ_GAIN_MIC1_6
-673    0x2E2A    //TX_PREEQ_GAIN_MIC1_7
-674    0x2625    //TX_PREEQ_GAIN_MIC1_8
-675    0x2421    //TX_PREEQ_GAIN_MIC1_9
-676    0x1D19    //TX_PREEQ_GAIN_MIC1_10
-677    0x1820    //TX_PREEQ_GAIN_MIC1_11
-678    0x2830    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4645    //TX_PREEQ_GAIN_MIC1_6
+673    0x4442    //TX_PREEQ_GAIN_MIC1_7
+674    0x4140    //TX_PREEQ_GAIN_MIC1_8
+675    0x3E3D    //TX_PREEQ_GAIN_MIC1_9
+676    0x3C3C    //TX_PREEQ_GAIN_MIC1_10
+677    0x3C3C    //TX_PREEQ_GAIN_MIC1_11
+678    0x3938    //TX_PREEQ_GAIN_MIC1_12
+679    0x3A3C    //TX_PREEQ_GAIN_MIC1_13
+680    0x3C3E    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
@@ -26991,23 +40748,23 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x1812    //TX_PREEQ_BIN_MIC1_0
-691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x080A    //TX_PREEQ_BIN_MIC1_3
-694    0x0B09    //TX_PREEQ_BIN_MIC1_4
-695    0x0A06    //TX_PREEQ_BIN_MIC1_5
-696    0x0606    //TX_PREEQ_BIN_MIC1_6
-697    0x0605    //TX_PREEQ_BIN_MIC1_7
-698    0x050A    //TX_PREEQ_BIN_MIC1_8
-699    0x1505    //TX_PREEQ_BIN_MIC1_9
-700    0x0506    //TX_PREEQ_BIN_MIC1_10
-701    0x0615    //TX_PREEQ_BIN_MIC1_11
-702    0x1516    //TX_PREEQ_BIN_MIC1_12
-703    0x2021    //TX_PREEQ_BIN_MIC1_13
-704    0x2021    //TX_PREEQ_BIN_MIC1_14
-705    0x2021    //TX_PREEQ_BIN_MIC1_15
-706    0x0800    //TX_PREEQ_BIN_MIC1_16
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x4000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -27167,7 +40924,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0CE6    //TX_TDDRC_DRC_GAIN
+866    0x0FDA    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -27198,8 +40955,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x002C    //RX_RECVFUNC_MODE_0
+0    0x202C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0004    //RX_SAMPLINGFREQ_SIG
 3    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -27224,7 +41046,7 @@
 22    0x000A    //RX_NS_LVL_CTRL
 23    0xF600    //RX_THR_SN_EST
 24    0x7000    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -27552,7 +41374,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0013    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -27651,7 +41473,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0020    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -27750,7 +41572,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0036    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -28049,12 +41871,864 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x202C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7B02    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0500    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000A    //RX_NS_LVL_CTRL
+180    0xF600    //RX_THR_SN_EST
+181    0x7000    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-NB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
-0    0x0008    //TX_OPERATION_MODE_0
+0    0x0009    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
 3    0x2B68    //TX_SENDFUNC_MODE_0
@@ -28369,20 +43043,20 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
-316    0x1000    //TX_A_POST_FILT_S_2
+315    0x1000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
 317    0x4000    //TX_A_POST_FILT_S_3
 318    0x4000    //TX_A_POST_FILT_S_4
 319    0x4000    //TX_A_POST_FILT_S_5
 320    0x4000    //TX_A_POST_FILT_S_6
 321    0x4000    //TX_A_POST_FILT_S_7
 322    0x0400    //TX_B_POST_FILT_0
-323    0x0400    //TX_B_POST_FILT_1
+323    0x2000    //TX_B_POST_FILT_1
 324    0x2000    //TX_B_POST_FILT_2
 325    0x2000    //TX_B_POST_FILT_3
 326    0x2000    //TX_B_POST_FILT_4
 327    0x2000    //TX_B_POST_FILT_5
-328    0x2000    //TX_B_POST_FILT_6
+328    0x0400    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
 331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
@@ -28421,7 +43095,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
+367    0x003B    //TX_NOISE_TH_0
 368    0x1B58    //TX_NOISE_TH_0_2
 369    0x2134    //TX_NOISE_TH_0_3
 370    0x02BC    //TX_NOISE_TH_1
@@ -28433,11 +43107,11 @@
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x0000    //TX_NOISE_TH_5_4
 378    0x0032    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x00C8    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
 385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
@@ -28445,22 +43119,22 @@
 388    0x00CE    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x0032    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x7FFF    //TX_MIN_G_CTRL_SSNS
 409    0x0000    //TX_METAL_RTO_THR
@@ -28568,16 +43242,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -28606,19 +43280,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0014    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -28945,14 +43619,79 @@
 888    0x00C8    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0024    //RX_RECVFUNC_MODE_0
+0    0x2024    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -28977,7 +43716,7 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -29802,12 +44541,864 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x2024    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2030    //RX_TDDRC_THRD_2
+272    0x2030    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0478    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000C    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2030    //RX_TDDRC_THRD_2
+272    0x2030    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0478    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000C    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2030    //RX_TDDRC_THRD_2
+272    0x2030    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0478    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0014    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2030    //RX_TDDRC_THRD_2
+272    0x2030    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0478    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0021    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2030    //RX_TDDRC_THRD_2
+272    0x2030    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0478    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0037    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2030    //RX_TDDRC_THRD_2
+272    0x2030    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0478    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2030    //RX_TDDRC_THRD_2
+272    0x2030    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0478    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2030    //RX_TDDRC_THRD_2
+272    0x2030    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0478    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-WB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
-0    0x0008    //TX_OPERATION_MODE_0
+0    0x0009    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
 3    0x2B68    //TX_SENDFUNC_MODE_0
@@ -30049,7 +45640,7 @@
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
+242    0xFA00    //TX_THR_SN_EST_0
 243    0xF400    //TX_THR_SN_EST_1
 244    0xF600    //TX_THR_SN_EST_2
 245    0xF400    //TX_THR_SN_EST_3
@@ -30058,20 +45649,20 @@
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -30089,16 +45680,16 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x000F    //TX_NS_LVL_CTRL_1
-283    0x0011    //TX_NS_LVL_CTRL_2
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
 284    0x000F    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
 287    0x000F    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
 292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
@@ -30122,12 +45713,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
@@ -30174,7 +45765,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
+367    0x0102    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
@@ -30186,11 +45777,11 @@
 376    0x7FFF    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x00F8    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -30198,22 +45789,22 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x00DC    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x7FFF    //TX_MIN_G_CTRL_SSNS
 409    0x0000    //TX_METAL_RTO_THR
@@ -30321,16 +45912,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -30359,19 +45950,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x001C    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -30698,14 +46289,79 @@
 888    0x00C8    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0024    //RX_RECVFUNC_MODE_0
+0    0x2024    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -30730,7 +46386,7 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -31555,12 +47211,864 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x2024    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000C    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000C    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0014    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0021    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0037    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-SWB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
-0    0x0001    //TX_OPERATION_MODE_0
+0    0x0009    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
 3    0x2B68    //TX_SENDFUNC_MODE_0
@@ -31802,7 +48310,7 @@
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
+242    0xFA00    //TX_THR_SN_EST_0
 243    0xF400    //TX_THR_SN_EST_1
 244    0xF600    //TX_THR_SN_EST_2
 245    0xF400    //TX_THR_SN_EST_3
@@ -31811,20 +48319,20 @@
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
 253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x6000    //TX_LAMBDA_NN_EST_1
+259    0x4000    //TX_LAMBDA_NN_EST_1
 260    0x4000    //TX_LAMBDA_NN_EST_2
 261    0x4000    //TX_LAMBDA_NN_EST_3
 262    0x4000    //TX_LAMBDA_NN_EST_4
 263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
+264    0x6000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
 267    0x001E    //TX_INBEAM_T
@@ -31842,16 +48350,16 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000B    //TX_NS_LVL_CTRL_0
-282    0x000F    //TX_NS_LVL_CTRL_1
-283    0x0011    //TX_NS_LVL_CTRL_2
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
 284    0x000F    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
 287    0x000F    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
 292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
@@ -31875,12 +48383,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x2000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
+315    0x5000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
@@ -31927,7 +48435,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
+367    0x0383    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
@@ -31939,11 +48447,11 @@
 376    0x7FFF    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -31951,22 +48459,22 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x02F3    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x2900    //TX_MIN_G_CTRL_SSNS
 409    0x0800    //TX_METAL_RTO_THR
@@ -32074,16 +48582,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -32112,19 +48620,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -32449,16 +48957,81 @@
 886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
 888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0024    //RX_RECVFUNC_MODE_0
+0    0x2024    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -32483,7 +49056,7 @@
 22    0x0003    //RX_NS_LVL_CTRL
 23    0x9000    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -33308,17 +49881,869 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x2024    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000C    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000C    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0014    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0021    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0037    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-FB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
-0    0x0000    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0009    //TX_OPERATION_MODE_1
 2    0x0020    //TX_PATCH_REG
-3    0x0000    //TX_SENDFUNC_MODE_0
+3    0x6B6A    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0000    //TX_NUM_MIC
+5    0x0001    //TX_NUM_MIC
 6    0x0004    //TX_SAMPLINGFREQ_SIG
 7    0x0004    //TX_SAMPLINGFREQ_PROC
 8    0x000A    //TX_FRAME_SZ_SIG
@@ -33326,7 +50751,7 @@
 10    0x0000    //TX_DELAY_OPT
 11    0x0028    //TX_MAX_TAIL_LENGTH
 12    0x0001    //TX_NUM_LOUTCHN
-13    0x0000    //TX_MAXNUM_AECREF
+13    0x0001    //TX_MAXNUM_AECREF
 14    0x0000    //TX_DBG_FUNC_REG
 15    0x0000    //TX_DBG_FUNC_REG1
 16    0x0000    //TX_SYS_RESRV_0
@@ -33334,14 +50759,14 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0000    //TX_DIST2REF1
+21    0x009B    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x0000    //TX_PGA_0
-28    0x0000    //TX_PGA_1
+27    0x0B4C    //TX_PGA_0
+28    0x0800    //TX_PGA_1
 29    0x0000    //TX_PGA_2
 30    0x0000    //TX_PGA_3
 31    0x0000    //TX_PGA_4
@@ -33385,7 +50810,7 @@
 69    0x0001    //TX_MICFORBFMARK_4
 70    0x0001    //TX_MICFORBFMARK_5
 71    0x0000    //TX_DIST2REF_10
-72    0x0000    //TX_DIST2REF_11
+72    0x3E00    //TX_DIST2REF_11
 73    0x0000    //TX_DIST2REF2
 74    0x0000    //TX_DIST2REF_13
 75    0x0000    //TX_DIST2REF_14
@@ -33420,8 +50845,8 @@
 104    0x0000    //TX_MIC_LOC_23
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
-107    0x0000    //TX_MIC_REFBLK_VOLUME
-108    0x0000    //TX_MIC_BLOCK_VOLUME
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -33430,22 +50855,22 @@
 114    0x0000    //TX_REFMIC_BLKFACTOR
 115    0x0000    //TX_BLMIC_BLKFACTOR
 116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0000    //TX_MICBLK_START_BIN
-118    0x0000    //TX_MICBLK_END_BIN
-119    0x0000    //TX_MICBLK_FE_HOLD
-120    0x0000    //TX_MICBLK_MR_EXP_TH
-121    0x0000    //TX_MICBLK_LR_EXP_TH
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
 122    0x0000    //TX_FENE_HOLD
-123    0x0000    //TX_FE_ENER_TH_MTS
-124    0x0000    //TX_FE_ENER_TH_EXP
-125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0000    //TX_MIC_BLOCK_N
-128    0x0000    //TX_A_HP
-129    0x0000    //TX_B_PE
-130    0x0000    //TX_THR_PITCH_DET_0
-131    0x0000    //TX_THR_PITCH_DET_1
-132    0x0000    //TX_THR_PITCH_DET_2
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
 133    0x0008    //TX_PITCH_BFR_LEN
 134    0x0003    //TX_SBD_PITCH_DET
 135    0x0050    //TX_TD_AEC_L
@@ -33459,35 +50884,35 @@
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
-146    0x0000    //TX_TAIL_LENGTH
-147    0x0000    //TX_AEC_REF_GAIN_0
-148    0x0000    //TX_AEC_REF_GAIN_1
-149    0x0000    //TX_AEC_REF_GAIN_2
-150    0x0000    //TX_EAD_THR
-151    0x0000    //TX_THR_RE_EST
-152    0x0000    //TX_MIN_EQ_RE_EST_0
-153    0x0000    //TX_MIN_EQ_RE_EST_1
-154    0x0000    //TX_MIN_EQ_RE_EST_2
-155    0x0000    //TX_MIN_EQ_RE_EST_3
-156    0x0000    //TX_MIN_EQ_RE_EST_4
-157    0x0000    //TX_MIN_EQ_RE_EST_5
-158    0x0000    //TX_MIN_EQ_RE_EST_6
-159    0x0000    //TX_MIN_EQ_RE_EST_7
-160    0x0000    //TX_MIN_EQ_RE_EST_8
-161    0x0000    //TX_MIN_EQ_RE_EST_9
-162    0x0000    //TX_MIN_EQ_RE_EST_10
-163    0x0000    //TX_MIN_EQ_RE_EST_11
-164    0x0000    //TX_MIN_EQ_RE_EST_12
-165    0x0000    //TX_LAMBDA_RE_EST
-166    0x0000    //TX_LAMBDA_CB_NLE
-167    0x0000    //TX_C_POST_FLT
-168    0x0000    //TX_GAIN_NP
-169    0x0000    //TX_SE_HOLD_N
-170    0x0000    //TX_DT_HOLD_N
-171    0x0000    //TX_DT2_HOLD_N
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0200    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x61A8    //TX_EAD_THR
+151    0x0400    //TX_THR_RE_EST
+152    0x3000    //TX_MIN_EQ_RE_EST_0
+153    0x3000    //TX_MIN_EQ_RE_EST_1
+154    0x4000    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x6000    //TX_MIN_EQ_RE_EST_6
+159    0x6000    //TX_MIN_EQ_RE_EST_7
+160    0x6000    //TX_MIN_EQ_RE_EST_8
+161    0x6000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x4000    //TX_MIN_EQ_RE_EST_11
+164    0x4000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x3000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
-174    0x0000    //TX_AEC_RESRV_2
+174    0x0014    //TX_AEC_RESRV_2
 175    0x0000    //TX_MIC_DELAY_LENGTH
 176    0x0000    //TX_REF_DELAY_LENGTH
 177    0x0000    //TX_ADD_LINEIN_GAINL
@@ -33510,241 +50935,241 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x0000    //TX_DTD_THR1_0
-198    0x0000    //TX_DTD_THR1_1
-199    0x0000    //TX_DTD_THR1_2
-200    0x0000    //TX_DTD_THR1_3
-201    0x0000    //TX_DTD_THR1_4
-202    0x0000    //TX_DTD_THR1_5
-203    0x0000    //TX_DTD_THR1_6
-204    0x0000    //TX_DTD_THR2_0
-205    0x0000    //TX_DTD_THR2_1
-206    0x0000    //TX_DTD_THR2_2
-207    0x0000    //TX_DTD_THR2_3
-208    0x0000    //TX_DTD_THR2_4
-209    0x0000    //TX_DTD_THR2_5
-210    0x0000    //TX_DTD_THR2_6
-211    0x0000    //TX_DTD_THR3
+197    0x0800    //TX_DTD_THR1_0
+198    0x0800    //TX_DTD_THR1_1
+199    0x0800    //TX_DTD_THR1_2
+200    0x0800    //TX_DTD_THR1_3
+201    0x0800    //TX_DTD_THR1_4
+202    0x0800    //TX_DTD_THR1_5
+203    0x0800    //TX_DTD_THR1_6
+204    0x0800    //TX_DTD_THR2_0
+205    0x0800    //TX_DTD_THR2_1
+206    0x0800    //TX_DTD_THR2_2
+207    0x0800    //TX_DTD_THR2_3
+208    0x0800    //TX_DTD_THR2_4
+209    0x0100    //TX_DTD_THR2_5
+210    0x0100    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x0000    //TX_DT_CUT_K
-214    0x0000    //TX_DT_CUT_THR
+213    0x03E8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
 217    0x4000    //TX_FDPFGAINECHO
 218    0x0000    //TX_DTD_HD_THR
 219    0x0000    //TX_SPK_CUT_K_S
 220    0x0000    //TX_DTD_MIC_BLK
-221    0x0000    //TX_ADPT_STRICT_L
-222    0x0000    //TX_ADPT_STRICT_H
-223    0x0000    //TX_RATIO_DT_L_TH_LOW
-224    0x0000    //TX_RATIO_DT_H_TH_LOW
-225    0x0000    //TX_RATIO_DT_L_TH_HIGH
-226    0x0000    //TX_RATIO_DT_H_TH_HIGH
-227    0x0000    //TX_RATIO_DT_L0_TH
-228    0x0000    //TX_B_POST_FILT_ECHO_L
-229    0x0000    //TX_B_POST_FILT_ECHO_H
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x0000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
-235    0x0000    //TX_RATIO_DT_H_TH_CUT
-236    0x0000    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00C0    //TX_EPD_OFFSET_00
+233    0x00C0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0x0000    //TX_THR_SN_EST_0
-243    0x0000    //TX_THR_SN_EST_1
-244    0x0000    //TX_THR_SN_EST_2
-245    0x0000    //TX_THR_SN_EST_3
-246    0x0000    //TX_THR_SN_EST_4
-247    0x0000    //TX_THR_SN_EST_5
-248    0x0000    //TX_THR_SN_EST_6
-249    0x0000    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
-252    0x0000    //TX_DELTA_THR_SN_EST_2
-253    0x0000    //TX_DELTA_THR_SN_EST_3
-254    0x0000    //TX_DELTA_THR_SN_EST_4
-255    0x0000    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0000    //TX_DELTA_THR_SN_EST_7
-258    0x0000    //TX_LAMBDA_NN_EST_0
-259    0x0000    //TX_LAMBDA_NN_EST_1
-260    0x0000    //TX_LAMBDA_NN_EST_2
-261    0x0000    //TX_LAMBDA_NN_EST_3
-262    0x0000    //TX_LAMBDA_NN_EST_4
-263    0x0000    //TX_LAMBDA_NN_EST_5
-264    0x0000    //TX_LAMBDA_NN_EST_6
-265    0x0000    //TX_LAMBDA_NN_EST_7
-266    0x0000    //TX_N_SN_EST
-267    0x0000    //TX_INBEAM_T
+242    0xF700    //TX_THR_SN_EST_0
+243    0xFB00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF700    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF600    //TX_THR_SN_EST_5
+248    0xF600    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0200    //TX_DELTA_THR_SN_EST_0
+251    0x0400    //TX_DELTA_THR_SN_EST_1
+252    0x0300    //TX_DELTA_THR_SN_EST_2
+253    0x0600    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
 268    0x0041    //TX_INBEAMHOLDT
-269    0x0000    //TX_G_STRICT
-270    0x0000    //TX_EQ_THR_BF
-271    0x0000    //TX_LAMBDA_EQ_BF
-272    0x0000    //TX_NE_RTO_TH
-273    0x0000    //TX_NE_RTO_TH_L
-274    0x0000    //TX_MAINREFRTOH_TH_H
-275    0x0000    //TX_MAINREFRTOH_TH_L
-276    0x0000    //TX_MAINREFRTO_TH_H
-277    0x0000    //TX_MAINREFRTO_TH_L
-278    0x0000    //TX_MAINREFRTO_TH_EQ
-279    0x0000    //TX_B_POST_FLT_0
-280    0x0000    //TX_B_POST_FLT_1
-281    0x0000    //TX_NS_LVL_CTRL_0
-282    0x0000    //TX_NS_LVL_CTRL_1
-283    0x0000    //TX_NS_LVL_CTRL_2
-284    0x0000    //TX_NS_LVL_CTRL_3
-285    0x0000    //TX_NS_LVL_CTRL_4
-286    0x0000    //TX_NS_LVL_CTRL_5
-287    0x0000    //TX_NS_LVL_CTRL_6
-288    0x0000    //TX_NS_LVL_CTRL_7
-289    0x0000    //TX_MIN_GAIN_S_0
-290    0x0000    //TX_MIN_GAIN_S_1
-291    0x0000    //TX_MIN_GAIN_S_2
-292    0x0000    //TX_MIN_GAIN_S_3
-293    0x0000    //TX_MIN_GAIN_S_4
-294    0x0000    //TX_MIN_GAIN_S_5
-295    0x0000    //TX_MIN_GAIN_S_6
-296    0x0000    //TX_MIN_GAIN_S_7
-297    0x0000    //TX_NMOS_SUP
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0012    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0019    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x0011    //TX_MIN_GAIN_S_6
+296    0x000C    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x0000    //TX_SNRI_SUP_0
-301    0x0000    //TX_SNRI_SUP_1
-302    0x0000    //TX_SNRI_SUP_2
-303    0x0000    //TX_SNRI_SUP_3
-304    0x0000    //TX_SNRI_SUP_4
-305    0x0000    //TX_SNRI_SUP_5
-306    0x0000    //TX_SNRI_SUP_6
-307    0x0000    //TX_SNRI_SUP_7
-308    0x0000    //TX_THR_LFNS
-309    0x0000    //TX_G_LFNS
+300    0x7000    //TX_SNRI_SUP_0
+301    0x7000    //TX_SNRI_SUP_1
+302    0x7000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0016    //TX_G_LFNS
 310    0x09C4    //TX_GAIN0_NTH
 311    0x000A    //TX_MUSIC_MORENS
-312    0x0000    //TX_A_POST_FILT_0
+312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
-314    0x0000    //TX_A_POST_FILT_S_0
-315    0x0000    //TX_A_POST_FILT_S_1
-316    0x0000    //TX_A_POST_FILT_S_2
-317    0x0000    //TX_A_POST_FILT_S_3
-318    0x0000    //TX_A_POST_FILT_S_4
-319    0x0000    //TX_A_POST_FILT_S_5
-320    0x0000    //TX_A_POST_FILT_S_6
-321    0x0000    //TX_A_POST_FILT_S_7
-322    0x0000    //TX_B_POST_FILT_0
-323    0x0000    //TX_B_POST_FILT_1
-324    0x0000    //TX_B_POST_FILT_2
-325    0x0000    //TX_B_POST_FILT_3
-326    0x0000    //TX_B_POST_FILT_4
-327    0x0000    //TX_B_POST_FILT_5
-328    0x0000    //TX_B_POST_FILT_6
-329    0x0000    //TX_B_POST_FILT_7
-330    0x0000    //TX_B_LESSCUT_RTO_S_0
-331    0x0000    //TX_B_LESSCUT_RTO_S_1
-332    0x0000    //TX_B_LESSCUT_RTO_S_2
-333    0x0000    //TX_B_LESSCUT_RTO_S_3
-334    0x0000    //TX_B_LESSCUT_RTO_S_4
-335    0x0000    //TX_B_LESSCUT_RTO_S_5
-336    0x0000    //TX_B_LESSCUT_RTO_S_6
-337    0x0000    //TX_B_LESSCUT_RTO_S_7
-338    0x0000    //TX_LAMBDA_PFILT
-339    0x0000    //TX_LAMBDA_PFILT_S_0
-340    0x0000    //TX_LAMBDA_PFILT_S_1
-341    0x0000    //TX_LAMBDA_PFILT_S_2
-342    0x0000    //TX_LAMBDA_PFILT_S_3
-343    0x0000    //TX_LAMBDA_PFILT_S_4
-344    0x0000    //TX_LAMBDA_PFILT_S_5
-345    0x0000    //TX_LAMBDA_PFILT_S_6
-346    0x0000    //TX_LAMBDA_PFILT_S_7
-347    0x0000    //TX_K_PEPPER
-348    0x0000    //TX_A_PEPPER
-349    0x0000    //TX_K_PEPPER_HF
-350    0x0000    //TX_A_PEPPER_HF
-351    0x0000    //TX_HMNC_BST_FLG
-352    0x0000    //TX_HMNC_BST_THR
-353    0x0000    //TX_DT_BINVAD_TH_0
-354    0x0000    //TX_DT_BINVAD_TH_1
-355    0x0000    //TX_DT_BINVAD_TH_2
-356    0x0000    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
+314    0x6000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x6000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7CCD    //TX_LAMBDA_PFILT_S_0
+340    0x7CCD    //TX_LAMBDA_PFILT_S_1
+341    0x7CCD    //TX_LAMBDA_PFILT_S_2
+342    0x7CCD    //TX_LAMBDA_PFILT_S_3
+343    0x7CCD    //TX_LAMBDA_PFILT_S_4
+344    0x7CCD    //TX_LAMBDA_PFILT_S_5
+345    0x7CCD    //TX_LAMBDA_PFILT_S_6
+346    0x7CCD    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0500    //TX_A_PEPPER
+349    0x1600    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
 358    0x0000    //TX_C_POST_FLT_DT
-359    0x0000    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0000    //TX_DT_BOOST
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
 362    0x0005    //TX_BF_DVG_TH
 363    0x001E    //TX_SN_C_F
 364    0x0000    //TX_K_APT
-365    0x0000    //TX_NOISEDET
-366    0x0000    //TX_NDETCT
-367    0x0000    //TX_NOISE_TH_0
-368    0x0000    //TX_NOISE_TH_0_2
-369    0x0000    //TX_NOISE_TH_0_3
-370    0x0000    //TX_NOISE_TH_1
-371    0x0000    //TX_NOISE_TH_2
-372    0x0000    //TX_NOISE_TH_3
-373    0x0000    //TX_NOISE_TH_4
-374    0x0000    //TX_NOISE_TH_5
-375    0x0000    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x04E8    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x02A6    //TX_NOISE_TH_1
+371    0x04B0    //TX_NOISE_TH_2
+372    0x3194    //TX_NOISE_TH_3
+373    0x0960    //TX_NOISE_TH_4
+374    0x5555    //TX_NOISE_TH_5
+375    0x3FF4    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
 377    0x0000    //TX_NOISE_TH_5_4
-378    0x0000    //TX_NOISE_TH_6
-379    0x0000    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
-384    0x0000    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0000    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0000    //TX_OUT_ENER_S_TH_NOISY
-387    0x0000    //TX_OUT_ENER_TH_NOISE
-388    0x0000    //TX_OUT_ENER_TH_SPEECH
+378    0x02BC    //TX_NOISE_TH_6
+379    0x02BC    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0000    //TX_MAXLEVEL_CNG
+401    0x0004    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x0000    //TX_NS_ENOISE_MIC0_TH
-406    0x0000    //TX_MINENOISE_MIC0_TH
-407    0x0000    //TX_MINENOISE_MIC0_S_TH
-408    0x0000    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x0000    //TX_NS_FP_K_METAL
-411    0x0000    //TX_NOISEDET_BOOST_TH
-412    0x0000    //TX_NSMOOTH_TH
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x04E7    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
 413    0x0000    //TX_NS_RESRV_8
-414    0x0000    //TX_RHO_UPB
-415    0x0000    //TX_N_HOLD_HS
-416    0x0000    //TX_N_RHO_BFR0
-417    0x0000    //TX_LAMBDA_ARSP_EST
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
 418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0000    //TX_THR_STD_NSR
-420    0x0000    //TX_THR_STD_PLH
-421    0x0000    //TX_N_HOLD_STD
-422    0x0000    //TX_THR_STD_RHO
-423    0x0000    //TX_BF_RESET_THR_HS
-424    0x0000    //TX_SB_RTO_MEAN_TH
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
 425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x0000    //TX_SB_RTO_MEAN_TH_ABN
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
 427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
 428    0x0000    //TX_WTA_EN_RTO_TH
 429    0x0000    //TX_TOP_ENER_TH_F
 430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0000    //TX_MIC_BLOCK_FACTOR
+431    0x0800    //TX_MIC_BLOCK_FACTOR
 432    0x0000    //TX_NSEST_BFRLRNRDC
 433    0x0000    //TX_THR_POST_FLT_HS
 434    0x0010    //TX_HS_VAD_BIN
@@ -33752,18 +51177,18 @@
 436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
 437    0x0032    //TX_SILENCE_T
 438    0x0000    //TX_A_POST_FLT_WTA
-439    0x0000    //TX_LAMBDA_PFLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
 440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0000    //TX_SB_RHO_MEAN3_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
 442    0x0000    //TX_HS_RESRV_4
 443    0x0000    //TX_HS_RESRV_5
-444    0x0000    //TX_DOA_VAD_THR_1
+444    0x003C    //TX_DOA_VAD_THR_1
 445    0x0000    //TX_DOA_VAD_THR_2
 446    0x0028    //TX_DOA_VAD_THR1_0
 447    0x0028    //TX_DOA_VAD_THR1_1
 448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x0000    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x0000    //TX_DFLT_SRC_DOA_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
 451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
 452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
 453    0x0000    //TX_DFLT_SRC_DOA_0B
@@ -33785,14 +51210,14 @@
 469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
 470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
 471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0000    //TX_BF_HOLDOFF_T
+472    0x0100    //TX_BF_HOLDOFF_T
 473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0000    //TX_MAINTOREFR_TH0
+474    0x4000    //TX_MAINTOREFR_TH0
 475    0x071C    //TX_DOA_TRK_THR
 476    0x012C    //TX_DOA_TRACK_HT
-477    0x0000    //TX_N1_HOLD_HF
-478    0x0000    //TX_N2_HOLD_HF
-479    0x0000    //TX_BF_RESET_THR_HF
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
 480    0x7333    //TX_DOA_SMOOTH
 481    0x0800    //TX_MU_BF
 482    0x0800    //TX_BF_MU_LF_B2
@@ -33810,116 +51235,116 @@
 494    0x0000    //TX_DFLT_SRC_LOC_2
 495    0x038E    //TX_DOA_TRACK_VADTH
 496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0000    //TX_NOR_OFF_THR
-498    0x0000    //TX_MORE_ON_700HZ_THR
-499    0x0000    //TX_MU_BF_ADPT_NS
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
 500    0x0000    //TX_ADAPT_LEN
-501    0x0000    //TX_MORE_SNS
+501    0x6666    //TX_MORE_SNS
 502    0x0000    //TX_NOR_OFF_TH1
 503    0x0000    //TX_WIDE_MASK_TH
-504    0x0000    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x0000    //TX_C_POST_FLT_CUT
-506    0x0000    //TX_RADIODTLV
-507    0x0000    //TX_POWER_LINEIN_TH
-508    0x0000    //TX_FE_VADCOUNT_TH_FC
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
 509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0000    //TX_ECHO_TH
-511    0x0000    //TX_MIC_TO_BFGAIN
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
 527    0x0000    //TX_DR_RESRV_8
-528    0x0000    //TX_WIND_MARK_TH
-529    0x0000    //TX_CORR_THR
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
-531    0x0000    //TX_ENGY_THR
-532    0x0000    //TX_CORR_HIGH_TH
-533    0x0000    //TX_ENGY_THR_2
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
 534    0x3400    //TX_MEAN_RTO_THR
-535    0x0000    //TX_WNS_ENOISE_MIC0_TH
-536    0x0000    //TX_RATIOMICL_TH
-537    0x0000    //TX_CALIG_HS
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
 538    0x0000    //TX_LVL_CTRL
-539    0x0000    //TX_WIND_SUPRTO
-540    0x0000    //TX_WNS_MIN_G
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
 541    0x0000    //TX_WNS_B_POST_FLT
-542    0x0000    //TX_RATIOMICH_TH
-543    0x0000    //TX_WIND_INBEAM_L_TH
-544    0x0000    //TX_WIND_INBEAM_H_TH
-545    0x0000    //TX_WNS_RESRV_0
-546    0x0000    //TX_WNS_RESRV_1
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
 547    0x0000    //TX_WNS_RESRV_2
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
-566    0x0000    //TX_FDEQ_SUBNUM
-567    0x0000    //TX_FDEQ_GAIN_0
-568    0x0000    //TX_FDEQ_GAIN_1
-569    0x0000    //TX_FDEQ_GAIN_2
-570    0x0000    //TX_FDEQ_GAIN_3
-571    0x0000    //TX_FDEQ_GAIN_4
-572    0x0000    //TX_FDEQ_GAIN_5
-573    0x0000    //TX_FDEQ_GAIN_6
-574    0x0000    //TX_FDEQ_GAIN_7
-575    0x0000    //TX_FDEQ_GAIN_8
-576    0x0000    //TX_FDEQ_GAIN_9
-577    0x0000    //TX_FDEQ_GAIN_10
-578    0x0000    //TX_FDEQ_GAIN_11
-579    0x0000    //TX_FDEQ_GAIN_12
-580    0x0000    //TX_FDEQ_GAIN_13
-581    0x0000    //TX_FDEQ_GAIN_14
-582    0x0000    //TX_FDEQ_GAIN_15
-583    0x0000    //TX_FDEQ_GAIN_16
-584    0x0000    //TX_FDEQ_GAIN_17
-585    0x0000    //TX_FDEQ_GAIN_18
-586    0x0000    //TX_FDEQ_GAIN_19
-587    0x0000    //TX_FDEQ_GAIN_20
-588    0x0000    //TX_FDEQ_GAIN_21
-589    0x0000    //TX_FDEQ_GAIN_22
-590    0x0000    //TX_FDEQ_GAIN_23
-591    0x0000    //TX_FDEQ_BIN_0
-592    0x0000    //TX_FDEQ_BIN_1
-593    0x0000    //TX_FDEQ_BIN_2
-594    0x0000    //TX_FDEQ_BIN_3
-595    0x0000    //TX_FDEQ_BIN_4
-596    0x0000    //TX_FDEQ_BIN_5
-597    0x0000    //TX_FDEQ_BIN_6
-598    0x0000    //TX_FDEQ_BIN_7
-599    0x0000    //TX_FDEQ_BIN_8
-600    0x0000    //TX_FDEQ_BIN_9
-601    0x0000    //TX_FDEQ_BIN_10
-602    0x0000    //TX_FDEQ_BIN_11
-603    0x0000    //TX_FDEQ_BIN_12
-604    0x0000    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
 607    0x0000    //TX_FDEQ_BIN_16
 608    0x0000    //TX_FDEQ_BIN_17
 609    0x0000    //TX_FDEQ_BIN_18
@@ -33929,47 +51354,47 @@
 613    0x0000    //TX_FDEQ_BIN_22
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
-616    0x0000    //TX_PREEQ_SUBNUM_MIC0
-617    0x0000    //TX_PREEQ_GAIN_MIC0_0
-618    0x0000    //TX_PREEQ_GAIN_MIC0_1
-619    0x0000    //TX_PREEQ_GAIN_MIC0_2
-620    0x0000    //TX_PREEQ_GAIN_MIC0_3
-621    0x0000    //TX_PREEQ_GAIN_MIC0_4
-622    0x0000    //TX_PREEQ_GAIN_MIC0_5
-623    0x0000    //TX_PREEQ_GAIN_MIC0_6
-624    0x0000    //TX_PREEQ_GAIN_MIC0_7
-625    0x0000    //TX_PREEQ_GAIN_MIC0_8
-626    0x0000    //TX_PREEQ_GAIN_MIC0_9
-627    0x0000    //TX_PREEQ_GAIN_MIC0_10
-628    0x0000    //TX_PREEQ_GAIN_MIC0_11
-629    0x0000    //TX_PREEQ_GAIN_MIC0_12
-630    0x0000    //TX_PREEQ_GAIN_MIC0_13
-631    0x0000    //TX_PREEQ_GAIN_MIC0_14
-632    0x0000    //TX_PREEQ_GAIN_MIC0_15
-633    0x0000    //TX_PREEQ_GAIN_MIC0_16
-634    0x0000    //TX_PREEQ_GAIN_MIC0_17
-635    0x0000    //TX_PREEQ_GAIN_MIC0_18
-636    0x0000    //TX_PREEQ_GAIN_MIC0_19
-637    0x0000    //TX_PREEQ_GAIN_MIC0_20
-638    0x0000    //TX_PREEQ_GAIN_MIC0_21
-639    0x0000    //TX_PREEQ_GAIN_MIC0_22
-640    0x0000    //TX_PREEQ_GAIN_MIC0_23
-641    0x0000    //TX_PREEQ_BIN_MIC0_0
-642    0x0000    //TX_PREEQ_BIN_MIC0_1
-643    0x0000    //TX_PREEQ_BIN_MIC0_2
-644    0x0000    //TX_PREEQ_BIN_MIC0_3
-645    0x0000    //TX_PREEQ_BIN_MIC0_4
-646    0x0000    //TX_PREEQ_BIN_MIC0_5
-647    0x0000    //TX_PREEQ_BIN_MIC0_6
-648    0x0000    //TX_PREEQ_BIN_MIC0_7
-649    0x0000    //TX_PREEQ_BIN_MIC0_8
-650    0x0000    //TX_PREEQ_BIN_MIC0_9
-651    0x0000    //TX_PREEQ_BIN_MIC0_10
-652    0x0000    //TX_PREEQ_BIN_MIC0_11
-653    0x0000    //TX_PREEQ_BIN_MIC0_12
-654    0x0000    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
 657    0x0000    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
@@ -33978,47 +51403,47 @@
 662    0x0000    //TX_PREEQ_BIN_MIC0_21
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0000    //TX_PREEQ_SUBNUM_MIC1
-666    0x0000    //TX_PREEQ_GAIN_MIC1_0
-667    0x0000    //TX_PREEQ_GAIN_MIC1_1
-668    0x0000    //TX_PREEQ_GAIN_MIC1_2
-669    0x0000    //TX_PREEQ_GAIN_MIC1_3
-670    0x0000    //TX_PREEQ_GAIN_MIC1_4
-671    0x0000    //TX_PREEQ_GAIN_MIC1_5
-672    0x0000    //TX_PREEQ_GAIN_MIC1_6
-673    0x0000    //TX_PREEQ_GAIN_MIC1_7
-674    0x0000    //TX_PREEQ_GAIN_MIC1_8
-675    0x0000    //TX_PREEQ_GAIN_MIC1_9
-676    0x0000    //TX_PREEQ_GAIN_MIC1_10
-677    0x0000    //TX_PREEQ_GAIN_MIC1_11
-678    0x0000    //TX_PREEQ_GAIN_MIC1_12
-679    0x0000    //TX_PREEQ_GAIN_MIC1_13
-680    0x0000    //TX_PREEQ_GAIN_MIC1_14
-681    0x0000    //TX_PREEQ_GAIN_MIC1_15
-682    0x0000    //TX_PREEQ_GAIN_MIC1_16
-683    0x0000    //TX_PREEQ_GAIN_MIC1_17
-684    0x0000    //TX_PREEQ_GAIN_MIC1_18
-685    0x0000    //TX_PREEQ_GAIN_MIC1_19
-686    0x0000    //TX_PREEQ_GAIN_MIC1_20
-687    0x0000    //TX_PREEQ_GAIN_MIC1_21
-688    0x0000    //TX_PREEQ_GAIN_MIC1_22
-689    0x0000    //TX_PREEQ_GAIN_MIC1_23
-690    0x0000    //TX_PREEQ_BIN_MIC1_0
-691    0x0000    //TX_PREEQ_BIN_MIC1_1
-692    0x0000    //TX_PREEQ_BIN_MIC1_2
-693    0x0000    //TX_PREEQ_BIN_MIC1_3
-694    0x0000    //TX_PREEQ_BIN_MIC1_4
-695    0x0000    //TX_PREEQ_BIN_MIC1_5
-696    0x0000    //TX_PREEQ_BIN_MIC1_6
-697    0x0000    //TX_PREEQ_BIN_MIC1_7
-698    0x0000    //TX_PREEQ_BIN_MIC1_8
-699    0x0000    //TX_PREEQ_BIN_MIC1_9
-700    0x0000    //TX_PREEQ_BIN_MIC1_10
-701    0x0000    //TX_PREEQ_BIN_MIC1_11
-702    0x0000    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
@@ -34027,47 +51452,47 @@
 711    0x0000    //TX_PREEQ_BIN_MIC1_21
 712    0x0000    //TX_PREEQ_BIN_MIC1_22
 713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0000    //TX_PREEQ_SUBNUM_MIC2
-715    0x0000    //TX_PREEQ_GAIN_MIC2_0
-716    0x0000    //TX_PREEQ_GAIN_MIC2_1
-717    0x0000    //TX_PREEQ_GAIN_MIC2_2
-718    0x0000    //TX_PREEQ_GAIN_MIC2_3
-719    0x0000    //TX_PREEQ_GAIN_MIC2_4
-720    0x0000    //TX_PREEQ_GAIN_MIC2_5
-721    0x0000    //TX_PREEQ_GAIN_MIC2_6
-722    0x0000    //TX_PREEQ_GAIN_MIC2_7
-723    0x0000    //TX_PREEQ_GAIN_MIC2_8
-724    0x0000    //TX_PREEQ_GAIN_MIC2_9
-725    0x0000    //TX_PREEQ_GAIN_MIC2_10
-726    0x0000    //TX_PREEQ_GAIN_MIC2_11
-727    0x0000    //TX_PREEQ_GAIN_MIC2_12
-728    0x0000    //TX_PREEQ_GAIN_MIC2_13
-729    0x0000    //TX_PREEQ_GAIN_MIC2_14
-730    0x0000    //TX_PREEQ_GAIN_MIC2_15
-731    0x0000    //TX_PREEQ_GAIN_MIC2_16
-732    0x0000    //TX_PREEQ_GAIN_MIC2_17
-733    0x0000    //TX_PREEQ_GAIN_MIC2_18
-734    0x0000    //TX_PREEQ_GAIN_MIC2_19
-735    0x0000    //TX_PREEQ_GAIN_MIC2_20
-736    0x0000    //TX_PREEQ_GAIN_MIC2_21
-737    0x0000    //TX_PREEQ_GAIN_MIC2_22
-738    0x0000    //TX_PREEQ_GAIN_MIC2_23
-739    0x0000    //TX_PREEQ_BIN_MIC2_0
-740    0x0000    //TX_PREEQ_BIN_MIC2_1
-741    0x0000    //TX_PREEQ_BIN_MIC2_2
-742    0x0000    //TX_PREEQ_BIN_MIC2_3
-743    0x0000    //TX_PREEQ_BIN_MIC2_4
-744    0x0000    //TX_PREEQ_BIN_MIC2_5
-745    0x0000    //TX_PREEQ_BIN_MIC2_6
-746    0x0000    //TX_PREEQ_BIN_MIC2_7
-747    0x0000    //TX_PREEQ_BIN_MIC2_8
-748    0x0000    //TX_PREEQ_BIN_MIC2_9
-749    0x0000    //TX_PREEQ_BIN_MIC2_10
-750    0x0000    //TX_PREEQ_BIN_MIC2_11
-751    0x0000    //TX_PREEQ_BIN_MIC2_12
-752    0x0000    //TX_PREEQ_BIN_MIC2_13
-753    0x0000    //TX_PREEQ_BIN_MIC2_14
-754    0x0000    //TX_PREEQ_BIN_MIC2_15
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
 755    0x0000    //TX_PREEQ_BIN_MIC2_16
 756    0x0000    //TX_PREEQ_BIN_MIC2_17
 757    0x0000    //TX_PREEQ_BIN_MIC2_18
@@ -34076,36 +51501,36 @@
 760    0x0000    //TX_PREEQ_BIN_MIC2_21
 761    0x0000    //TX_PREEQ_BIN_MIC2_22
 762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0000    //TX_MASKING_ABILITY
-764    0x0000    //TX_NND_WEIGHT
-765    0x0000    //TX_MIC_CALIBRATION_0
-766    0x0000    //TX_MIC_CALIBRATION_1
-767    0x0000    //TX_MIC_CALIBRATION_2
-768    0x0000    //TX_MIC_CALIBRATION_3
-769    0x0000    //TX_MIC_PWR_BIAS_0
-770    0x0000    //TX_MIC_PWR_BIAS_1
-771    0x0000    //TX_MIC_PWR_BIAS_2
-772    0x0000    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0000    //TX_GAIN_LIMIT_1
-775    0x0000    //TX_GAIN_LIMIT_2
-776    0x0000    //TX_GAIN_LIMIT_3
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
 780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
 781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
 782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0000    //TX_TDDRC_ALPHA_UP_01
-784    0x0000    //TX_TDDRC_ALPHA_UP_02
-785    0x0000    //TX_TDDRC_ALPHA_UP_03
-786    0x0000    //TX_TDDRC_ALPHA_UP_04
-787    0x0000    //TX_TDDRC_ALPHA_DWN_01
-788    0x0000    //TX_TDDRC_ALPHA_DWN_02
-789    0x0000    //TX_TDDRC_ALPHA_DWN_03
-790    0x0000    //TX_TDDRC_ALPHA_DWN_04
-791    0x0000    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0000    //TX_TDDRC_POST_LIMIT_GAIN
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
 793    0x0000    //TX_TDDRC_RESRV_0
 794    0x0000    //TX_TDDRC_RESRV_1
 795    0x0018    //TX_FDDRC_BAND_MARGIN_0
@@ -34142,11 +51567,11 @@
 826    0x0000    //TX_KS_RESRV_0
 827    0x0000    //TX_KS_RESRV_1
 828    0x0000    //TX_KS_RESRV_2
-829    0x0000    //TX_LAMBDA_PKA_FP
-830    0x0000    //TX_TPKA_FP
-831    0x0000    //TX_MIN_G_FP
-832    0x0000    //TX_MAX_G_FP
-833    0x0000    //TX_FFP_FP_K_METAL
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
 834    0x4000    //TX_A_POST_FLT_FP
 835    0x0F5C    //TX_RTO_OUTBEAM_TH
 836    0x4CCD    //TX_TPKA_FP_THD
@@ -34166,130 +51591,195 @@
 850    0x0000    //TX_FFP_RESRV_4
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x0000    //TX_TDDRC_THRD_2
-857    0x0000    //TX_TDDRC_THRD_3
-858    0x0000    //TX_TDDRC_SLANT_0
-859    0x0000    //TX_TDDRC_SLANT_1
-860    0x0000    //TX_TDDRC_ALPHA_UP_00
-861    0x0000    //TX_TDDRC_ALPHA_DWN_00
+853    0x0002    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0001    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0000    //TX_TDDRC_DRC_GAIN
-867    0x0000    //TX_TDDRC_LMT_THRD
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
 870    0x0000    //TX_TFMASKLTHL
-871    0x0000    //TX_TFMASKHTH
-872    0x0000    //TX_TFMASKLTH_BINVAD
-873    0x0000    //TX_TFMASKLTH_NS_EST
-874    0x0000    //TX_TFMASKLTH_DOA
-875    0x0000    //TX_TFMASKTH_BLESSCUT
-876    0x0000    //TX_B_LESSCUT_RTO_MASK
-877    0x0000    //TX_SB_RHO_MEAN_TH_ABN
-878    0x0000    //TX_B_POST_FLT_MASK
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
 879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x0000    //TX_GAIN_WIND_MASK
-881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
 882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
 883    0x7333    //TX_FASTNS_OUTIN_TH
 884    0x0CCD    //TX_FASTNS_TFMASK_TH
 885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
 886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0000    //TX_FASTNS_ARSPC_TH
-889    0x0000    //TX_FASTNS_MASK5_TH
-890    0x0000    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x0000    //TX_A_LESSCUT_RTO_MASK
-892    0x0000    //TX_FASTNS_NOISETH
-893    0x0000    //TX_FASTNS_SSA_THLFL
-894    0x0000    //TX_FASTNS_SSA_THHFL
-895    0x0000    //TX_FASTNS_SSA_THLFH
-896    0x0000    //TX_FASTNS_SSA_THHFH
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0000    //RX_RECVFUNC_MODE_0
+0    0x202C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0004    //RX_SAMPLINGFREQ_SIG
 3    0x0004    //RX_SAMPLINGFREQ_PROC
 4    0x000A    //RX_FRAME_SZ
 5    0x0000    //RX_DELAY_OPT
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-10    0x0000    //RX_PGA
-11    0x0000    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x0000    //RX_THR_PITCH_DET_0
-14    0x0000    //RX_THR_PITCH_DET_1
-15    0x0000    //RX_THR_PITCH_DET_2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7B02    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
 16    0x0008    //RX_PITCH_BFR_LEN
 17    0x0003    //RX_SBD_PITCH_DET
 18    0x0100    //RX_PP_RESRV_0
 19    0x0020    //RX_PP_RESRV_1
-20    0x0000    //RX_N_SN_EST
+20    0x0500    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0000    //RX_NS_LVL_CTRL
-23    0x0000    //RX_THR_SN_EST
-24    0x0000    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+22    0x000A    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7000    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 30    0x0002    //RX_EXTRA_NS_L
 31    0x0800    //RX_EXTRA_NS_A
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 35    0x199A    //RX_A_POST_FLT
 36    0x0000    //RX_LMT_THRD
-37    0x0000    //RX_LMT_ALPHA
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -34300,47 +51790,47 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
+111    0x0002    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-125    0x0000    //RX_LAMBDA_PKA_FP
-126    0x0000    //RX_TPKA_FP
-127    0x0000    //RX_MIN_G_FP
-128    0x0000    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -34369,70 +51859,70 @@
 155    0x0000    //RX_BWE_RESRV_1
 156    0x0000    //RX_BWE_RESRV_2
 #VOL    0
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -34443,95 +51933,95 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -34542,95 +52032,95 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0013    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -34641,95 +52131,95 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0020    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -34740,95 +52230,95 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0036    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -34839,95 +52329,95 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x005B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -34938,95 +52428,95 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0099    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
-6    0x0000    //RX_TDDRC_ALPHA_UP_1
-7    0x0000    //RX_TDDRC_ALPHA_UP_2
-8    0x0000    //RX_TDDRC_ALPHA_UP_3
-9    0x0000    //RX_TDDRC_ALPHA_UP_4
-27    0x0000    //RX_TDDRC_ALPHA_DWN_1
-28    0x0000    //RX_TDDRC_ALPHA_DWN_2
-29    0x0000    //RX_TDDRC_ALPHA_DWN_3
-32    0x0000    //RX_TDDRC_ALPHA_DWN_4
-33    0x0000    //RX_TDDRC_LIMITER_THRD
-34    0x0000    //RX_TDDRC_LIMITER_GAIN
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x0000    //RX_TDDRC_THRD_2
-115    0x0000    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x0000    //RX_TDDRC_SLANT_1
-118    0x0000    //RX_TDDRC_ALPHA_UP_0
-119    0x0000    //RX_TDDRC_ALPHA_DWN_0
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0000    //RX_TDDRC_DRC_GAIN
-38    0x0000    //RX_FDEQ_SUBNUM
-39    0x0000    //RX_FDEQ_GAIN_0
-40    0x0000    //RX_FDEQ_GAIN_1
-41    0x0000    //RX_FDEQ_GAIN_2
-42    0x0000    //RX_FDEQ_GAIN_3
-43    0x0000    //RX_FDEQ_GAIN_4
-44    0x0000    //RX_FDEQ_GAIN_5
-45    0x0000    //RX_FDEQ_GAIN_6
-46    0x0000    //RX_FDEQ_GAIN_7
-47    0x0000    //RX_FDEQ_GAIN_8
-48    0x0000    //RX_FDEQ_GAIN_9
-49    0x0000    //RX_FDEQ_GAIN_10
-50    0x0000    //RX_FDEQ_GAIN_11
-51    0x0000    //RX_FDEQ_GAIN_12
-52    0x0000    //RX_FDEQ_GAIN_13
-53    0x0000    //RX_FDEQ_GAIN_14
-54    0x0000    //RX_FDEQ_GAIN_15
-55    0x0000    //RX_FDEQ_GAIN_16
-56    0x0000    //RX_FDEQ_GAIN_17
-57    0x0000    //RX_FDEQ_GAIN_18
-58    0x0000    //RX_FDEQ_GAIN_19
-59    0x0000    //RX_FDEQ_GAIN_20
-60    0x0000    //RX_FDEQ_GAIN_21
-61    0x0000    //RX_FDEQ_GAIN_22
-62    0x0000    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -35037,34 +52527,886 @@
 86    0x0000    //RX_FDEQ_BIN_23
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0000    //RX_FDDRC_BAND_MARGIN_0
-90    0x0000    //RX_FDDRC_BAND_MARGIN_1
-91    0x0000    //RX_FDDRC_BAND_MARGIN_2
-92    0x0000    //RX_FDDRC_BAND_MARGIN_3
-93    0x0000    //RX_FDDRC_BLOCK_EXP
-94    0x0000    //RX_FDDRC_THRD_2_0
-95    0x0000    //RX_FDDRC_THRD_2_1
-96    0x0000    //RX_FDDRC_THRD_2_2
-97    0x0000    //RX_FDDRC_THRD_2_3
-98    0x0000    //RX_FDDRC_THRD_3_0
-99    0x0000    //RX_FDDRC_THRD_3_1
-100    0x0000    //RX_FDDRC_THRD_3_2
-101    0x0000    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x0000    //RX_FDDRC_SLANT_1_0
-107    0x0000    //RX_FDDRC_SLANT_1_1
-108    0x0000    //RX_FDDRC_SLANT_1_2
-109    0x0000    //RX_FDDRC_SLANT_1_3
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x202C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7B02    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0500    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000A    //RX_NS_LVL_CTRL
+180    0xF600    //RX_THR_SN_EST
+181    0x7000    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_HCO-VOICE_GENERIC-NB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -35093,7 +53435,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x01B1    //TX_PGA_0
+27    0x0302    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -35185,10 +53527,10 @@
 116    0x7FFF    //TX_BRMIC_BLKFACTOR
 117    0x000A    //TX_MICBLK_START_BIN
 118    0x0041    //TX_MICBLK_END_BIN
-119    0x0000    //TX_MICBLK_FE_HOLD
+119    0x0015    //TX_MICBLK_FE_HOLD
 120    0xFFF2    //TX_MICBLK_MR_EXP_TH
 121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
+122    0x0015    //TX_FENE_HOLD
 123    0x0000    //TX_FE_ENER_TH_MTS
 124    0x0000    //TX_FE_ENER_TH_EXP
 125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
@@ -35255,7 +53597,7 @@
 186    0x0000    //TX_MU0_PTD_FRQ_AEC
 187    0x0000    //TX_MINENOISETH
 188    0x0000    //TX_MU0_RE_EST
-189    0x0000    //TX_AEC_NUM_CH
+189    0x0001    //TX_AEC_NUM_CH
 190    0x0000    //TX_BIGECHOATTENUATION_MAX
 191    0x0000    //TX_A_POST_FLT_MICBLK
 192    0x0000    //TX_BLKENERTH
@@ -35308,7 +53650,7 @@
 239    0x0000    //TX_DT_RESRV_7
 240    0x0000    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xF200    //TX_THR_SN_EST_0
+242    0xFA00    //TX_THR_SN_EST_0
 243    0xF400    //TX_THR_SN_EST_1
 244    0xF800    //TX_THR_SN_EST_2
 245    0xF600    //TX_THR_SN_EST_3
@@ -35317,12 +53659,12 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0100    //TX_DELTA_THR_SN_EST_1
 252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -35348,12 +53690,12 @@
 279    0x0000    //TX_B_POST_FLT_0
 280    0x0000    //TX_B_POST_FLT_1
 281    0x001A    //TX_NS_LVL_CTRL_0
-282    0x001A    //TX_NS_LVL_CTRL_1
+282    0x0014    //TX_NS_LVL_CTRL_1
 283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0014    //TX_NS_LVL_CTRL_3
+284    0x000C    //TX_NS_LVL_CTRL_3
 285    0x000C    //TX_NS_LVL_CTRL_4
 286    0x000C    //TX_NS_LVL_CTRL_5
-287    0x000C    //TX_NS_LVL_CTRL_6
+287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x000C    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
 290    0x0014    //TX_MIN_GAIN_S_1
@@ -35369,10 +53711,10 @@
 300    0x7FFF    //TX_SNRI_SUP_0
 301    0x7FFF    //TX_SNRI_SUP_1
 302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
+303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x7FFF    //TX_SNRI_SUP_6
 307    0x4000    //TX_SNRI_SUP_7
 308    0x1200    //TX_THR_LFNS
 309    0x0147    //TX_G_LFNS
@@ -35381,12 +53723,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x7FFF    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x199A    //TX_A_POST_FILT_S_1
+315    0x1000    //TX_A_POST_FILT_S_1
 316    0x1000    //TX_A_POST_FILT_S_2
-317    0x1000    //TX_A_POST_FILT_S_3
+317    0x6666    //TX_A_POST_FILT_S_3
 318    0x6666    //TX_A_POST_FILT_S_4
 319    0x6666    //TX_A_POST_FILT_S_5
-320    0x6666    //TX_A_POST_FILT_S_6
+320    0x199A    //TX_A_POST_FILT_S_6
 321    0x6666    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
 323    0x2000    //TX_B_POST_FILT_1
@@ -35433,7 +53775,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x05A0    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
+367    0x003B    //TX_NOISE_TH_0
 368    0x1388    //TX_NOISE_TH_0_2
 369    0x3A98    //TX_NOISE_TH_0_3
 370    0x0C80    //TX_NOISE_TH_1
@@ -35445,11 +53787,11 @@
 376    0x7FFF    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x00C8    //TX_NOISE_TH_6
-379    0x000A    //TX_MINENOISE_TH
-380    0x0000    //TX_MINENOISE_MIC0_TH_MTS
-381    0x0000    //TX_MINENOISE_MIC0_TH_EXP
-382    0x0000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0x0000    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x00C8    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
 385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x6400    //TX_OUT_ENER_S_TH_NOISY
@@ -35457,22 +53799,22 @@
 388    0x7D00    //TX_OUT_ENER_TH_SPEECH
 389    0x0000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0000    //TX_MU_ARSP_EST
-396    0x0000    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0000    //TX_EXTRA_NS_L
-398    0x0000    //TX_EXTRA_NS_A
-399    0x0000    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0000    //TX_MIN_G_LOW300HZ
 401    0x0010    //TX_MAXLEVEL_CNG
 402    0x0000    //TX_STN_NOISE_TH
 403    0x0000    //TX_POST_MASK_SUP
 404    0x0000    //TX_POST_MASK_ADJUST
 405    0x0014    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x0032    //TX_MINENOISE_MIC0_TH
 407    0x0226    //TX_MINENOISE_MIC0_S_TH
 408    0x2879    //TX_MIN_G_CTRL_SSNS
 409    0x0400    //TX_METAL_RTO_THR
@@ -35580,16 +53922,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x6666    //TX_MICTOBFGAIN0
 513    0x0014    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -35618,19 +53960,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0000    //TX_BF_LESSCUT_BBIN
-554    0x0000    //TX_BF_LESSCUT_EBIN
-555    0x0000    //TX_POSTBFB0
-556    0x0000    //TX_POSTBFB
-557    0x0000    //TX_POSTBFE
-558    0x0000    //TX_SPEECH_SNR_TH
-559    0x0000    //TX_PB_MAX_PRI_SNR_TH
-560    0x0000    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -35955,16 +54297,81 @@
 886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
 888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xD99A    //TX_FASTNS_MASK5_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x027C    //RX_RECVFUNC_MODE_0
+0    0x247C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -35989,7 +54396,7 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x4000    //RX_TDDRC_ALPHA_DWN_2
@@ -36003,16 +54410,16 @@
 36    0x0000    //RX_LMT_THRD
 37    0x4000    //RX_LMT_ALPHA
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8060    //RX_FDEQ_GAIN_1
-41    0x6060    //RX_FDEQ_GAIN_2
-42    0x6070    //RX_FDEQ_GAIN_3
-43    0x6858    //RX_FDEQ_GAIN_4
-44    0x5858    //RX_FDEQ_GAIN_5
-45    0x5848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x485A    //RX_FDEQ_GAIN_8
-48    0x5A58    //RX_FDEQ_GAIN_9
+39    0x5252    //RX_FDEQ_GAIN_0
+40    0x4E4F    //RX_FDEQ_GAIN_1
+41    0x4743    //RX_FDEQ_GAIN_2
+42    0x454C    //RX_FDEQ_GAIN_3
+43    0x4C49    //RX_FDEQ_GAIN_4
+44    0x584A    //RX_FDEQ_GAIN_5
+45    0x4642    //RX_FDEQ_GAIN_6
+46    0x4043    //RX_FDEQ_GAIN_7
+47    0x454A    //RX_FDEQ_GAIN_8
+48    0x4C53    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -36031,8 +54438,8 @@
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0303    //RX_FDEQ_BIN_2
 66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
+67    0x0503    //RX_FDEQ_BIN_4
+68    0x0107    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
@@ -36075,7 +54482,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0005    //RX_FILTINDX
+111    0x0004    //RX_FILTINDX
 112    0x0002    //RX_TDDRC_THRD_0
 113    0x0004    //RX_TDDRC_THRD_1
 114    0x1A00    //RX_TDDRC_THRD_2
@@ -36088,12 +54495,12 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0700    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0017    //RX_SPK_VOL
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0B50    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -36122,40 +54529,40 @@
 155    0x0000    //RX_BWE_RESRV_1
 156    0x0000    //RX_BWE_RESRV_2
 #VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0700    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8060    //RX_FDEQ_GAIN_1
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x805A    //RX_FDEQ_GAIN_1
 41    0x6060    //RX_FDEQ_GAIN_2
-42    0x6070    //RX_FDEQ_GAIN_3
-43    0x6858    //RX_FDEQ_GAIN_4
-44    0x5858    //RX_FDEQ_GAIN_5
-45    0x5848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x485A    //RX_FDEQ_GAIN_8
-48    0x5A58    //RX_FDEQ_GAIN_9
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8681    //RX_FDEQ_GAIN_4
+44    0x776D    //RX_FDEQ_GAIN_5
+45    0x5E55    //RX_FDEQ_GAIN_6
+46    0x544B    //RX_FDEQ_GAIN_7
+47    0x4B4D    //RX_FDEQ_GAIN_8
+48    0x5254    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -36170,16 +54577,16 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x1407    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -36218,43 +54625,43 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0017    //RX_SPK_VOL
+129    0x003D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0700    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8060    //RX_FDEQ_GAIN_1
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x805A    //RX_FDEQ_GAIN_1
 41    0x6060    //RX_FDEQ_GAIN_2
-42    0x6070    //RX_FDEQ_GAIN_3
-43    0x6858    //RX_FDEQ_GAIN_4
-44    0x5858    //RX_FDEQ_GAIN_5
-45    0x5848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x485A    //RX_FDEQ_GAIN_8
-48    0x5A58    //RX_FDEQ_GAIN_9
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8681    //RX_FDEQ_GAIN_4
+44    0x776D    //RX_FDEQ_GAIN_5
+45    0x5E55    //RX_FDEQ_GAIN_6
+46    0x544B    //RX_FDEQ_GAIN_7
+47    0x4B4D    //RX_FDEQ_GAIN_8
+48    0x5254    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -36269,16 +54676,16 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x1407    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -36317,43 +54724,43 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0023    //RX_SPK_VOL
+129    0x005C    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0700    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8060    //RX_FDEQ_GAIN_1
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x805A    //RX_FDEQ_GAIN_1
 41    0x6060    //RX_FDEQ_GAIN_2
-42    0x6070    //RX_FDEQ_GAIN_3
-43    0x6858    //RX_FDEQ_GAIN_4
-44    0x5858    //RX_FDEQ_GAIN_5
-45    0x5848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x485A    //RX_FDEQ_GAIN_8
-48    0x5A58    //RX_FDEQ_GAIN_9
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8681    //RX_FDEQ_GAIN_4
+44    0x776D    //RX_FDEQ_GAIN_5
+45    0x5E55    //RX_FDEQ_GAIN_6
+46    0x544B    //RX_FDEQ_GAIN_7
+47    0x4B4D    //RX_FDEQ_GAIN_8
+48    0x5254    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -36368,16 +54775,16 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x1407    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -36416,43 +54823,43 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0034    //RX_SPK_VOL
+129    0x0087    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0700    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8060    //RX_FDEQ_GAIN_1
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x805A    //RX_FDEQ_GAIN_1
 41    0x6060    //RX_FDEQ_GAIN_2
-42    0x6070    //RX_FDEQ_GAIN_3
-43    0x6858    //RX_FDEQ_GAIN_4
-44    0x5858    //RX_FDEQ_GAIN_5
-45    0x5848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x485A    //RX_FDEQ_GAIN_8
-48    0x5A58    //RX_FDEQ_GAIN_9
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8681    //RX_FDEQ_GAIN_4
+44    0x776D    //RX_FDEQ_GAIN_5
+45    0x5E55    //RX_FDEQ_GAIN_6
+46    0x544B    //RX_FDEQ_GAIN_7
+47    0x4B4D    //RX_FDEQ_GAIN_8
+48    0x5254    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -36467,16 +54874,16 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x1407    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -36515,43 +54922,43 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x004D    //RX_SPK_VOL
+129    0x00CE    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
+112    0x0000    //RX_TDDRC_THRD_0
 113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0700    //RX_TDDRC_DRC_GAIN
+124    0x013B    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8060    //RX_FDEQ_GAIN_1
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x805A    //RX_FDEQ_GAIN_1
 41    0x6060    //RX_FDEQ_GAIN_2
-42    0x6070    //RX_FDEQ_GAIN_3
-43    0x6858    //RX_FDEQ_GAIN_4
-44    0x5858    //RX_FDEQ_GAIN_5
-45    0x5848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x485A    //RX_FDEQ_GAIN_8
-48    0x5A58    //RX_FDEQ_GAIN_9
+42    0x707C    //RX_FDEQ_GAIN_3
+43    0x8681    //RX_FDEQ_GAIN_4
+44    0x776D    //RX_FDEQ_GAIN_5
+45    0x5E55    //RX_FDEQ_GAIN_6
+46    0x5448    //RX_FDEQ_GAIN_7
+47    0x484D    //RX_FDEQ_GAIN_8
+48    0x5254    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -36566,214 +54973,16 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x0060    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x0600    //RX_FDDRC_THRD_2_0
-95    0x0600    //RX_FDDRC_THRD_2_1
-96    0x0600    //RX_FDDRC_THRD_2_2
-97    0x0600    //RX_FDDRC_THRD_2_3
-98    0x0800    //RX_FDDRC_THRD_3_0
-99    0x0800    //RX_FDDRC_THRD_3_1
-100    0x0800    //RX_FDDRC_THRD_3_2
-101    0x0800    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0073    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0700    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8060    //RX_FDEQ_GAIN_1
-41    0x6060    //RX_FDEQ_GAIN_2
-42    0x6070    //RX_FDEQ_GAIN_3
-43    0x6858    //RX_FDEQ_GAIN_4
-44    0x5858    //RX_FDEQ_GAIN_5
-45    0x5848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x485A    //RX_FDEQ_GAIN_8
-48    0x5A58    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x0060    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x0600    //RX_FDDRC_THRD_2_0
-95    0x0600    //RX_FDDRC_THRD_2_1
-96    0x0600    //RX_FDDRC_THRD_2_2
-97    0x0600    //RX_FDDRC_THRD_2_3
-98    0x0800    //RX_FDDRC_THRD_3_0
-99    0x0800    //RX_FDDRC_THRD_3_1
-100    0x0800    //RX_FDDRC_THRD_3_2
-101    0x0800    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x00AC    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0700    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8060    //RX_FDEQ_GAIN_1
-41    0x6060    //RX_FDEQ_GAIN_2
-42    0x6070    //RX_FDEQ_GAIN_3
-43    0x6858    //RX_FDEQ_GAIN_4
-44    0x5858    //RX_FDEQ_GAIN_5
-45    0x5848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x485A    //RX_FDEQ_GAIN_8
-48    0x5A58    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x1407    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -36814,10 +55023,1060 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x020B    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x845A    //RX_FDEQ_GAIN_1
+41    0x6060    //RX_FDEQ_GAIN_2
+42    0x6E7E    //RX_FDEQ_GAIN_3
+43    0x8486    //RX_FDEQ_GAIN_4
+44    0x816D    //RX_FDEQ_GAIN_5
+45    0x5E55    //RX_FDEQ_GAIN_6
+46    0x5448    //RX_FDEQ_GAIN_7
+47    0x484D    //RX_FDEQ_GAIN_8
+48    0x5254    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x1407    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x845A    //RX_FDEQ_GAIN_1
+41    0x6060    //RX_FDEQ_GAIN_2
+42    0x677E    //RX_FDEQ_GAIN_3
+43    0x888B    //RX_FDEQ_GAIN_4
+44    0x8B82    //RX_FDEQ_GAIN_5
+45    0x6450    //RX_FDEQ_GAIN_6
+46    0x4B41    //RX_FDEQ_GAIN_7
+47    0x3F41    //RX_FDEQ_GAIN_8
+48    0x4546    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x1407    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x027C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0005    //RX_FILTINDX
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0015    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001E    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x002A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x003C    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0058    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0082    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_HCO-VOICE_GENERIC-WB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -36846,7 +56105,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x01B1    //TX_PGA_0
+27    0x0302    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -36938,10 +56197,10 @@
 116    0x7FFF    //TX_BRMIC_BLKFACTOR
 117    0x000A    //TX_MICBLK_START_BIN
 118    0x0041    //TX_MICBLK_END_BIN
-119    0x0000    //TX_MICBLK_FE_HOLD
+119    0x0015    //TX_MICBLK_FE_HOLD
 120    0xFFF2    //TX_MICBLK_MR_EXP_TH
 121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
+122    0x0015    //TX_FENE_HOLD
 123    0x0000    //TX_FE_ENER_TH_MTS
 124    0x0000    //TX_FE_ENER_TH_EXP
 125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
@@ -37008,7 +56267,7 @@
 186    0x0000    //TX_MU0_PTD_FRQ_AEC
 187    0x0000    //TX_MINENOISETH
 188    0x0000    //TX_MU0_RE_EST
-189    0x0000    //TX_AEC_NUM_CH
+189    0x0001    //TX_AEC_NUM_CH
 190    0x0000    //TX_BIGECHOATTENUATION_MAX
 191    0x0000    //TX_A_POST_FLT_MICBLK
 192    0x0000    //TX_BLKENERTH
@@ -37061,7 +56320,7 @@
 239    0x0000    //TX_DT_RESRV_7
 240    0x0000    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xF200    //TX_THR_SN_EST_0
+242    0xFA00    //TX_THR_SN_EST_0
 243    0xF400    //TX_THR_SN_EST_1
 244    0xF800    //TX_THR_SN_EST_2
 245    0xF600    //TX_THR_SN_EST_3
@@ -37070,12 +56329,12 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0100    //TX_DELTA_THR_SN_EST_1
 252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -37101,12 +56360,12 @@
 279    0x0000    //TX_B_POST_FLT_0
 280    0x0000    //TX_B_POST_FLT_1
 281    0x001A    //TX_NS_LVL_CTRL_0
-282    0x001A    //TX_NS_LVL_CTRL_1
+282    0x0014    //TX_NS_LVL_CTRL_1
 283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0014    //TX_NS_LVL_CTRL_3
+284    0x000C    //TX_NS_LVL_CTRL_3
 285    0x000C    //TX_NS_LVL_CTRL_4
 286    0x000C    //TX_NS_LVL_CTRL_5
-287    0x000C    //TX_NS_LVL_CTRL_6
+287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x000C    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
 290    0x0014    //TX_MIN_GAIN_S_1
@@ -37122,10 +56381,10 @@
 300    0x7FFF    //TX_SNRI_SUP_0
 301    0x7FFF    //TX_SNRI_SUP_1
 302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
+303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x7FFF    //TX_SNRI_SUP_6
 307    0x4000    //TX_SNRI_SUP_7
 308    0x1200    //TX_THR_LFNS
 309    0x0147    //TX_G_LFNS
@@ -37134,12 +56393,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x7FFF    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x199A    //TX_A_POST_FILT_S_1
+315    0x1000    //TX_A_POST_FILT_S_1
 316    0x1000    //TX_A_POST_FILT_S_2
-317    0x1000    //TX_A_POST_FILT_S_3
+317    0x6666    //TX_A_POST_FILT_S_3
 318    0x6666    //TX_A_POST_FILT_S_4
 319    0x6666    //TX_A_POST_FILT_S_5
-320    0x6666    //TX_A_POST_FILT_S_6
+320    0x199A    //TX_A_POST_FILT_S_6
 321    0x6666    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
 323    0x2000    //TX_B_POST_FILT_1
@@ -37186,7 +56445,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x05A0    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
+367    0x0102    //TX_NOISE_TH_0
 368    0x1388    //TX_NOISE_TH_0_2
 369    0x3A98    //TX_NOISE_TH_0_3
 370    0x0C80    //TX_NOISE_TH_1
@@ -37198,11 +56457,11 @@
 376    0x7FFF    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x00C8    //TX_NOISE_TH_6
-379    0x000A    //TX_MINENOISE_TH
-380    0x0000    //TX_MINENOISE_MIC0_TH_MTS
-381    0x0000    //TX_MINENOISE_MIC0_TH_EXP
-382    0x0000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0x0000    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x00F8    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
 385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x6400    //TX_OUT_ENER_S_TH_NOISY
@@ -37210,22 +56469,22 @@
 388    0x7D00    //TX_OUT_ENER_TH_SPEECH
 389    0x0000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0000    //TX_MU_ARSP_EST
-396    0x0000    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0000    //TX_EXTRA_NS_L
-398    0x0000    //TX_EXTRA_NS_A
-399    0x0000    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0000    //TX_MIN_G_LOW300HZ
 401    0x0010    //TX_MAXLEVEL_CNG
 402    0x0000    //TX_STN_NOISE_TH
 403    0x0000    //TX_POST_MASK_SUP
 404    0x0000    //TX_POST_MASK_ADJUST
 405    0x0014    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x00DC    //TX_MINENOISE_MIC0_TH
 407    0x0226    //TX_MINENOISE_MIC0_S_TH
 408    0x2879    //TX_MIN_G_CTRL_SSNS
 409    0x0400    //TX_METAL_RTO_THR
@@ -37333,16 +56592,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x6666    //TX_MICTOBFGAIN0
 513    0x0014    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -37371,19 +56630,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0000    //TX_BF_LESSCUT_BBIN
-554    0x0000    //TX_BF_LESSCUT_EBIN
-555    0x0000    //TX_POSTBFB0
-556    0x0000    //TX_POSTBFB
-557    0x0000    //TX_POSTBFE
-558    0x0000    //TX_SPEECH_SNR_TH
-559    0x0000    //TX_PB_MAX_PRI_SNR_TH
-560    0x0000    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -37708,23 +56967,88 @@
 886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
 888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xD99A    //TX_FASTNS_MASK5_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x027C    //RX_RECVFUNC_MODE_0
+0    0x247C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
 4    0x000A    //RX_FRAME_SZ
 5    0x0000    //RX_DELAY_OPT
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 10    0x0800    //RX_PGA
@@ -37742,34 +57066,34 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 30    0x0002    //RX_EXTRA_NS_L
 31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 35    0x199A    //RX_A_POST_FLT
 36    0x0000    //RX_LMT_THRD
 37    0x4000    //RX_LMT_ALPHA
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6858    //RX_FDEQ_GAIN_1
-41    0x5858    //RX_FDEQ_GAIN_2
-42    0x5858    //RX_FDEQ_GAIN_3
-43    0x5C5C    //RX_FDEQ_GAIN_4
-44    0x7A54    //RX_FDEQ_GAIN_5
-45    0x5448    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x8070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x8080    //RX_FDEQ_GAIN_13
+39    0x847A    //RX_FDEQ_GAIN_0
+40    0x6C66    //RX_FDEQ_GAIN_1
+41    0x6868    //RX_FDEQ_GAIN_2
+42    0x7084    //RX_FDEQ_GAIN_3
+43    0x7E82    //RX_FDEQ_GAIN_4
+44    0x7874    //RX_FDEQ_GAIN_5
+45    0x5864    //RX_FDEQ_GAIN_6
+46    0x625C    //RX_FDEQ_GAIN_7
+47    0x5C50    //RX_FDEQ_GAIN_8
+48    0x545A    //RX_FDEQ_GAIN_9
+49    0x5C58    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -37780,20 +57104,20 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0202    //RX_FDEQ_BIN_3
+67    0x0704    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -37829,11 +57153,11 @@
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
 111    0x0002    //RX_FILTINDX
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x0CE0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -37841,12 +57165,12 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
+124    0x03FC    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0017    //RX_SPK_VOL
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0B50    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -37876,20 +57200,20 @@
 156    0x0000    //RX_BWE_RESRV_2
 #VOL    0
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -37897,22 +57221,22 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6858    //RX_FDEQ_GAIN_1
-41    0x5858    //RX_FDEQ_GAIN_2
-42    0x5858    //RX_FDEQ_GAIN_3
-43    0x5C5C    //RX_FDEQ_GAIN_4
-44    0x7A54    //RX_FDEQ_GAIN_5
-45    0x5448    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x8070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x8080    //RX_FDEQ_GAIN_13
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -37923,20 +57247,20 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -37971,24 +57295,24 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0017    //RX_SPK_VOL
+129    0x0039    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -37996,22 +57320,22 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6858    //RX_FDEQ_GAIN_1
-41    0x5858    //RX_FDEQ_GAIN_2
-42    0x5858    //RX_FDEQ_GAIN_3
-43    0x5C5C    //RX_FDEQ_GAIN_4
-44    0x7A54    //RX_FDEQ_GAIN_5
-45    0x5448    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x8070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x8080    //RX_FDEQ_GAIN_13
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -38022,20 +57346,20 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -38070,24 +57394,24 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0023    //RX_SPK_VOL
+129    0x0055    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -38095,22 +57419,22 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6858    //RX_FDEQ_GAIN_1
-41    0x5858    //RX_FDEQ_GAIN_2
-42    0x5858    //RX_FDEQ_GAIN_3
-43    0x5C5C    //RX_FDEQ_GAIN_4
-44    0x7A54    //RX_FDEQ_GAIN_5
-45    0x5448    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x8070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x8080    //RX_FDEQ_GAIN_13
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -38121,20 +57445,20 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -38169,24 +57493,24 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0034    //RX_SPK_VOL
+129    0x0082    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -38194,22 +57518,22 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6858    //RX_FDEQ_GAIN_1
-41    0x5858    //RX_FDEQ_GAIN_2
-42    0x5858    //RX_FDEQ_GAIN_3
-43    0x5C5C    //RX_FDEQ_GAIN_4
-44    0x7A54    //RX_FDEQ_GAIN_5
-45    0x5448    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x8070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x8080    //RX_FDEQ_GAIN_13
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -38220,20 +57544,20 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -38268,24 +57592,24 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x004D    //RX_SPK_VOL
+129    0x00C0    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
+112    0x0000    //RX_TDDRC_THRD_0
 113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -38293,22 +57617,22 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
+124    0x012F    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6858    //RX_FDEQ_GAIN_1
-41    0x5858    //RX_FDEQ_GAIN_2
-42    0x5858    //RX_FDEQ_GAIN_3
-43    0x5C5C    //RX_FDEQ_GAIN_4
-44    0x7A54    //RX_FDEQ_GAIN_5
-45    0x5448    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x8070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x8080    //RX_FDEQ_GAIN_13
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -38319,218 +57643,20 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0073    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6858    //RX_FDEQ_GAIN_1
-41    0x5858    //RX_FDEQ_GAIN_2
-42    0x5858    //RX_FDEQ_GAIN_3
-43    0x5C5C    //RX_FDEQ_GAIN_4
-44    0x7A54    //RX_FDEQ_GAIN_5
-45    0x5448    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x8070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x8080    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x00AC    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6858    //RX_FDEQ_GAIN_1
-41    0x5858    //RX_FDEQ_GAIN_2
-42    0x5858    //RX_FDEQ_GAIN_3
-43    0x5C5C    //RX_FDEQ_GAIN_4
-44    0x7A54    //RX_FDEQ_GAIN_5
-45    0x5448    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x8070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x8080    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -38567,10 +57693,1060 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01FF    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x8464    //RX_FDEQ_GAIN_0
+40    0x5454    //RX_FDEQ_GAIN_1
+41    0x5A5D    //RX_FDEQ_GAIN_2
+42    0x7078    //RX_FDEQ_GAIN_3
+43    0x8078    //RX_FDEQ_GAIN_4
+44    0x7272    //RX_FDEQ_GAIN_5
+45    0x6761    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03FC    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x8464    //RX_FDEQ_GAIN_0
+40    0x4F4F    //RX_FDEQ_GAIN_1
+41    0x5457    //RX_FDEQ_GAIN_2
+42    0x5C66    //RX_FDEQ_GAIN_3
+43    0x7982    //RX_FDEQ_GAIN_4
+44    0x827D    //RX_FDEQ_GAIN_5
+45    0x6A52    //RX_FDEQ_GAIN_6
+46    0x5352    //RX_FDEQ_GAIN_7
+47    0x585F    //RX_FDEQ_GAIN_8
+48    0x5E55    //RX_FDEQ_GAIN_9
+49    0x5353    //RX_FDEQ_GAIN_10
+50    0x5358    //RX_FDEQ_GAIN_11
+51    0x645B    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0A0A    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x027C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7B02    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0011    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0011    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0019    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0024    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0033    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x8854    //RX_FDEQ_GAIN_5
+202    0x5448    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x7070    //RX_FDEQ_GAIN_10
+207    0x8070    //RX_FDEQ_GAIN_11
+208    0x6060    //RX_FDEQ_GAIN_12
+209    0x7070    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0049    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x8854    //RX_FDEQ_GAIN_5
+202    0x5448    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x7070    //RX_FDEQ_GAIN_10
+207    0x8070    //RX_FDEQ_GAIN_11
+208    0x6060    //RX_FDEQ_GAIN_12
+209    0x7070    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0074    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6864    //RX_FDEQ_GAIN_1
+198    0x7070    //RX_FDEQ_GAIN_2
+199    0x6058    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x8854    //RX_FDEQ_GAIN_5
+202    0x5448    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x7070    //RX_FDEQ_GAIN_10
+207    0x8070    //RX_FDEQ_GAIN_11
+208    0x6060    //RX_FDEQ_GAIN_12
+209    0x7070    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_HCO-VOICE_GENERIC-SWB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -38599,7 +58775,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x01B1    //TX_PGA_0
+27    0x0302    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -38691,10 +58867,10 @@
 116    0x7FFF    //TX_BRMIC_BLKFACTOR
 117    0x000A    //TX_MICBLK_START_BIN
 118    0x0041    //TX_MICBLK_END_BIN
-119    0x0000    //TX_MICBLK_FE_HOLD
+119    0x0015    //TX_MICBLK_FE_HOLD
 120    0xFFF2    //TX_MICBLK_MR_EXP_TH
 121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
+122    0x0015    //TX_FENE_HOLD
 123    0x0000    //TX_FE_ENER_TH_MTS
 124    0x0000    //TX_FE_ENER_TH_EXP
 125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
@@ -38761,7 +58937,7 @@
 186    0x0000    //TX_MU0_PTD_FRQ_AEC
 187    0x0000    //TX_MINENOISETH
 188    0x0000    //TX_MU0_RE_EST
-189    0x0000    //TX_AEC_NUM_CH
+189    0x0001    //TX_AEC_NUM_CH
 190    0x0000    //TX_BIGECHOATTENUATION_MAX
 191    0x0000    //TX_A_POST_FLT_MICBLK
 192    0x0000    //TX_BLKENERTH
@@ -38814,7 +58990,7 @@
 239    0x0000    //TX_DT_RESRV_7
 240    0x0000    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xF200    //TX_THR_SN_EST_0
+242    0xFA00    //TX_THR_SN_EST_0
 243    0xF400    //TX_THR_SN_EST_1
 244    0xF800    //TX_THR_SN_EST_2
 245    0xF600    //TX_THR_SN_EST_3
@@ -38823,12 +58999,12 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0100    //TX_DELTA_THR_SN_EST_1
 252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -38854,12 +59030,12 @@
 279    0x0000    //TX_B_POST_FLT_0
 280    0x0000    //TX_B_POST_FLT_1
 281    0x001A    //TX_NS_LVL_CTRL_0
-282    0x001A    //TX_NS_LVL_CTRL_1
+282    0x0014    //TX_NS_LVL_CTRL_1
 283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0014    //TX_NS_LVL_CTRL_3
+284    0x000C    //TX_NS_LVL_CTRL_3
 285    0x000C    //TX_NS_LVL_CTRL_4
 286    0x000C    //TX_NS_LVL_CTRL_5
-287    0x000C    //TX_NS_LVL_CTRL_6
+287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x000C    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
 290    0x0014    //TX_MIN_GAIN_S_1
@@ -38875,10 +59051,10 @@
 300    0x7FFF    //TX_SNRI_SUP_0
 301    0x7FFF    //TX_SNRI_SUP_1
 302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
+303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x7FFF    //TX_SNRI_SUP_6
 307    0x4000    //TX_SNRI_SUP_7
 308    0x1200    //TX_THR_LFNS
 309    0x0147    //TX_G_LFNS
@@ -38887,12 +59063,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x7FFF    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x199A    //TX_A_POST_FILT_S_1
+315    0x1000    //TX_A_POST_FILT_S_1
 316    0x1000    //TX_A_POST_FILT_S_2
-317    0x1000    //TX_A_POST_FILT_S_3
+317    0x6666    //TX_A_POST_FILT_S_3
 318    0x6666    //TX_A_POST_FILT_S_4
 319    0x6666    //TX_A_POST_FILT_S_5
-320    0x6666    //TX_A_POST_FILT_S_6
+320    0x199A    //TX_A_POST_FILT_S_6
 321    0x6666    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
 323    0x2000    //TX_B_POST_FILT_1
@@ -38939,7 +59115,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x05A0    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
+367    0x0383    //TX_NOISE_TH_0
 368    0x1388    //TX_NOISE_TH_0_2
 369    0x3A98    //TX_NOISE_TH_0_3
 370    0x0C80    //TX_NOISE_TH_1
@@ -38951,11 +59127,11 @@
 376    0x7FFF    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x00C8    //TX_NOISE_TH_6
-379    0x000A    //TX_MINENOISE_TH
-380    0x0000    //TX_MINENOISE_MIC0_TH_MTS
-381    0x0000    //TX_MINENOISE_MIC0_TH_EXP
-382    0x0000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0x0000    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
 385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x6400    //TX_OUT_ENER_S_TH_NOISY
@@ -38963,22 +59139,22 @@
 388    0x7D00    //TX_OUT_ENER_TH_SPEECH
 389    0x0000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0000    //TX_MU_ARSP_EST
-396    0x0000    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0000    //TX_EXTRA_NS_L
-398    0x0000    //TX_EXTRA_NS_A
-399    0x0000    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0000    //TX_MIN_G_LOW300HZ
 401    0x0010    //TX_MAXLEVEL_CNG
 402    0x0000    //TX_STN_NOISE_TH
 403    0x0000    //TX_POST_MASK_SUP
 404    0x0000    //TX_POST_MASK_ADJUST
 405    0x0014    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x02F3    //TX_MINENOISE_MIC0_TH
 407    0x0226    //TX_MINENOISE_MIC0_S_TH
 408    0x2879    //TX_MIN_G_CTRL_SSNS
 409    0x0400    //TX_METAL_RTO_THR
@@ -39086,16 +59262,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x6666    //TX_MICTOBFGAIN0
 513    0x0014    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -39124,19 +59300,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0000    //TX_BF_LESSCUT_BBIN
-554    0x0000    //TX_BF_LESSCUT_EBIN
-555    0x0000    //TX_POSTBFB0
-556    0x0000    //TX_POSTBFB
-557    0x0000    //TX_POSTBFE
-558    0x0000    //TX_SPEECH_SNR_TH
-559    0x0000    //TX_PB_MAX_PRI_SNR_TH
-560    0x0000    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -39461,23 +59637,88 @@
 886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
 888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xD99A    //TX_FASTNS_MASK5_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
 890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x027C    //RX_RECVFUNC_MODE_0
+0    0x247C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
 4    0x000A    //RX_FRAME_SZ
 5    0x0000    //RX_DELAY_OPT
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 10    0x0800    //RX_PGA
@@ -39495,36 +59736,36 @@
 22    0x0010    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 30    0x0002    //RX_EXTRA_NS_L
 31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 35    0x199A    //RX_A_POST_FLT
 36    0x0000    //RX_LMT_THRD
 37    0x4000    //RX_LMT_ALPHA
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6648    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x6060    //RX_FDEQ_GAIN_9
-49    0x6060    //RX_FDEQ_GAIN_10
-50    0x6060    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x6060    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
+39    0x847C    //RX_FDEQ_GAIN_0
+40    0x5A56    //RX_FDEQ_GAIN_1
+41    0x6266    //RX_FDEQ_GAIN_2
+42    0x6E7A    //RX_FDEQ_GAIN_3
+43    0x8678    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x706E    //RX_FDEQ_GAIN_6
+46    0x6C64    //RX_FDEQ_GAIN_7
+47    0x5C6A    //RX_FDEQ_GAIN_8
+48    0x6268    //RX_FDEQ_GAIN_9
+49    0x6462    //RX_FDEQ_GAIN_10
+50    0x646E    //RX_FDEQ_GAIN_11
+51    0x6860    //RX_FDEQ_GAIN_12
+52    0x646A    //RX_FDEQ_GAIN_13
+53    0x7478    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -39533,22 +59774,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0105    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -39582,24 +59823,24 @@
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
 111    0x0002    //RX_FILTINDX
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x0CE0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0440    //RX_TDDRC_DRC_GAIN
+124    0x03FC    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0017    //RX_SPK_VOL
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0B50    //RX_MAX_G_FP
+129    0x0058    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -39629,45 +59870,45 @@
 156    0x0000    //RX_BWE_RESRV_2
 #VOL    0
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0440    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6648    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x6060    //RX_FDEQ_GAIN_9
-49    0x6060    //RX_FDEQ_GAIN_10
-50    0x6060    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x6060    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -39676,22 +59917,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -39724,49 +59965,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0017    //RX_SPK_VOL
+129    0x0039    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0440    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6648    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x6060    //RX_FDEQ_GAIN_9
-49    0x6060    //RX_FDEQ_GAIN_10
-50    0x6060    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x6060    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -39775,22 +60016,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -39823,49 +60064,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0023    //RX_SPK_VOL
+129    0x0054    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0440    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6648    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x6060    //RX_FDEQ_GAIN_9
-49    0x6060    //RX_FDEQ_GAIN_10
-50    0x6060    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x6060    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -39874,22 +60115,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -39922,49 +60163,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0034    //RX_SPK_VOL
+129    0x0085    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0440    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6648    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x6060    //RX_FDEQ_GAIN_9
-49    0x6060    //RX_FDEQ_GAIN_10
-50    0x6060    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x6060    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -39973,22 +60214,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -40021,49 +60262,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x004D    //RX_SPK_VOL
+129    0x00C7    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
+112    0x0000    //RX_TDDRC_THRD_0
 113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0440    //RX_TDDRC_DRC_GAIN
+124    0x0134    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6648    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x6060    //RX_FDEQ_GAIN_9
-49    0x6060    //RX_FDEQ_GAIN_10
-50    0x6060    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x6060    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -40072,220 +60313,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0073    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0440    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6648    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x6060    //RX_FDEQ_GAIN_9
-49    0x6060    //RX_FDEQ_GAIN_10
-50    0x6060    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x6060    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x00AC    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0440    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6648    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x6060    //RX_FDEQ_GAIN_9
-49    0x6060    //RX_FDEQ_GAIN_10
-50    0x6060    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x6060    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -40320,10 +60363,1060 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01EE    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8464    //RX_FDEQ_GAIN_0
+40    0x5150    //RX_FDEQ_GAIN_1
+41    0x555C    //RX_FDEQ_GAIN_2
+42    0x6E75    //RX_FDEQ_GAIN_3
+43    0x8077    //RX_FDEQ_GAIN_4
+44    0x756D    //RX_FDEQ_GAIN_5
+45    0x6667    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03AD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F4F    //RX_FDEQ_GAIN_1
+41    0x555A    //RX_FDEQ_GAIN_2
+42    0x6069    //RX_FDEQ_GAIN_3
+43    0x7D86    //RX_FDEQ_GAIN_4
+44    0x8682    //RX_FDEQ_GAIN_5
+45    0x7461    //RX_FDEQ_GAIN_6
+46    0x5352    //RX_FDEQ_GAIN_7
+47    0x5860    //RX_FDEQ_GAIN_8
+48    0x5D5F    //RX_FDEQ_GAIN_9
+49    0x5A52    //RX_FDEQ_GAIN_10
+50    0x535A    //RX_FDEQ_GAIN_11
+51    0x6654    //RX_FDEQ_GAIN_12
+52    0x6068    //RX_FDEQ_GAIN_13
+53    0x6F69    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x027C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0014    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0039    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0054    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0085    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x00C7    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0134    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01EE    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8464    //RX_FDEQ_GAIN_0
+197    0x5150    //RX_FDEQ_GAIN_1
+198    0x555C    //RX_FDEQ_GAIN_2
+199    0x6E75    //RX_FDEQ_GAIN_3
+200    0x8077    //RX_FDEQ_GAIN_4
+201    0x756D    //RX_FDEQ_GAIN_5
+202    0x6667    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0006    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03AD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F4F    //RX_FDEQ_GAIN_1
+198    0x555A    //RX_FDEQ_GAIN_2
+199    0x6069    //RX_FDEQ_GAIN_3
+200    0x7D86    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7461    //RX_FDEQ_GAIN_6
+203    0x5352    //RX_FDEQ_GAIN_7
+204    0x5860    //RX_FDEQ_GAIN_8
+205    0x5D5F    //RX_FDEQ_GAIN_9
+206    0x5A52    //RX_FDEQ_GAIN_10
+207    0x535A    //RX_FDEQ_GAIN_11
+208    0x6654    //RX_FDEQ_GAIN_12
+209    0x6068    //RX_FDEQ_GAIN_13
+210    0x6F69    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_HCO-VOICE_GENERIC-FB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -40352,7 +61445,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x01B1    //TX_PGA_0
+27    0x0302    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -40444,10 +61537,10 @@
 116    0x7FFF    //TX_BRMIC_BLKFACTOR
 117    0x000A    //TX_MICBLK_START_BIN
 118    0x0041    //TX_MICBLK_END_BIN
-119    0x0000    //TX_MICBLK_FE_HOLD
+119    0x0015    //TX_MICBLK_FE_HOLD
 120    0xFFF2    //TX_MICBLK_MR_EXP_TH
 121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
+122    0x0015    //TX_FENE_HOLD
 123    0x0000    //TX_FE_ENER_TH_MTS
 124    0x0000    //TX_FE_ENER_TH_EXP
 125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
@@ -40514,7 +61607,7 @@
 186    0x0000    //TX_MU0_PTD_FRQ_AEC
 187    0x0000    //TX_MINENOISETH
 188    0x0000    //TX_MU0_RE_EST
-189    0x0000    //TX_AEC_NUM_CH
+189    0x0001    //TX_AEC_NUM_CH
 190    0x0000    //TX_BIGECHOATTENUATION_MAX
 191    0x0000    //TX_A_POST_FLT_MICBLK
 192    0x0000    //TX_BLKENERTH
@@ -40567,7 +61660,7 @@
 239    0x0000    //TX_DT_RESRV_7
 240    0x0000    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xF200    //TX_THR_SN_EST_0
+242    0xF700    //TX_THR_SN_EST_0
 243    0xF400    //TX_THR_SN_EST_1
 244    0xF800    //TX_THR_SN_EST_2
 245    0xF600    //TX_THR_SN_EST_3
@@ -40576,12 +61669,12 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0100    //TX_DELTA_THR_SN_EST_1
 252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -40607,12 +61700,12 @@
 279    0x0000    //TX_B_POST_FLT_0
 280    0x0000    //TX_B_POST_FLT_1
 281    0x001A    //TX_NS_LVL_CTRL_0
-282    0x001A    //TX_NS_LVL_CTRL_1
+282    0x0014    //TX_NS_LVL_CTRL_1
 283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0014    //TX_NS_LVL_CTRL_3
+284    0x000C    //TX_NS_LVL_CTRL_3
 285    0x000C    //TX_NS_LVL_CTRL_4
 286    0x000C    //TX_NS_LVL_CTRL_5
-287    0x000C    //TX_NS_LVL_CTRL_6
+287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x000C    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
 290    0x0014    //TX_MIN_GAIN_S_1
@@ -40628,10 +61721,10 @@
 300    0x7FFF    //TX_SNRI_SUP_0
 301    0x7FFF    //TX_SNRI_SUP_1
 302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
+303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x7FFF    //TX_SNRI_SUP_6
 307    0x4000    //TX_SNRI_SUP_7
 308    0x1200    //TX_THR_LFNS
 309    0x0147    //TX_G_LFNS
@@ -40640,12 +61733,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x7FFF    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x199A    //TX_A_POST_FILT_S_1
+315    0x1000    //TX_A_POST_FILT_S_1
 316    0x1000    //TX_A_POST_FILT_S_2
-317    0x1000    //TX_A_POST_FILT_S_3
+317    0x6666    //TX_A_POST_FILT_S_3
 318    0x6666    //TX_A_POST_FILT_S_4
 319    0x6666    //TX_A_POST_FILT_S_5
-320    0x6666    //TX_A_POST_FILT_S_6
+320    0x199A    //TX_A_POST_FILT_S_6
 321    0x6666    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
 323    0x2000    //TX_B_POST_FILT_1
@@ -40692,7 +61785,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x05A0    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
+367    0x04E8    //TX_NOISE_TH_0
 368    0x1388    //TX_NOISE_TH_0_2
 369    0x3A98    //TX_NOISE_TH_0_3
 370    0x0C80    //TX_NOISE_TH_1
@@ -40704,11 +61797,11 @@
 376    0x7FFF    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x00C8    //TX_NOISE_TH_6
-379    0x000A    //TX_MINENOISE_TH
-380    0x0000    //TX_MINENOISE_MIC0_TH_MTS
-381    0x0000    //TX_MINENOISE_MIC0_TH_EXP
-382    0x0000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0x0000    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x02BC    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
 384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
 385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x6400    //TX_OUT_ENER_S_TH_NOISY
@@ -40716,22 +61809,22 @@
 388    0x7D00    //TX_OUT_ENER_TH_SPEECH
 389    0x0000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0000    //TX_MU_ARSP_EST
-396    0x0000    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0000    //TX_EXTRA_NS_L
-398    0x0000    //TX_EXTRA_NS_A
-399    0x0000    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0000    //TX_MIN_G_LOW300HZ
 401    0x0010    //TX_MAXLEVEL_CNG
 402    0x0000    //TX_STN_NOISE_TH
 403    0x0000    //TX_POST_MASK_SUP
 404    0x0000    //TX_POST_MASK_ADJUST
 405    0x0014    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x04E7    //TX_MINENOISE_MIC0_TH
 407    0x0226    //TX_MINENOISE_MIC0_S_TH
 408    0x2879    //TX_MIN_G_CTRL_SSNS
 409    0x0400    //TX_METAL_RTO_THR
@@ -40839,16 +61932,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x6666    //TX_MICTOBFGAIN0
 513    0x0014    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -40877,19 +61970,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0000    //TX_BF_LESSCUT_BBIN
-554    0x0000    //TX_BF_LESSCUT_EBIN
-555    0x0000    //TX_POSTBFB0
-556    0x0000    //TX_POSTBFB
-557    0x0000    //TX_POSTBFE
-558    0x0000    //TX_SPEECH_SNR_TH
-559    0x0000    //TX_PB_MAX_PRI_SNR_TH
-560    0x0000    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -41214,14 +62307,79 @@
 886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
 888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xD99A    //TX_FASTNS_MASK5_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+891    0x7000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
 0    0x006C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -41233,7 +62391,7 @@
 7    0x4000    //RX_TDDRC_ALPHA_UP_2
 8    0x4000    //RX_TDDRC_ALPHA_UP_3
 9    0x4000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
+10    0x065B    //RX_PGA
 11    0x7E56    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -41248,7 +62406,7 @@
 22    0x0014    //RX_NS_LVL_CTRL
 23    0xF400    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -41265,19 +62423,19 @@
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
 41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
+42    0x4870    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4870    //RX_FDEQ_GAIN_6
-46    0x7070    //RX_FDEQ_GAIN_7
-47    0x7050    //RX_FDEQ_GAIN_8
-48    0x5050    //RX_FDEQ_GAIN_9
-49    0x5050    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x7070    //RX_FDEQ_GAIN_14
-54    0x7070    //RX_FDEQ_GAIN_15
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -41288,20 +62446,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -41347,12 +62505,12 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x0017    //RX_SPK_VOL
+129    0x0012    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -41403,24 +62561,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
 41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
+42    0x4870    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4870    //RX_FDEQ_GAIN_6
-46    0x7070    //RX_FDEQ_GAIN_7
-47    0x7050    //RX_FDEQ_GAIN_8
-48    0x5050    //RX_FDEQ_GAIN_9
-49    0x5050    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x7070    //RX_FDEQ_GAIN_14
-54    0x7070    //RX_FDEQ_GAIN_15
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -41431,20 +62589,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -41477,7 +62635,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0017    //RX_SPK_VOL
+129    0x0012    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x4000    //RX_TDDRC_ALPHA_UP_1
@@ -41502,24 +62660,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
 41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
+42    0x4870    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4870    //RX_FDEQ_GAIN_6
-46    0x7070    //RX_FDEQ_GAIN_7
-47    0x7050    //RX_FDEQ_GAIN_8
-48    0x5050    //RX_FDEQ_GAIN_9
-49    0x5050    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x7070    //RX_FDEQ_GAIN_14
-54    0x7070    //RX_FDEQ_GAIN_15
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -41530,20 +62688,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -41576,7 +62734,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0023    //RX_SPK_VOL
+129    0x001A    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x4000    //RX_TDDRC_ALPHA_UP_1
@@ -41601,24 +62759,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
 41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
+42    0x4870    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4870    //RX_FDEQ_GAIN_6
-46    0x7070    //RX_FDEQ_GAIN_7
-47    0x7050    //RX_FDEQ_GAIN_8
-48    0x5050    //RX_FDEQ_GAIN_9
-49    0x5050    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x7070    //RX_FDEQ_GAIN_14
-54    0x7070    //RX_FDEQ_GAIN_15
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -41629,20 +62787,119 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0025    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -41677,7 +62934,7 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0034    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
+#VOL    4
 6    0x4000    //RX_TDDRC_ALPHA_UP_1
 7    0x4000    //RX_TDDRC_ALPHA_UP_2
 8    0x4000    //RX_TDDRC_ALPHA_UP_3
@@ -41700,24 +62957,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
 41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
+42    0x4870    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4870    //RX_FDEQ_GAIN_6
-46    0x7070    //RX_FDEQ_GAIN_7
-47    0x7050    //RX_FDEQ_GAIN_8
-48    0x5050    //RX_FDEQ_GAIN_9
-49    0x5050    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x7070    //RX_FDEQ_GAIN_14
-54    0x7070    //RX_FDEQ_GAIN_15
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -41728,20 +62985,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -41776,105 +63033,6 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x004D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4870    //RX_FDEQ_GAIN_6
-46    0x7070    //RX_FDEQ_GAIN_7
-47    0x7050    //RX_FDEQ_GAIN_8
-48    0x5050    //RX_FDEQ_GAIN_9
-49    0x5050    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x7070    //RX_FDEQ_GAIN_14
-54    0x7070    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0073    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x4000    //RX_TDDRC_ALPHA_UP_1
 7    0x4000    //RX_TDDRC_ALPHA_UP_2
@@ -41898,24 +63056,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
 41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
+42    0x4870    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4870    //RX_FDEQ_GAIN_6
-46    0x7070    //RX_FDEQ_GAIN_7
-47    0x7050    //RX_FDEQ_GAIN_8
-48    0x5050    //RX_FDEQ_GAIN_9
-49    0x5050    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x7070    //RX_FDEQ_GAIN_14
-54    0x7070    //RX_FDEQ_GAIN_15
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -41926,20 +63084,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -41972,7 +63130,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x00AC    //RX_SPK_VOL
+129    0x0074    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x4000    //RX_TDDRC_ALPHA_UP_1
@@ -41997,24 +63155,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0600    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
 41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
+42    0x4870    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4870    //RX_FDEQ_GAIN_6
-46    0x7070    //RX_FDEQ_GAIN_7
-47    0x7050    //RX_FDEQ_GAIN_8
-48    0x5050    //RX_FDEQ_GAIN_9
-49    0x5050    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7070    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
-53    0x7070    //RX_FDEQ_GAIN_14
-54    0x7070    //RX_FDEQ_GAIN_15
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -42025,20 +63183,20 @@
 62    0x4848    //RX_FDEQ_GAIN_23
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -42073,16 +63231,868 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x006C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+167    0x065B    //RX_PGA
+168    0x7E56    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF400    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0025    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0034    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x004D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0074    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_VCO-VOICE_GENERIC-NB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2F7C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x0073    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0003    //TX_NUM_MIC
 6    0x0000    //TX_SAMPLINGFREQ_SIG
 7    0x0000    //TX_SAMPLINGFREQ_PROC
@@ -42099,8 +64109,8 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
-22    0x000D    //TX_DIST2REF_02
+21    0x009C    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
@@ -42119,8 +64129,8 @@
 38    0x0002    //TX_MICS_OF_PAIR1
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
 43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
@@ -42186,7 +64196,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -42228,7 +64238,7 @@
 147    0x0100    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7500    //TX_EAD_THR
+150    0x7A00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
 152    0x0200    //TX_MIN_EQ_RE_EST_0
 153    0x0200    //TX_MIN_EQ_RE_EST_1
@@ -42243,13 +64253,13 @@
 162    0x4000    //TX_MIN_EQ_RE_EST_10
 163    0x6000    //TX_MIN_EQ_RE_EST_11
 164    0x7FFF    //TX_MIN_EQ_RE_EST_12
-165    0x2000    //TX_LAMBDA_RE_EST
+165    0x4000    //TX_LAMBDA_RE_EST
 166    0x0000    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x2000    //TX_GAIN_NP
 169    0x0180    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
+171    0x0200    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -42275,14 +64285,14 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7FF0    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
+197    0x7148    //TX_DTD_THR1_0
+198    0x7148    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
-204    0x7E00    //TX_DTD_THR2_0
+204    0x0CCD    //TX_DTD_THR2_0
 205    0x0CCD    //TX_DTD_THR2_1
 206    0x0CCD    //TX_DTD_THR2_2
 207    0x0CCD    //TX_DTD_THR2_3
@@ -42306,7 +64316,7 @@
 225    0x1770    //TX_RATIO_DT_L_TH_HIGH
 226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
 227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
+228    0x2000    //TX_B_POST_FILT_ECHO_L
 229    0x2000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
@@ -42315,8 +64325,8 @@
 234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -42329,12 +64339,12 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0050    //TX_DELTA_THR_SN_EST_0
-251    0x01A0    //TX_DELTA_THR_SN_EST_1
+251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x01A0    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -42360,28 +64370,28 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0012    //TX_NS_LVL_CTRL_1
-283    0x0017    //TX_NS_LVL_CTRL_2
-284    0x0015    //TX_NS_LVL_CTRL_3
+282    0x0017    //TX_NS_LVL_CTRL_1
+283    0x0015    //TX_NS_LVL_CTRL_2
+284    0x0012    //TX_NS_LVL_CTRL_3
 285    0x0012    //TX_NS_LVL_CTRL_4
-286    0x0012    //TX_NS_LVL_CTRL_5
-287    0x0011    //TX_NS_LVL_CTRL_6
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0012    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000F    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000D    //TX_MIN_GAIN_S_2
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
 292    0x000F    //TX_MIN_GAIN_S_3
 293    0x000F    //TX_MIN_GAIN_S_4
-294    0x000F    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x000F    //TX_MIN_GAIN_S_6
 296    0x000F    //TX_MIN_GAIN_S_7
 297    0x4000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
+301    0x1000    //TX_SNRI_SUP_1
 302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
+303    0x2400    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
 306    0x4000    //TX_SNRI_SUP_6
@@ -42393,19 +64403,19 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x3000    //TX_A_POST_FILT_S_5
+315    0x2000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x1000    //TX_A_POST_FILT_S_3
+318    0x3000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
 320    0x5000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x5000    //TX_B_POST_FILT_4
-327    0x3000    //TX_B_POST_FILT_5
+324    0x1000    //TX_B_POST_FILT_2
+325    0x5000    //TX_B_POST_FILT_3
+326    0x3000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
@@ -42418,12 +64428,12 @@
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7E00    //TX_LAMBDA_PFILT
 339    0x7D00    //TX_LAMBDA_PFILT_S_0
-340    0x7900    //TX_LAMBDA_PFILT_S_1
-341    0x7400    //TX_LAMBDA_PFILT_S_2
-342    0x7900    //TX_LAMBDA_PFILT_S_3
+340    0x7400    //TX_LAMBDA_PFILT_S_1
+341    0x7900    //TX_LAMBDA_PFILT_S_2
+342    0x7000    //TX_LAMBDA_PFILT_S_3
 343    0x7D00    //TX_LAMBDA_PFILT_S_4
 344    0x7D00    //TX_LAMBDA_PFILT_S_5
-345    0x7D00    //TX_LAMBDA_PFILT_S_6
+345    0x7900    //TX_LAMBDA_PFILT_S_6
 346    0x7D00    //TX_LAMBDA_PFILT_S_7
 347    0x0200    //TX_K_PEPPER
 348    0x0800    //TX_A_PEPPER
@@ -42436,7 +64446,7 @@
 355    0x0800    //TX_DT_BINVAD_TH_2
 356    0x0800    //TX_DT_BINVAD_TH_3
 357    0x0FA0    //TX_DT_BINVAD_ENDF
-358    0x0400    //TX_C_POST_FLT_DT
+358    0x0200    //TX_C_POST_FLT_DT
 359    0x4000    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0100    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -42451,17 +64461,17 @@
 370    0x07D0    //TX_NOISE_TH_1
 371    0x03ED    //TX_NOISE_TH_2
 372    0x2EE0    //TX_NOISE_TH_3
-373    0x55F0    //TX_NOISE_TH_4
+373    0x5528    //TX_NOISE_TH_4
 374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x0FA0    //TX_NOISE_TH_6
 379    0x000A    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -42469,17 +64479,17 @@
 388    0x1000    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x7000    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
+401    0x0004    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
@@ -42587,21 +64597,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -42630,31 +64640,31 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0014    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
+567    0x5250    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4848    //TX_FDEQ_GAIN_2
-570    0x483C    //TX_FDEQ_GAIN_3
-571    0x303C    //TX_FDEQ_GAIN_4
-572    0x3048    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
+570    0x4A43    //TX_FDEQ_GAIN_3
+571    0x374B    //TX_FDEQ_GAIN_4
+572    0x3444    //TX_FDEQ_GAIN_5
+573    0x433C    //TX_FDEQ_GAIN_6
+574    0x3A37    //TX_FDEQ_GAIN_7
+575    0x2A2A    //TX_FDEQ_GAIN_8
+576    0x2C2C    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
 579    0x4848    //TX_FDEQ_GAIN_12
@@ -42678,7 +64688,7 @@
 597    0x0708    //TX_FDEQ_BIN_6
 598    0x090A    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D08    //TX_FDEQ_BIN_9
+600    0x0D0E    //TX_FDEQ_BIN_9
 601    0x0000    //TX_FDEQ_BIN_10
 602    0x0000    //TX_FDEQ_BIN_11
 603    0x0000    //TX_FDEQ_BIN_12
@@ -42694,7 +64704,7 @@
 613    0x0000    //TX_FDEQ_BIN_22
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+616    0x0014    //TX_PREEQ_SUBNUM_MIC0
 617    0x4848    //TX_PREEQ_GAIN_MIC0_0
 618    0x4848    //TX_PREEQ_GAIN_MIC0_1
 619    0x4848    //TX_PREEQ_GAIN_MIC0_2
@@ -42719,16 +64729,16 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x7800    //TX_PREEQ_BIN_MIC0_0
-642    0x0000    //TX_PREEQ_BIN_MIC0_1
-643    0x0000    //TX_PREEQ_BIN_MIC0_2
-644    0x0000    //TX_PREEQ_BIN_MIC0_3
-645    0x0000    //TX_PREEQ_BIN_MIC0_4
-646    0x0000    //TX_PREEQ_BIN_MIC0_5
-647    0x0000    //TX_PREEQ_BIN_MIC0_6
-648    0x0000    //TX_PREEQ_BIN_MIC0_7
-649    0x0000    //TX_PREEQ_BIN_MIC0_8
-650    0x0000    //TX_PREEQ_BIN_MIC0_9
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
 651    0x0000    //TX_PREEQ_BIN_MIC0_10
 652    0x0000    //TX_PREEQ_BIN_MIC0_11
 653    0x0000    //TX_PREEQ_BIN_MIC0_12
@@ -42744,16 +64754,16 @@
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
 665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4846    //TX_PREEQ_GAIN_MIC1_0
-667    0x4544    //TX_PREEQ_GAIN_MIC1_1
-668    0x4240    //TX_PREEQ_GAIN_MIC1_2
-669    0x3E48    //TX_PREEQ_GAIN_MIC1_3
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+673    0x4A4A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4B4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4D4E    //TX_PREEQ_GAIN_MIC1_9
 676    0x4848    //TX_PREEQ_GAIN_MIC1_10
 677    0x4848    //TX_PREEQ_GAIN_MIC1_11
 678    0x4848    //TX_PREEQ_GAIN_MIC1_12
@@ -42768,16 +64778,16 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x251A    //TX_PREEQ_BIN_MIC1_0
-691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
-692    0x0C08    //TX_PREEQ_BIN_MIC1_2
-693    0x0700    //TX_PREEQ_BIN_MIC1_3
-694    0x0000    //TX_PREEQ_BIN_MIC1_4
-695    0x0000    //TX_PREEQ_BIN_MIC1_5
-696    0x0000    //TX_PREEQ_BIN_MIC1_6
-697    0x0000    //TX_PREEQ_BIN_MIC1_7
-698    0x0000    //TX_PREEQ_BIN_MIC1_8
-699    0x0000    //TX_PREEQ_BIN_MIC1_9
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
 700    0x0000    //TX_PREEQ_BIN_MIC1_10
 701    0x0000    //TX_PREEQ_BIN_MIC1_11
 702    0x0000    //TX_PREEQ_BIN_MIC1_12
@@ -42799,10 +64809,10 @@
 718    0x4848    //TX_PREEQ_GAIN_MIC2_3
 719    0x4848    //TX_PREEQ_GAIN_MIC2_4
 720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+721    0x484A    //TX_PREEQ_GAIN_MIC2_6
+722    0x4B4B    //TX_PREEQ_GAIN_MIC2_7
+723    0x4B4C    //TX_PREEQ_GAIN_MIC2_8
+724    0x4D50    //TX_PREEQ_GAIN_MIC2_9
 725    0x4848    //TX_PREEQ_GAIN_MIC2_10
 726    0x4848    //TX_PREEQ_GAIN_MIC2_11
 727    0x4848    //TX_PREEQ_GAIN_MIC2_12
@@ -42817,16 +64827,16 @@
 736    0x4848    //TX_PREEQ_GAIN_MIC2_21
 737    0x4848    //TX_PREEQ_GAIN_MIC2_22
 738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x7800    //TX_PREEQ_BIN_MIC2_0
-740    0x0000    //TX_PREEQ_BIN_MIC2_1
-741    0x0000    //TX_PREEQ_BIN_MIC2_2
-742    0x0000    //TX_PREEQ_BIN_MIC2_3
-743    0x0000    //TX_PREEQ_BIN_MIC2_4
-744    0x0000    //TX_PREEQ_BIN_MIC2_5
-745    0x0000    //TX_PREEQ_BIN_MIC2_6
-746    0x0000    //TX_PREEQ_BIN_MIC2_7
-747    0x0000    //TX_PREEQ_BIN_MIC2_8
-748    0x0000    //TX_PREEQ_BIN_MIC2_9
+739    0x0202    //TX_PREEQ_BIN_MIC2_0
+740    0x0203    //TX_PREEQ_BIN_MIC2_1
+741    0x0303    //TX_PREEQ_BIN_MIC2_2
+742    0x0304    //TX_PREEQ_BIN_MIC2_3
+743    0x0405    //TX_PREEQ_BIN_MIC2_4
+744    0x0506    //TX_PREEQ_BIN_MIC2_5
+745    0x0708    //TX_PREEQ_BIN_MIC2_6
+746    0x090A    //TX_PREEQ_BIN_MIC2_7
+747    0x0B0C    //TX_PREEQ_BIN_MIC2_8
+748    0x0D0E    //TX_PREEQ_BIN_MIC2_9
 749    0x0000    //TX_PREEQ_BIN_MIC2_10
 750    0x0000    //TX_PREEQ_BIN_MIC2_11
 751    0x0000    //TX_PREEQ_BIN_MIC2_12
@@ -42851,7 +64861,7 @@
 770    0x0044    //TX_MIC_PWR_BIAS_1
 771    0x0044    //TX_MIC_PWR_BIAS_2
 772    0x0044    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
+773    0x0000    //TX_GAIN_LIMIT_0
 774    0x000F    //TX_GAIN_LIMIT_1
 775    0x000F    //TX_GAIN_LIMIT_2
 776    0x000F    //TX_GAIN_LIMIT_3
@@ -42944,7 +64954,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0970    //TX_TDDRC_DRC_GAIN
+866    0x0DCE    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -42969,14 +64979,79 @@
 888    0x0028    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x0050    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x000C    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7E90    //TX_DTD_THR1_MICMUTE_0
+912    0x7918    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0xE0C0    //TX_AMS_RESRV_02
+945    0x1770    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0040    //RX_RECVFUNC_MODE_0
+0    0x2040    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -42986,7 +65061,7 @@
 7    0x3000    //RX_TDDRC_ALPHA_UP_2
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0203    //RX_PGA
+10    0x050D    //RX_PGA
 11    0x7652    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -43001,7 +65076,7 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x0000    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0000    //RX_FENS_RESRV_1
 27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
@@ -43105,7 +65180,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x0080    //RX_MIN_G_FP
 128    0x2000    //RX_MAX_G_FP
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0010    //RX_MAXLEVEL_CNG
 132    0x0000    //RX_BWE_UV_TH
@@ -43230,7 +65305,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -43329,7 +65404,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -43428,7 +65503,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -43527,7 +65602,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -43626,7 +65701,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -43725,7 +65800,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -43824,18 +65899,870 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x2040    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x050D    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0000    //RX_PITCH_BFR_LEN
+174    0x0000    //RX_SBD_PITCH_DET
+175    0x0000    //RX_PP_RESRV_0
+176    0x0000    //RX_PP_RESRV_1
+177    0xF800    //RX_N_SN_EST
+178    0x0000    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0000    //RX_FENS_RESRV_1
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+187    0x0000    //RX_EXTRA_NS_L
+188    0x0000    //RX_EXTRA_NS_A
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x0000    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0003    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0010    //RX_MAXLEVEL_CNG
+289    0x0000    //RX_BWE_UV_TH
+290    0x0000    //RX_BWE_UV_TH2
+291    0x0000    //RX_BWE_UV_TH3
+292    0x0000    //RX_BWE_V_TH
+293    0x0000    //RX_BWE_GAIN1_V_TH1
+294    0x0000    //RX_BWE_GAIN1_V_TH2
+295    0x0000    //RX_BWE_UV_EQ
+296    0x0000    //RX_BWE_V_EQ
+297    0x0000    //RX_BWE_TONE_TH
+298    0x0000    //RX_BWE_UV_HOLD_T
+299    0x0000    //RX_BWE_GAIN2_ALPHA
+300    0x0000    //RX_BWE_GAIN3_ALPHA
+301    0x0000    //RX_BWE_CUTOFF
+302    0x0000    //RX_BWE_GAINFILL
+303    0x0000    //RX_BWE_MAXTH_TONE
+304    0x0000    //RX_BWE_EQ_0
+305    0x0000    //RX_BWE_EQ_1
+306    0x0000    //RX_BWE_EQ_2
+307    0x0000    //RX_BWE_EQ_3
+308    0x0000    //RX_BWE_EQ_4
+309    0x0000    //RX_BWE_EQ_5
+310    0x0000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_VCO-VOICE_GENERIC-WB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2F3C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x0073    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0003    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
 7    0x0001    //TX_SAMPLINGFREQ_PROC
@@ -43852,14 +66779,14 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0091    //TX_DIST2REF1
-22    0x000D    //TX_DIST2REF_02
+21    0x009C    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
 27    0x1000    //TX_PGA_0
-28    0x0800    //TX_PGA_1
+28    0x1000    //TX_PGA_1
 29    0x1000    //TX_PGA_2
 30    0x0000    //TX_PGA_3
 31    0x0000    //TX_PGA_4
@@ -43872,8 +66799,8 @@
 38    0x0002    //TX_MICS_OF_PAIR1
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
 43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
@@ -43938,8 +66865,8 @@
 104    0x0000    //TX_MIC_LOC_23
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0C00    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -43981,9 +66908,9 @@
 147    0x0300    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
+150    0x6C00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x3000    //TX_MIN_EQ_RE_EST_0
+152    0x0200    //TX_MIN_EQ_RE_EST_0
 153    0x0100    //TX_MIN_EQ_RE_EST_1
 154    0x0200    //TX_MIN_EQ_RE_EST_2
 155    0x0200    //TX_MIN_EQ_RE_EST_3
@@ -44000,9 +66927,9 @@
 166    0x4000    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x5000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
+169    0x02A0    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
+171    0x01B0    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -44028,15 +66955,15 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7FF0    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
+197    0x7148    //TX_DTD_THR1_0
+198    0x7148    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
-204    0x7E00    //TX_DTD_THR2_0
-205    0x7E00    //TX_DTD_THR2_1
+204    0x5000    //TX_DTD_THR2_0
+205    0x5000    //TX_DTD_THR2_1
 206    0x5000    //TX_DTD_THR2_2
 207    0x5000    //TX_DTD_THR2_3
 208    0x5000    //TX_DTD_THR2_4
@@ -44044,8 +66971,8 @@
 210    0x5000    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x03E8    //TX_DT_CUT_K
-214    0x0010    //TX_DT_CUT_THR
+213    0x07D0    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
 217    0x4000    //TX_FDPFGAINECHO
@@ -44054,22 +66981,22 @@
 220    0x0000    //TX_DTD_MIC_BLK
 221    0x023E    //TX_ADPT_STRICT_L
 222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
+225    0x01CC    //TX_RATIO_DT_L_TH_HIGH
+226    0x4A38    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+234    0x015E    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -44082,11 +67009,11 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
 254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
+255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0200    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
@@ -44114,11 +67041,11 @@
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
 282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0016    //TX_NS_LVL_CTRL_4
-286    0x0014    //TX_NS_LVL_CTRL_5
-287    0x0011    //TX_NS_LVL_CTRL_6
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000F    //TX_MIN_GAIN_S_0
 290    0x0010    //TX_MIN_GAIN_S_1
@@ -44136,8 +67063,8 @@
 302    0x4000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x50C0    //TX_SNRI_SUP_6
+305    0x50C0    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
@@ -44146,19 +67073,19 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x5000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x4C00    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+315    0x4C00    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
+323    0x2000    //TX_B_POST_FILT_1
 324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
+325    0x4000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
-327    0x4000    //TX_B_POST_FILT_5
+327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
@@ -44166,14 +67093,14 @@
 332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
 333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
 334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x6000    //TX_B_LESSCUT_RTO_S_6
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7C00    //TX_LAMBDA_PFILT
 339    0x7C00    //TX_LAMBDA_PFILT_S_0
 340    0x7C00    //TX_LAMBDA_PFILT_S_1
-341    0x7C00    //TX_LAMBDA_PFILT_S_2
-342    0x7A00    //TX_LAMBDA_PFILT_S_3
+341    0x7A00    //TX_LAMBDA_PFILT_S_2
+342    0x7C00    //TX_LAMBDA_PFILT_S_3
 343    0x7C00    //TX_LAMBDA_PFILT_S_4
 344    0x7C00    //TX_LAMBDA_PFILT_S_5
 345    0x7C00    //TX_LAMBDA_PFILT_S_6
@@ -44184,12 +67111,12 @@
 350    0x0600    //TX_A_PEPPER_HF
 351    0x0001    //TX_HMNC_BST_FLG
 352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
 356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0800    //TX_C_POST_FLT_DT
+357    0x1388    //TX_DT_BINVAD_ENDF
+358    0x2000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0140    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -44211,10 +67138,10 @@
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x0F0A    //TX_NOISE_TH_6
 379    0x0033    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -44222,17 +67149,17 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x7FFF    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x4000    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
+401    0x0005    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
@@ -44340,21 +67267,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -44383,33 +67310,33 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
-566    0x001C    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x5048    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
+569    0x4A4F    //TX_FDEQ_GAIN_2
+570    0x4E48    //TX_FDEQ_GAIN_3
+571    0x4444    //TX_FDEQ_GAIN_4
+572    0x444B    //TX_FDEQ_GAIN_5
+573    0x4E50    //TX_FDEQ_GAIN_6
+574    0x544D    //TX_FDEQ_GAIN_7
+575    0x464C    //TX_FDEQ_GAIN_8
+576    0x4844    //TX_FDEQ_GAIN_9
+577    0x393C    //TX_FDEQ_GAIN_10
+578    0x3C3C    //TX_FDEQ_GAIN_11
 579    0x4848    //TX_FDEQ_GAIN_12
 580    0x4848    //TX_FDEQ_GAIN_13
 581    0x4848    //TX_FDEQ_GAIN_14
@@ -44432,10 +67359,10 @@
 598    0x090A    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
 600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x0E0F    //TX_FDEQ_BIN_10
-602    0x0F10    //TX_FDEQ_BIN_11
-603    0x1011    //TX_FDEQ_BIN_12
-604    0x1104    //TX_FDEQ_BIN_13
+601    0x0F10    //TX_FDEQ_BIN_10
+602    0x1011    //TX_FDEQ_BIN_11
+603    0x1112    //TX_FDEQ_BIN_12
+604    0x120B    //TX_FDEQ_BIN_13
 605    0x0000    //TX_FDEQ_BIN_14
 606    0x0000    //TX_FDEQ_BIN_15
 607    0x0000    //TX_FDEQ_BIN_16
@@ -44472,22 +67399,22 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0808    //TX_PREEQ_BIN_MIC0_7
-649    0x0808    //TX_PREEQ_BIN_MIC0_8
-650    0x0808    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0808    //TX_PREEQ_BIN_MIC0_11
-653    0x0808    //TX_PREEQ_BIN_MIC0_12
-654    0x0808    //TX_PREEQ_BIN_MIC0_13
-655    0x0808    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+651    0x0F10    //TX_PREEQ_BIN_MIC0_10
+652    0x1011    //TX_PREEQ_BIN_MIC0_11
+653    0x1112    //TX_PREEQ_BIN_MIC0_12
+654    0x120B    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
 657    0x0000    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
@@ -44497,20 +67424,20 @@
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
 665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4846    //TX_PREEQ_GAIN_MIC1_0
-667    0x4544    //TX_PREEQ_GAIN_MIC1_1
-668    0x4240    //TX_PREEQ_GAIN_MIC1_2
-669    0x3E3C    //TX_PREEQ_GAIN_MIC1_3
-670    0x3A38    //TX_PREEQ_GAIN_MIC1_4
-671    0x3635    //TX_PREEQ_GAIN_MIC1_5
-672    0x3330    //TX_PREEQ_GAIN_MIC1_6
-673    0x2E2A    //TX_PREEQ_GAIN_MIC1_7
-674    0x2648    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x484A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5454    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
 680    0x4848    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
@@ -44521,20 +67448,20 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x251A    //TX_PREEQ_BIN_MIC1_0
-691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
-692    0x0C0C    //TX_PREEQ_BIN_MIC1_2
-693    0x0C0F    //TX_PREEQ_BIN_MIC1_3
-694    0x0F0F    //TX_PREEQ_BIN_MIC1_4
-695    0x0F09    //TX_PREEQ_BIN_MIC1_5
-696    0x0909    //TX_PREEQ_BIN_MIC1_6
-697    0x0908    //TX_PREEQ_BIN_MIC1_7
-698    0x0700    //TX_PREEQ_BIN_MIC1_8
-699    0x0000    //TX_PREEQ_BIN_MIC1_9
-700    0x0000    //TX_PREEQ_BIN_MIC1_10
-701    0x0000    //TX_PREEQ_BIN_MIC1_11
-702    0x0000    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0F10    //TX_PREEQ_BIN_MIC1_10
+701    0x1011    //TX_PREEQ_BIN_MIC1_11
+702    0x1112    //TX_PREEQ_BIN_MIC1_12
+703    0x120B    //TX_PREEQ_BIN_MIC1_13
 704    0x0000    //TX_PREEQ_BIN_MIC1_14
 705    0x0000    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
@@ -44549,19 +67476,19 @@
 715    0x4848    //TX_PREEQ_GAIN_MIC2_0
 716    0x4848    //TX_PREEQ_GAIN_MIC2_1
 717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+718    0x484A    //TX_PREEQ_GAIN_MIC2_3
+719    0x4B4A    //TX_PREEQ_GAIN_MIC2_4
+720    0x4B4C    //TX_PREEQ_GAIN_MIC2_5
+721    0x4C4D    //TX_PREEQ_GAIN_MIC2_6
+722    0x4F50    //TX_PREEQ_GAIN_MIC2_7
+723    0x5050    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5252    //TX_PREEQ_GAIN_MIC2_10
+726    0x5253    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x5454    //TX_PREEQ_GAIN_MIC2_13
+729    0x5455    //TX_PREEQ_GAIN_MIC2_14
+730    0x5555    //TX_PREEQ_GAIN_MIC2_15
 731    0x4848    //TX_PREEQ_GAIN_MIC2_16
 732    0x4848    //TX_PREEQ_GAIN_MIC2_17
 733    0x4848    //TX_PREEQ_GAIN_MIC2_18
@@ -44585,7 +67512,7 @@
 751    0x0808    //TX_PREEQ_BIN_MIC2_12
 752    0x0808    //TX_PREEQ_BIN_MIC2_13
 753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
+754    0x0808    //TX_PREEQ_BIN_MIC2_15
 755    0x0000    //TX_PREEQ_BIN_MIC2_16
 756    0x0000    //TX_PREEQ_BIN_MIC2_17
 757    0x0000    //TX_PREEQ_BIN_MIC2_18
@@ -44604,8 +67531,8 @@
 770    0x0046    //TX_MIC_PWR_BIAS_1
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
 775    0x000F    //TX_GAIN_LIMIT_2
 776    0x000F    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
@@ -44697,7 +67624,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0B50    //TX_TDDRC_DRC_GAIN
+866    0x10CA    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -44722,14 +67649,79 @@
 888    0x0028    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x03C0    //TX_MICMUTE_RATIO_THR
+900    0x0122    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x6590    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0xE4A8    //TX_AMS_RESRV_02
+945    0x1770    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0040    //RX_RECVFUNC_MODE_0
+0    0x2040    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -44739,7 +67731,7 @@
 7    0x3000    //RX_TDDRC_ALPHA_UP_2
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0203    //RX_PGA
+10    0x050D    //RX_PGA
 11    0x7652    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -44754,7 +67746,7 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x0000    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0000    //RX_FENS_RESRV_1
 27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
@@ -44858,7 +67850,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x0080    //RX_MIN_G_FP
 128    0x2000    //RX_MAX_G_FP
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0010    //RX_MAXLEVEL_CNG
 132    0x0000    //RX_BWE_UV_TH
@@ -44983,7 +67975,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -45082,7 +68074,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -45181,7 +68173,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -45280,7 +68272,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -45379,7 +68371,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -45478,7 +68470,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -45577,18 +68569,870 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x2040    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x050D    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0000    //RX_PITCH_BFR_LEN
+174    0x0000    //RX_SBD_PITCH_DET
+175    0x0000    //RX_PP_RESRV_0
+176    0x0000    //RX_PP_RESRV_1
+177    0xF800    //RX_N_SN_EST
+178    0x0000    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0000    //RX_FENS_RESRV_1
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+187    0x0000    //RX_EXTRA_NS_L
+188    0x0000    //RX_EXTRA_NS_A
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x0000    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0003    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0010    //RX_MAXLEVEL_CNG
+289    0x0000    //RX_BWE_UV_TH
+290    0x0000    //RX_BWE_UV_TH2
+291    0x0000    //RX_BWE_UV_TH3
+292    0x0000    //RX_BWE_V_TH
+293    0x0000    //RX_BWE_GAIN1_V_TH1
+294    0x0000    //RX_BWE_GAIN1_V_TH2
+295    0x0000    //RX_BWE_UV_EQ
+296    0x0000    //RX_BWE_V_EQ
+297    0x0000    //RX_BWE_TONE_TH
+298    0x0000    //RX_BWE_UV_HOLD_T
+299    0x0000    //RX_BWE_GAIN2_ALPHA
+300    0x0000    //RX_BWE_GAIN3_ALPHA
+301    0x0000    //RX_BWE_CUTOFF
+302    0x0000    //RX_BWE_GAINFILL
+303    0x0000    //RX_BWE_MAXTH_TONE
+304    0x0000    //RX_BWE_EQ_0
+305    0x0000    //RX_BWE_EQ_1
+306    0x0000    //RX_BWE_EQ_2
+307    0x0000    //RX_BWE_EQ_3
+308    0x0000    //RX_BWE_EQ_4
+309    0x0000    //RX_BWE_EQ_5
+310    0x0000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_VCO-VOICE_GENERIC-SWB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2F7C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x00F3    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0003    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
 7    0x0003    //TX_SAMPLINGFREQ_PROC
@@ -45605,8 +69449,8 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0093    //TX_DIST2REF1
-22    0x001A    //TX_DIST2REF_02
+21    0x009C    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
@@ -45625,8 +69469,8 @@
 38    0x0002    //TX_MICS_OF_PAIR1
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
 43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
@@ -45692,7 +69536,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -45738,24 +69582,24 @@
 151    0x1000    //TX_THR_RE_EST
 152    0x2000    //TX_MIN_EQ_RE_EST_0
 153    0x0600    //TX_MIN_EQ_RE_EST_1
-154    0x0200    //TX_MIN_EQ_RE_EST_2
-155    0x0200    //TX_MIN_EQ_RE_EST_3
-156    0x0200    //TX_MIN_EQ_RE_EST_4
-157    0x0200    //TX_MIN_EQ_RE_EST_5
-158    0x0200    //TX_MIN_EQ_RE_EST_6
+154    0x3000    //TX_MIN_EQ_RE_EST_2
+155    0x3000    //TX_MIN_EQ_RE_EST_3
+156    0x3000    //TX_MIN_EQ_RE_EST_4
+157    0x3000    //TX_MIN_EQ_RE_EST_5
+158    0x3000    //TX_MIN_EQ_RE_EST_6
 159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
+160    0x7800    //TX_MIN_EQ_RE_EST_8
+161    0x7800    //TX_MIN_EQ_RE_EST_9
+162    0x7800    //TX_MIN_EQ_RE_EST_10
+163    0x7800    //TX_MIN_EQ_RE_EST_11
+164    0x7800    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
 166    0x3000    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
+169    0x0260    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
+171    0x0680    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -45781,7 +69625,7 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7FF0    //TX_DTD_THR1_0
+197    0x7B0C    //TX_DTD_THR1_0
 198    0x7FF0    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
@@ -45807,22 +69651,22 @@
 220    0x7FFF    //TX_DTD_MIC_BLK
 221    0x023E    //TX_ADPT_STRICT_L
 222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x1000    //TX_B_POST_FILT_ECHO_H
+225    0x01F4    //TX_RATIO_DT_L_TH_HIGH
+226    0x59D8    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+234    0x00C8    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -45837,10 +69681,10 @@
 250    0x0100    //TX_DELTA_THR_SN_EST_0
 251    0x0100    //TX_DELTA_THR_SN_EST_1
 252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
-254    0x0000    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+253    0x0000    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -45866,21 +69710,21 @@
 279    0x2000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0014    //TX_NS_LVL_CTRL_3
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0024    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
 285    0x0014    //TX_NS_LVL_CTRL_4
-286    0x0014    //TX_NS_LVL_CTRL_5
-287    0x0011    //TX_NS_LVL_CTRL_6
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000F    //TX_MIN_GAIN_S_0
-290    0x0010    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x0010    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
 297    0x6000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
@@ -45890,28 +69734,28 @@
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
-306    0x50C0    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
 310    0x09C4    //TX_GAIN0_NTH
 311    0x000A    //TX_MUSIC_MORENS
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
-314    0x5000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x4C00    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x7FFF    //TX_A_POST_FILT_S_1
+316    0x7FFF    //TX_A_POST_FILT_S_2
+317    0x7FFF    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x7FFF    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x4000    //TX_B_POST_FILT_5
+323    0x6000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
@@ -45919,19 +69763,19 @@
 332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
 333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
 334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x6000    //TX_B_LESSCUT_RTO_S_6
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7C00    //TX_LAMBDA_PFILT
-339    0x7D00    //TX_LAMBDA_PFILT_S_0
-340    0x7D00    //TX_LAMBDA_PFILT_S_1
-341    0x7D00    //TX_LAMBDA_PFILT_S_2
-342    0x7D00    //TX_LAMBDA_PFILT_S_3
-343    0x7D00    //TX_LAMBDA_PFILT_S_4
-344    0x7D00    //TX_LAMBDA_PFILT_S_5
-345    0x7D00    //TX_LAMBDA_PFILT_S_6
-346    0x7D00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7F00    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x3E80    //TX_K_PEPPER
 348    0x0400    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
@@ -45940,7 +69784,7 @@
 353    0x0040    //TX_DT_BINVAD_TH_0
 354    0x0040    //TX_DT_BINVAD_TH_1
 355    0x0100    //TX_DT_BINVAD_TH_2
-356    0x0100    //TX_DT_BINVAD_TH_3
+356    0x2000    //TX_DT_BINVAD_TH_3
 357    0x36B0    //TX_DT_BINVAD_ENDF
 358    0x0200    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
@@ -45956,18 +69800,18 @@
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
 371    0x01F4    //TX_NOISE_TH_2
-372    0x4E20    //TX_NOISE_TH_3
+372    0x36B0    //TX_NOISE_TH_3
 373    0x2710    //TX_NOISE_TH_4
-374    0x2710    //TX_NOISE_TH_5
+374    0x2CEC    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x0DAC    //TX_NOISE_TH_6
 379    0x0050    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -45975,17 +69819,17 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
+401    0x0005    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
@@ -46093,21 +69937,21 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -46136,37 +69980,37 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4850    //TX_FDEQ_GAIN_2
 570    0x5050    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x484A    //TX_FDEQ_GAIN_5
-573    0x4E5E    //TX_FDEQ_GAIN_6
-574    0x5850    //TX_FDEQ_GAIN_7
-575    0x5050    //TX_FDEQ_GAIN_8
-576    0x5050    //TX_FDEQ_GAIN_9
-577    0x5064    //TX_FDEQ_GAIN_10
-578    0x5C70    //TX_FDEQ_GAIN_11
-579    0x7088    //TX_FDEQ_GAIN_12
-580    0x8080    //TX_FDEQ_GAIN_13
-581    0x7474    //TX_FDEQ_GAIN_14
-582    0x8080    //TX_FDEQ_GAIN_15
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E5C    //TX_FDEQ_GAIN_6
+574    0x564E    //TX_FDEQ_GAIN_7
+575    0x4C4E    //TX_FDEQ_GAIN_8
+576    0x4E45    //TX_FDEQ_GAIN_9
+577    0x494A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x5C54    //TX_FDEQ_GAIN_12
+580    0x5466    //TX_FDEQ_GAIN_13
+581    0x5C70    //TX_FDEQ_GAIN_14
+582    0x7C84    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
@@ -46200,7 +70044,7 @@
 613    0x0000    //TX_FDEQ_BIN_22
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
 617    0x4848    //TX_PREEQ_GAIN_MIC0_0
 618    0x4848    //TX_PREEQ_GAIN_MIC0_1
 619    0x4848    //TX_PREEQ_GAIN_MIC0_2
@@ -46225,23 +70069,23 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
 647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0808    //TX_PREEQ_BIN_MIC0_7
-649    0x0808    //TX_PREEQ_BIN_MIC0_8
-650    0x0808    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0808    //TX_PREEQ_BIN_MIC0_11
-653    0x0808    //TX_PREEQ_BIN_MIC0_12
-654    0x0808    //TX_PREEQ_BIN_MIC0_13
-655    0x0808    //TX_PREEQ_BIN_MIC0_14
-656    0xF200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
 660    0x0000    //TX_PREEQ_BIN_MIC0_19
@@ -46250,23 +70094,23 @@
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
 665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4846    //TX_PREEQ_GAIN_MIC1_0
-667    0x4544    //TX_PREEQ_GAIN_MIC1_1
-668    0x4240    //TX_PREEQ_GAIN_MIC1_2
-669    0x3E3C    //TX_PREEQ_GAIN_MIC1_3
-670    0x3A38    //TX_PREEQ_GAIN_MIC1_4
-671    0x3635    //TX_PREEQ_GAIN_MIC1_5
-672    0x3330    //TX_PREEQ_GAIN_MIC1_6
-673    0x2E2A    //TX_PREEQ_GAIN_MIC1_7
-674    0x2625    //TX_PREEQ_GAIN_MIC1_8
-675    0x2421    //TX_PREEQ_GAIN_MIC1_9
-676    0x1D19    //TX_PREEQ_GAIN_MIC1_10
-677    0x1820    //TX_PREEQ_GAIN_MIC1_11
-678    0x2830    //TX_PREEQ_GAIN_MIC1_12
-679    0x303C    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
 685    0x4848    //TX_PREEQ_GAIN_MIC1_19
@@ -46274,23 +70118,23 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x251A    //TX_PREEQ_BIN_MIC1_0
-691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
-692    0x0C0C    //TX_PREEQ_BIN_MIC1_2
-693    0x0C0F    //TX_PREEQ_BIN_MIC1_3
-694    0x0F0F    //TX_PREEQ_BIN_MIC1_4
-695    0x0F09    //TX_PREEQ_BIN_MIC1_5
-696    0x0909    //TX_PREEQ_BIN_MIC1_6
-697    0x0908    //TX_PREEQ_BIN_MIC1_7
-698    0x070F    //TX_PREEQ_BIN_MIC1_8
-699    0x1F08    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0920    //TX_PREEQ_BIN_MIC1_11
-702    0x2020    //TX_PREEQ_BIN_MIC1_12
-703    0x2021    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -46305,16 +70149,16 @@
 718    0x4848    //TX_PREEQ_GAIN_MIC2_3
 719    0x4848    //TX_PREEQ_GAIN_MIC2_4
 720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
 731    0x4848    //TX_PREEQ_GAIN_MIC2_16
 732    0x4848    //TX_PREEQ_GAIN_MIC2_17
 733    0x4848    //TX_PREEQ_GAIN_MIC2_18
@@ -46323,22 +70167,22 @@
 736    0x4848    //TX_PREEQ_GAIN_MIC2_21
 737    0x4848    //TX_PREEQ_GAIN_MIC2_22
 738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
 744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0xF200    //TX_PREEQ_BIN_MIC2_15
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
 755    0x0000    //TX_PREEQ_BIN_MIC2_16
 756    0x0000    //TX_PREEQ_BIN_MIC2_17
 757    0x0000    //TX_PREEQ_BIN_MIC2_18
@@ -46350,17 +70194,17 @@
 763    0x0006    //TX_MASKING_ABILITY
 764    0x0800    //TX_NND_WEIGHT
 765    0x0050    //TX_MIC_CALIBRATION_0
-766    0x0056    //TX_MIC_CALIBRATION_1
+766    0x0065    //TX_MIC_CALIBRATION_1
 767    0x0050    //TX_MIC_CALIBRATION_2
 768    0x0050    //TX_MIC_CALIBRATION_3
 769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0042    //TX_MIC_PWR_BIAS_1
+770    0x0046    //TX_MIC_PWR_BIAS_1
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
+773    0x0000    //TX_GAIN_LIMIT_0
 774    0x000F    //TX_GAIN_LIMIT_1
 775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
+776    0x0000    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -46438,8 +70282,8 @@
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
 853    0x0002    //TX_FILTINDX
-854    0x0001    //TX_TDDRC_THRD_0
-855    0x0002    //TX_TDDRC_THRD_1
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0004    //TX_TDDRC_THRD_1
 856    0x1000    //TX_TDDRC_THRD_2
 857    0x1000    //TX_TDDRC_THRD_3
 858    0x6000    //TX_TDDRC_SLANT_0
@@ -46450,7 +70294,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0BE0    //TX_TDDRC_DRC_GAIN
+866    0x1380    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -46481,8 +70325,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x01C2    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7918    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x3A98    //TX_DTD_THR1_MICMUTE_2
+914    0x32C8    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0xE4A8    //TX_AMS_RESRV_02
+945    0x1770    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0040    //RX_RECVFUNC_MODE_0
+0    0x2040    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -46492,7 +70401,7 @@
 7    0x3000    //RX_TDDRC_ALPHA_UP_2
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0082    //RX_PGA
+10    0x050D    //RX_PGA
 11    0x7652    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -46507,7 +70416,7 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x0000    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0000    //RX_FENS_RESRV_1
 27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
@@ -46611,7 +70520,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x0080    //RX_MIN_G_FP
 128    0x2000    //RX_MAX_G_FP
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0010    //RX_MAXLEVEL_CNG
 132    0x0000    //RX_BWE_UV_TH
@@ -46736,7 +70645,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -46835,7 +70744,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -46934,7 +70843,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -47033,7 +70942,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -47132,7 +71041,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -47231,7 +71140,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -47330,12 +71239,864 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x2040    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x050D    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0000    //RX_PITCH_BFR_LEN
+174    0x0000    //RX_SBD_PITCH_DET
+175    0x0000    //RX_PP_RESRV_0
+176    0x0000    //RX_PP_RESRV_1
+177    0xF800    //RX_N_SN_EST
+178    0x0000    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0000    //RX_FENS_RESRV_1
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+187    0x0000    //RX_EXTRA_NS_L
+188    0x0000    //RX_EXTRA_NS_A
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x0000    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0003    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0010    //RX_MAXLEVEL_CNG
+289    0x0000    //RX_BWE_UV_TH
+290    0x0000    //RX_BWE_UV_TH2
+291    0x0000    //RX_BWE_UV_TH3
+292    0x0000    //RX_BWE_V_TH
+293    0x0000    //RX_BWE_GAIN1_V_TH1
+294    0x0000    //RX_BWE_GAIN1_V_TH2
+295    0x0000    //RX_BWE_UV_EQ
+296    0x0000    //RX_BWE_V_EQ
+297    0x0000    //RX_BWE_TONE_TH
+298    0x0000    //RX_BWE_UV_HOLD_T
+299    0x0000    //RX_BWE_GAIN2_ALPHA
+300    0x0000    //RX_BWE_GAIN3_ALPHA
+301    0x0000    //RX_BWE_CUTOFF
+302    0x0000    //RX_BWE_GAINFILL
+303    0x0000    //RX_BWE_MAXTH_TONE
+304    0x0000    //RX_BWE_EQ_0
+305    0x0000    //RX_BWE_EQ_1
+306    0x0000    //RX_BWE_EQ_2
+307    0x0000    //RX_BWE_EQ_3
+308    0x0000    //RX_BWE_EQ_4
+309    0x0000    //RX_BWE_EQ_5
+310    0x0000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_VCO-VOICE_GENERIC-FB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -47358,8 +72119,8 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0093    //TX_DIST2REF1
-22    0x001A    //TX_DIST2REF_02
+21    0x009D    //TX_DIST2REF1
+22    0x0010    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
@@ -47445,7 +72206,7 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
@@ -47574,8 +72335,8 @@
 234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
@@ -47588,11 +72349,11 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
 254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0100    //TX_DELTA_THR_SN_EST_5
+255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0200    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
@@ -47620,11 +72381,11 @@
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
 282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0016    //TX_NS_LVL_CTRL_4
-286    0x0014    //TX_NS_LVL_CTRL_5
-287    0x0011    //TX_NS_LVL_CTRL_6
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000F    //TX_MIN_GAIN_S_0
 290    0x0010    //TX_MIN_GAIN_S_1
@@ -47642,8 +72403,8 @@
 302    0x4000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x50C0    //TX_SNRI_SUP_6
+305    0x50C0    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
@@ -47652,19 +72413,19 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x5000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x4C00    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
+315    0x4C00    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
+323    0x2000    //TX_B_POST_FILT_1
 324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
+325    0x4000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
-327    0x4000    //TX_B_POST_FILT_5
+327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
@@ -47672,14 +72433,14 @@
 332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
 333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
 334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x6000    //TX_B_LESSCUT_RTO_S_6
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7C00    //TX_LAMBDA_PFILT
 339    0x7C00    //TX_LAMBDA_PFILT_S_0
 340    0x7C00    //TX_LAMBDA_PFILT_S_1
-341    0x7C00    //TX_LAMBDA_PFILT_S_2
-342    0x7A00    //TX_LAMBDA_PFILT_S_3
+341    0x7A00    //TX_LAMBDA_PFILT_S_2
+342    0x7C00    //TX_LAMBDA_PFILT_S_3
 343    0x7C00    //TX_LAMBDA_PFILT_S_4
 344    0x7C00    //TX_LAMBDA_PFILT_S_5
 345    0x7C00    //TX_LAMBDA_PFILT_S_6
@@ -47717,10 +72478,10 @@
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x2710    //TX_NOISE_TH_6
 379    0x0033    //TX_MINENOISE_TH
-380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
-381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
-382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -47728,15 +72489,15 @@
 388    0x0333    //TX_OUT_ENER_TH_SPEECH
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0800    //TX_MU_ARSP_EST
-396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_EXTRA_NS_A
-399    0x0005    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x4000    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
 401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
@@ -47851,16 +72612,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -47889,19 +72650,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -47909,14 +72670,14 @@
 569    0x4848    //TX_FDEQ_GAIN_2
 570    0x4848    //TX_FDEQ_GAIN_3
 571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
+572    0x5048    //TX_FDEQ_GAIN_5
 573    0x4848    //TX_FDEQ_GAIN_6
 574    0x4848    //TX_FDEQ_GAIN_7
 575    0x4848    //TX_FDEQ_GAIN_8
 576    0x4848    //TX_FDEQ_GAIN_9
 577    0x5B5B    //TX_FDEQ_GAIN_10
-578    0x7373    //TX_FDEQ_GAIN_11
-579    0x739A    //TX_FDEQ_GAIN_12
+578    0x737B    //TX_FDEQ_GAIN_11
+579    0x7B9A    //TX_FDEQ_GAIN_12
 580    0x9AC4    //TX_FDEQ_GAIN_13
 581    0xC4C4    //TX_FDEQ_GAIN_14
 582    0xC4C4    //TX_FDEQ_GAIN_15
@@ -47953,24 +72714,24 @@
 613    0x0000    //TX_FDEQ_BIN_22
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
 617    0x4848    //TX_PREEQ_GAIN_MIC0_0
 618    0x4848    //TX_PREEQ_GAIN_MIC0_1
 619    0x4848    //TX_PREEQ_GAIN_MIC0_2
 620    0x4848    //TX_PREEQ_GAIN_MIC0_3
 621    0x4848    //TX_PREEQ_GAIN_MIC0_4
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+623    0x4849    //TX_PREEQ_GAIN_MIC0_6
+624    0x4A4B    //TX_PREEQ_GAIN_MIC0_7
+625    0x4C4B    //TX_PREEQ_GAIN_MIC0_8
+626    0x4A48    //TX_PREEQ_GAIN_MIC0_9
+627    0x4B4C    //TX_PREEQ_GAIN_MIC0_10
+628    0x4C4B    //TX_PREEQ_GAIN_MIC0_11
+629    0x4838    //TX_PREEQ_GAIN_MIC0_12
+630    0x3858    //TX_PREEQ_GAIN_MIC0_13
+631    0x7060    //TX_PREEQ_GAIN_MIC0_14
+632    0x9870    //TX_PREEQ_GAIN_MIC0_15
+633    0x5848    //TX_PREEQ_GAIN_MIC0_16
 634    0x4848    //TX_PREEQ_GAIN_MIC0_17
 635    0x4848    //TX_PREEQ_GAIN_MIC0_18
 636    0x4848    //TX_PREEQ_GAIN_MIC0_19
@@ -47978,23 +72739,23 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x4000    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
 660    0x0000    //TX_PREEQ_BIN_MIC0_19
@@ -48003,21 +72764,21 @@
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
 665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4846    //TX_PREEQ_GAIN_MIC1_0
-667    0x4544    //TX_PREEQ_GAIN_MIC1_1
-668    0x4240    //TX_PREEQ_GAIN_MIC1_2
-669    0x3E3C    //TX_PREEQ_GAIN_MIC1_3
-670    0x3A38    //TX_PREEQ_GAIN_MIC1_4
-671    0x3635    //TX_PREEQ_GAIN_MIC1_5
-672    0x3330    //TX_PREEQ_GAIN_MIC1_6
-673    0x2E2A    //TX_PREEQ_GAIN_MIC1_7
-674    0x2625    //TX_PREEQ_GAIN_MIC1_8
-675    0x2421    //TX_PREEQ_GAIN_MIC1_9
-676    0x1D19    //TX_PREEQ_GAIN_MIC1_10
-677    0x1820    //TX_PREEQ_GAIN_MIC1_11
-678    0x2830    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4645    //TX_PREEQ_GAIN_MIC1_6
+673    0x4442    //TX_PREEQ_GAIN_MIC1_7
+674    0x4140    //TX_PREEQ_GAIN_MIC1_8
+675    0x3E3D    //TX_PREEQ_GAIN_MIC1_9
+676    0x3C3C    //TX_PREEQ_GAIN_MIC1_10
+677    0x3C3C    //TX_PREEQ_GAIN_MIC1_11
+678    0x3938    //TX_PREEQ_GAIN_MIC1_12
+679    0x3A3C    //TX_PREEQ_GAIN_MIC1_13
+680    0x3C3E    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
@@ -48027,23 +72788,23 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x1812    //TX_PREEQ_BIN_MIC1_0
-691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x080A    //TX_PREEQ_BIN_MIC1_3
-694    0x0B09    //TX_PREEQ_BIN_MIC1_4
-695    0x0A06    //TX_PREEQ_BIN_MIC1_5
-696    0x0606    //TX_PREEQ_BIN_MIC1_6
-697    0x0605    //TX_PREEQ_BIN_MIC1_7
-698    0x050A    //TX_PREEQ_BIN_MIC1_8
-699    0x1505    //TX_PREEQ_BIN_MIC1_9
-700    0x0506    //TX_PREEQ_BIN_MIC1_10
-701    0x0615    //TX_PREEQ_BIN_MIC1_11
-702    0x1516    //TX_PREEQ_BIN_MIC1_12
-703    0x2021    //TX_PREEQ_BIN_MIC1_13
-704    0x2021    //TX_PREEQ_BIN_MIC1_14
-705    0x2021    //TX_PREEQ_BIN_MIC1_15
-706    0x0800    //TX_PREEQ_BIN_MIC1_16
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x4000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -48203,7 +72964,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0CE6    //TX_TDDRC_DRC_GAIN
+866    0x0FDA    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -48234,8 +72995,73 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0040    //RX_RECVFUNC_MODE_0
+0    0x2040    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -48245,7 +73071,7 @@
 7    0x3000    //RX_TDDRC_ALPHA_UP_2
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0082    //RX_PGA
+10    0x050D    //RX_PGA
 11    0x7652    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -48260,7 +73086,7 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x0000    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0000    //RX_FENS_RESRV_1
 27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
@@ -48364,7 +73190,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x0080    //RX_MIN_G_FP
 128    0x2000    //RX_MAX_G_FP
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0010    //RX_MAXLEVEL_CNG
 132    0x0000    //RX_BWE_UV_TH
@@ -48489,7 +73315,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -48588,7 +73414,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -48687,7 +73513,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -48786,7 +73612,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -48885,7 +73711,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -48984,7 +73810,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -49083,12 +73909,864 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x2040    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x050D    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0000    //RX_PITCH_BFR_LEN
+174    0x0000    //RX_SBD_PITCH_DET
+175    0x0000    //RX_PP_RESRV_0
+176    0x0000    //RX_PP_RESRV_1
+177    0xF800    //RX_N_SN_EST
+178    0x0000    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0000    //RX_FENS_RESRV_1
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+187    0x0000    //RX_EXTRA_NS_L
+188    0x0000    //RX_EXTRA_NS_A
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x0000    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0003    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0010    //RX_MAXLEVEL_CNG
+289    0x0000    //RX_BWE_UV_TH
+290    0x0000    //RX_BWE_UV_TH2
+291    0x0000    //RX_BWE_UV_TH3
+292    0x0000    //RX_BWE_V_TH
+293    0x0000    //RX_BWE_GAIN1_V_TH1
+294    0x0000    //RX_BWE_GAIN1_V_TH2
+295    0x0000    //RX_BWE_UV_EQ
+296    0x0000    //RX_BWE_V_EQ
+297    0x0000    //RX_BWE_TONE_TH
+298    0x0000    //RX_BWE_UV_HOLD_T
+299    0x0000    //RX_BWE_GAIN2_ALPHA
+300    0x0000    //RX_BWE_GAIN3_ALPHA
+301    0x0000    //RX_BWE_CUTOFF
+302    0x0000    //RX_BWE_GAINFILL
+303    0x0000    //RX_BWE_MAXTH_TONE
+304    0x0000    //RX_BWE_EQ_0
+305    0x0000    //RX_BWE_EQ_1
+306    0x0000    //RX_BWE_EQ_2
+307    0x0000    //RX_BWE_EQ_3
+308    0x0000    //RX_BWE_EQ_4
+309    0x0000    //RX_BWE_EQ_5
+310    0x0000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_FULL-VOICE_GENERIC-NB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -49117,7 +74795,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x01B1    //TX_PGA_0
+27    0x0302    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -49209,10 +74887,10 @@
 116    0x7FFF    //TX_BRMIC_BLKFACTOR
 117    0x000A    //TX_MICBLK_START_BIN
 118    0x0041    //TX_MICBLK_END_BIN
-119    0x0000    //TX_MICBLK_FE_HOLD
+119    0x0015    //TX_MICBLK_FE_HOLD
 120    0xFFF2    //TX_MICBLK_MR_EXP_TH
 121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
+122    0x0015    //TX_FENE_HOLD
 123    0x0000    //TX_FE_ENER_TH_MTS
 124    0x0000    //TX_FE_ENER_TH_EXP
 125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
@@ -49279,7 +74957,7 @@
 186    0x0000    //TX_MU0_PTD_FRQ_AEC
 187    0x0000    //TX_MINENOISETH
 188    0x0000    //TX_MU0_RE_EST
-189    0x0000    //TX_AEC_NUM_CH
+189    0x0001    //TX_AEC_NUM_CH
 190    0x0000    //TX_BIGECHOATTENUATION_MAX
 191    0x0000    //TX_A_POST_FLT_MICBLK
 192    0x0000    //TX_BLKENERTH
@@ -49332,7 +75010,7 @@
 239    0x0000    //TX_DT_RESRV_7
 240    0x0000    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xF200    //TX_THR_SN_EST_0
+242    0xFA00    //TX_THR_SN_EST_0
 243    0xF400    //TX_THR_SN_EST_1
 244    0xF800    //TX_THR_SN_EST_2
 245    0xF600    //TX_THR_SN_EST_3
@@ -49341,12 +75019,12 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0100    //TX_DELTA_THR_SN_EST_1
 252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -49372,12 +75050,12 @@
 279    0x0000    //TX_B_POST_FLT_0
 280    0x0000    //TX_B_POST_FLT_1
 281    0x001A    //TX_NS_LVL_CTRL_0
-282    0x001A    //TX_NS_LVL_CTRL_1
+282    0x0014    //TX_NS_LVL_CTRL_1
 283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0014    //TX_NS_LVL_CTRL_3
+284    0x000C    //TX_NS_LVL_CTRL_3
 285    0x000C    //TX_NS_LVL_CTRL_4
 286    0x000C    //TX_NS_LVL_CTRL_5
-287    0x000C    //TX_NS_LVL_CTRL_6
+287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x000C    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
 290    0x0014    //TX_MIN_GAIN_S_1
@@ -49393,10 +75071,10 @@
 300    0x7FFF    //TX_SNRI_SUP_0
 301    0x7FFF    //TX_SNRI_SUP_1
 302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
+303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x7FFF    //TX_SNRI_SUP_6
 307    0x4000    //TX_SNRI_SUP_7
 308    0x1200    //TX_THR_LFNS
 309    0x0147    //TX_G_LFNS
@@ -49405,12 +75083,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x7FFF    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x199A    //TX_A_POST_FILT_S_1
+315    0x1000    //TX_A_POST_FILT_S_1
 316    0x1000    //TX_A_POST_FILT_S_2
-317    0x1000    //TX_A_POST_FILT_S_3
+317    0x6666    //TX_A_POST_FILT_S_3
 318    0x6666    //TX_A_POST_FILT_S_4
 319    0x6666    //TX_A_POST_FILT_S_5
-320    0x6666    //TX_A_POST_FILT_S_6
+320    0x199A    //TX_A_POST_FILT_S_6
 321    0x6666    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
 323    0x2000    //TX_B_POST_FILT_1
@@ -49457,7 +75135,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x05A0    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
+367    0x003B    //TX_NOISE_TH_0
 368    0x1388    //TX_NOISE_TH_0_2
 369    0x3A98    //TX_NOISE_TH_0_3
 370    0x0C80    //TX_NOISE_TH_1
@@ -49469,11 +75147,11 @@
 376    0x7FFF    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x00C8    //TX_NOISE_TH_6
-379    0x000A    //TX_MINENOISE_TH
-380    0x0000    //TX_MINENOISE_MIC0_TH_MTS
-381    0x0000    //TX_MINENOISE_MIC0_TH_EXP
-382    0x0000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0x0000    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x00C8    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
 385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x6400    //TX_OUT_ENER_S_TH_NOISY
@@ -49481,22 +75159,22 @@
 388    0x7D00    //TX_OUT_ENER_TH_SPEECH
 389    0x0000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0000    //TX_MU_ARSP_EST
-396    0x0000    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0000    //TX_EXTRA_NS_L
-398    0x0000    //TX_EXTRA_NS_A
-399    0x0000    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0000    //TX_MIN_G_LOW300HZ
 401    0x0010    //TX_MAXLEVEL_CNG
 402    0x0000    //TX_STN_NOISE_TH
 403    0x0000    //TX_POST_MASK_SUP
 404    0x0000    //TX_POST_MASK_ADJUST
 405    0x0014    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x0032    //TX_MINENOISE_MIC0_TH
 407    0x0226    //TX_MINENOISE_MIC0_S_TH
 408    0x2879    //TX_MIN_G_CTRL_SSNS
 409    0x0400    //TX_METAL_RTO_THR
@@ -49604,16 +75282,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x6666    //TX_MICTOBFGAIN0
 513    0x0014    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -49642,19 +75320,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0000    //TX_BF_LESSCUT_BBIN
-554    0x0000    //TX_BF_LESSCUT_EBIN
-555    0x0000    //TX_POSTBFB0
-556    0x0000    //TX_POSTBFB
-557    0x0000    //TX_POSTBFE
-558    0x0000    //TX_SPEECH_SNR_TH
-559    0x0000    //TX_PB_MAX_PRI_SNR_TH
-560    0x0000    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -49979,16 +75657,81 @@
 886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
 888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xD99A    //TX_FASTNS_MASK5_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0040    //RX_RECVFUNC_MODE_0
+0    0x2040    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -49998,7 +75741,7 @@
 7    0x3000    //RX_TDDRC_ALPHA_UP_2
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0203    //RX_PGA
+10    0x050D    //RX_PGA
 11    0x7652    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -50013,7 +75756,7 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x0000    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0000    //RX_FENS_RESRV_1
 27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
@@ -50117,7 +75860,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x0080    //RX_MIN_G_FP
 128    0x2000    //RX_MAX_G_FP
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0010    //RX_MAXLEVEL_CNG
 132    0x0000    //RX_BWE_UV_TH
@@ -50242,7 +75985,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -50341,7 +76084,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -50440,7 +76183,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -50539,7 +76282,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -50638,7 +76381,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -50737,7 +76480,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -50836,12 +76579,864 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x2040    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x050D    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0000    //RX_PITCH_BFR_LEN
+174    0x0000    //RX_SBD_PITCH_DET
+175    0x0000    //RX_PP_RESRV_0
+176    0x0000    //RX_PP_RESRV_1
+177    0xF800    //RX_N_SN_EST
+178    0x0000    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0000    //RX_FENS_RESRV_1
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+187    0x0000    //RX_EXTRA_NS_L
+188    0x0000    //RX_EXTRA_NS_A
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x0000    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0003    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0010    //RX_MAXLEVEL_CNG
+289    0x0000    //RX_BWE_UV_TH
+290    0x0000    //RX_BWE_UV_TH2
+291    0x0000    //RX_BWE_UV_TH3
+292    0x0000    //RX_BWE_V_TH
+293    0x0000    //RX_BWE_GAIN1_V_TH1
+294    0x0000    //RX_BWE_GAIN1_V_TH2
+295    0x0000    //RX_BWE_UV_EQ
+296    0x0000    //RX_BWE_V_EQ
+297    0x0000    //RX_BWE_TONE_TH
+298    0x0000    //RX_BWE_UV_HOLD_T
+299    0x0000    //RX_BWE_GAIN2_ALPHA
+300    0x0000    //RX_BWE_GAIN3_ALPHA
+301    0x0000    //RX_BWE_CUTOFF
+302    0x0000    //RX_BWE_GAINFILL
+303    0x0000    //RX_BWE_MAXTH_TONE
+304    0x0000    //RX_BWE_EQ_0
+305    0x0000    //RX_BWE_EQ_1
+306    0x0000    //RX_BWE_EQ_2
+307    0x0000    //RX_BWE_EQ_3
+308    0x0000    //RX_BWE_EQ_4
+309    0x0000    //RX_BWE_EQ_5
+310    0x0000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_FULL-VOICE_GENERIC-WB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -50870,7 +77465,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x01B1    //TX_PGA_0
+27    0x0302    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -50962,10 +77557,10 @@
 116    0x7FFF    //TX_BRMIC_BLKFACTOR
 117    0x000A    //TX_MICBLK_START_BIN
 118    0x0041    //TX_MICBLK_END_BIN
-119    0x0000    //TX_MICBLK_FE_HOLD
+119    0x0015    //TX_MICBLK_FE_HOLD
 120    0xFFF2    //TX_MICBLK_MR_EXP_TH
 121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
+122    0x0015    //TX_FENE_HOLD
 123    0x0000    //TX_FE_ENER_TH_MTS
 124    0x0000    //TX_FE_ENER_TH_EXP
 125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
@@ -51032,7 +77627,7 @@
 186    0x0000    //TX_MU0_PTD_FRQ_AEC
 187    0x0000    //TX_MINENOISETH
 188    0x0000    //TX_MU0_RE_EST
-189    0x0000    //TX_AEC_NUM_CH
+189    0x0001    //TX_AEC_NUM_CH
 190    0x0000    //TX_BIGECHOATTENUATION_MAX
 191    0x0000    //TX_A_POST_FLT_MICBLK
 192    0x0000    //TX_BLKENERTH
@@ -51085,7 +77680,7 @@
 239    0x0000    //TX_DT_RESRV_7
 240    0x0000    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xF200    //TX_THR_SN_EST_0
+242    0xFA00    //TX_THR_SN_EST_0
 243    0xF400    //TX_THR_SN_EST_1
 244    0xF800    //TX_THR_SN_EST_2
 245    0xF600    //TX_THR_SN_EST_3
@@ -51094,12 +77689,12 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0100    //TX_DELTA_THR_SN_EST_1
 252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -51125,12 +77720,12 @@
 279    0x0000    //TX_B_POST_FLT_0
 280    0x0000    //TX_B_POST_FLT_1
 281    0x001A    //TX_NS_LVL_CTRL_0
-282    0x001A    //TX_NS_LVL_CTRL_1
+282    0x0014    //TX_NS_LVL_CTRL_1
 283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0014    //TX_NS_LVL_CTRL_3
+284    0x000C    //TX_NS_LVL_CTRL_3
 285    0x000C    //TX_NS_LVL_CTRL_4
 286    0x000C    //TX_NS_LVL_CTRL_5
-287    0x000C    //TX_NS_LVL_CTRL_6
+287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x000C    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
 290    0x0014    //TX_MIN_GAIN_S_1
@@ -51146,10 +77741,10 @@
 300    0x7FFF    //TX_SNRI_SUP_0
 301    0x7FFF    //TX_SNRI_SUP_1
 302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
+303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x7FFF    //TX_SNRI_SUP_6
 307    0x4000    //TX_SNRI_SUP_7
 308    0x1200    //TX_THR_LFNS
 309    0x0147    //TX_G_LFNS
@@ -51158,12 +77753,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x7FFF    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x199A    //TX_A_POST_FILT_S_1
+315    0x1000    //TX_A_POST_FILT_S_1
 316    0x1000    //TX_A_POST_FILT_S_2
-317    0x1000    //TX_A_POST_FILT_S_3
+317    0x6666    //TX_A_POST_FILT_S_3
 318    0x6666    //TX_A_POST_FILT_S_4
 319    0x6666    //TX_A_POST_FILT_S_5
-320    0x6666    //TX_A_POST_FILT_S_6
+320    0x199A    //TX_A_POST_FILT_S_6
 321    0x6666    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
 323    0x2000    //TX_B_POST_FILT_1
@@ -51210,7 +77805,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x05A0    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
+367    0x0102    //TX_NOISE_TH_0
 368    0x1388    //TX_NOISE_TH_0_2
 369    0x3A98    //TX_NOISE_TH_0_3
 370    0x0C80    //TX_NOISE_TH_1
@@ -51222,11 +77817,11 @@
 376    0x7FFF    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x00C8    //TX_NOISE_TH_6
-379    0x000A    //TX_MINENOISE_TH
-380    0x0000    //TX_MINENOISE_MIC0_TH_MTS
-381    0x0000    //TX_MINENOISE_MIC0_TH_EXP
-382    0x0000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0x0000    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x00F8    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
 385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x6400    //TX_OUT_ENER_S_TH_NOISY
@@ -51234,22 +77829,22 @@
 388    0x7D00    //TX_OUT_ENER_TH_SPEECH
 389    0x0000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0000    //TX_MU_ARSP_EST
-396    0x0000    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0000    //TX_EXTRA_NS_L
-398    0x0000    //TX_EXTRA_NS_A
-399    0x0000    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0000    //TX_MIN_G_LOW300HZ
 401    0x0010    //TX_MAXLEVEL_CNG
 402    0x0000    //TX_STN_NOISE_TH
 403    0x0000    //TX_POST_MASK_SUP
 404    0x0000    //TX_POST_MASK_ADJUST
 405    0x0014    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x00DC    //TX_MINENOISE_MIC0_TH
 407    0x0226    //TX_MINENOISE_MIC0_S_TH
 408    0x2879    //TX_MIN_G_CTRL_SSNS
 409    0x0400    //TX_METAL_RTO_THR
@@ -51357,16 +77952,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x6666    //TX_MICTOBFGAIN0
 513    0x0014    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -51395,19 +77990,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0000    //TX_BF_LESSCUT_BBIN
-554    0x0000    //TX_BF_LESSCUT_EBIN
-555    0x0000    //TX_POSTBFB0
-556    0x0000    //TX_POSTBFB
-557    0x0000    //TX_POSTBFE
-558    0x0000    //TX_SPEECH_SNR_TH
-559    0x0000    //TX_PB_MAX_PRI_SNR_TH
-560    0x0000    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -51732,16 +78327,81 @@
 886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
 888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xD99A    //TX_FASTNS_MASK5_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0040    //RX_RECVFUNC_MODE_0
+0    0x2040    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -51751,7 +78411,7 @@
 7    0x3000    //RX_TDDRC_ALPHA_UP_2
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0203    //RX_PGA
+10    0x050D    //RX_PGA
 11    0x7652    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -51766,7 +78426,7 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x0000    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0000    //RX_FENS_RESRV_1
 27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
@@ -51870,7 +78530,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x0080    //RX_MIN_G_FP
 128    0x2000    //RX_MAX_G_FP
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0010    //RX_MAXLEVEL_CNG
 132    0x0000    //RX_BWE_UV_TH
@@ -51995,7 +78655,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -52094,7 +78754,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -52193,7 +78853,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -52292,7 +78952,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -52391,7 +79051,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -52490,7 +79150,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -52589,12 +79249,864 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x2040    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x050D    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0000    //RX_PITCH_BFR_LEN
+174    0x0000    //RX_SBD_PITCH_DET
+175    0x0000    //RX_PP_RESRV_0
+176    0x0000    //RX_PP_RESRV_1
+177    0xF800    //RX_N_SN_EST
+178    0x0000    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0000    //RX_FENS_RESRV_1
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+187    0x0000    //RX_EXTRA_NS_L
+188    0x0000    //RX_EXTRA_NS_A
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x0000    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0003    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0010    //RX_MAXLEVEL_CNG
+289    0x0000    //RX_BWE_UV_TH
+290    0x0000    //RX_BWE_UV_TH2
+291    0x0000    //RX_BWE_UV_TH3
+292    0x0000    //RX_BWE_V_TH
+293    0x0000    //RX_BWE_GAIN1_V_TH1
+294    0x0000    //RX_BWE_GAIN1_V_TH2
+295    0x0000    //RX_BWE_UV_EQ
+296    0x0000    //RX_BWE_V_EQ
+297    0x0000    //RX_BWE_TONE_TH
+298    0x0000    //RX_BWE_UV_HOLD_T
+299    0x0000    //RX_BWE_GAIN2_ALPHA
+300    0x0000    //RX_BWE_GAIN3_ALPHA
+301    0x0000    //RX_BWE_CUTOFF
+302    0x0000    //RX_BWE_GAINFILL
+303    0x0000    //RX_BWE_MAXTH_TONE
+304    0x0000    //RX_BWE_EQ_0
+305    0x0000    //RX_BWE_EQ_1
+306    0x0000    //RX_BWE_EQ_2
+307    0x0000    //RX_BWE_EQ_3
+308    0x0000    //RX_BWE_EQ_4
+309    0x0000    //RX_BWE_EQ_5
+310    0x0000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_FULL-VOICE_GENERIC-SWB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -52623,7 +80135,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x01B1    //TX_PGA_0
+27    0x0302    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -52715,10 +80227,10 @@
 116    0x7FFF    //TX_BRMIC_BLKFACTOR
 117    0x000A    //TX_MICBLK_START_BIN
 118    0x0041    //TX_MICBLK_END_BIN
-119    0x0000    //TX_MICBLK_FE_HOLD
+119    0x0015    //TX_MICBLK_FE_HOLD
 120    0xFFF2    //TX_MICBLK_MR_EXP_TH
 121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
+122    0x0015    //TX_FENE_HOLD
 123    0x0000    //TX_FE_ENER_TH_MTS
 124    0x0000    //TX_FE_ENER_TH_EXP
 125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
@@ -52785,7 +80297,7 @@
 186    0x0000    //TX_MU0_PTD_FRQ_AEC
 187    0x0000    //TX_MINENOISETH
 188    0x0000    //TX_MU0_RE_EST
-189    0x0000    //TX_AEC_NUM_CH
+189    0x0001    //TX_AEC_NUM_CH
 190    0x0000    //TX_BIGECHOATTENUATION_MAX
 191    0x0000    //TX_A_POST_FLT_MICBLK
 192    0x0000    //TX_BLKENERTH
@@ -52838,7 +80350,7 @@
 239    0x0000    //TX_DT_RESRV_7
 240    0x0000    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xF200    //TX_THR_SN_EST_0
+242    0xFA00    //TX_THR_SN_EST_0
 243    0xF400    //TX_THR_SN_EST_1
 244    0xF800    //TX_THR_SN_EST_2
 245    0xF600    //TX_THR_SN_EST_3
@@ -52847,12 +80359,12 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0100    //TX_DELTA_THR_SN_EST_1
 252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -52878,12 +80390,12 @@
 279    0x0000    //TX_B_POST_FLT_0
 280    0x0000    //TX_B_POST_FLT_1
 281    0x001A    //TX_NS_LVL_CTRL_0
-282    0x001A    //TX_NS_LVL_CTRL_1
+282    0x0014    //TX_NS_LVL_CTRL_1
 283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0014    //TX_NS_LVL_CTRL_3
+284    0x000C    //TX_NS_LVL_CTRL_3
 285    0x000C    //TX_NS_LVL_CTRL_4
 286    0x000C    //TX_NS_LVL_CTRL_5
-287    0x000C    //TX_NS_LVL_CTRL_6
+287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x000C    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
 290    0x0014    //TX_MIN_GAIN_S_1
@@ -52899,10 +80411,10 @@
 300    0x7FFF    //TX_SNRI_SUP_0
 301    0x7FFF    //TX_SNRI_SUP_1
 302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
+303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x7FFF    //TX_SNRI_SUP_6
 307    0x4000    //TX_SNRI_SUP_7
 308    0x1200    //TX_THR_LFNS
 309    0x0147    //TX_G_LFNS
@@ -52911,12 +80423,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x7FFF    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x199A    //TX_A_POST_FILT_S_1
+315    0x1000    //TX_A_POST_FILT_S_1
 316    0x1000    //TX_A_POST_FILT_S_2
-317    0x1000    //TX_A_POST_FILT_S_3
+317    0x6666    //TX_A_POST_FILT_S_3
 318    0x6666    //TX_A_POST_FILT_S_4
 319    0x6666    //TX_A_POST_FILT_S_5
-320    0x6666    //TX_A_POST_FILT_S_6
+320    0x199A    //TX_A_POST_FILT_S_6
 321    0x6666    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
 323    0x2000    //TX_B_POST_FILT_1
@@ -52963,7 +80475,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x05A0    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
+367    0x0383    //TX_NOISE_TH_0
 368    0x1388    //TX_NOISE_TH_0_2
 369    0x3A98    //TX_NOISE_TH_0_3
 370    0x0C80    //TX_NOISE_TH_1
@@ -52975,11 +80487,11 @@
 376    0x7FFF    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x00C8    //TX_NOISE_TH_6
-379    0x000A    //TX_MINENOISE_TH
-380    0x0000    //TX_MINENOISE_MIC0_TH_MTS
-381    0x0000    //TX_MINENOISE_MIC0_TH_EXP
-382    0x0000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0x0000    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
 384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
 385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x6400    //TX_OUT_ENER_S_TH_NOISY
@@ -52987,22 +80499,22 @@
 388    0x7D00    //TX_OUT_ENER_TH_SPEECH
 389    0x0000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0000    //TX_MU_ARSP_EST
-396    0x0000    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0000    //TX_EXTRA_NS_L
-398    0x0000    //TX_EXTRA_NS_A
-399    0x0000    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0000    //TX_MIN_G_LOW300HZ
 401    0x0010    //TX_MAXLEVEL_CNG
 402    0x0000    //TX_STN_NOISE_TH
 403    0x0000    //TX_POST_MASK_SUP
 404    0x0000    //TX_POST_MASK_ADJUST
 405    0x0014    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x02F3    //TX_MINENOISE_MIC0_TH
 407    0x0226    //TX_MINENOISE_MIC0_S_TH
 408    0x2879    //TX_MIN_G_CTRL_SSNS
 409    0x0400    //TX_METAL_RTO_THR
@@ -53110,16 +80622,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x6666    //TX_MICTOBFGAIN0
 513    0x0014    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -53148,19 +80660,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0000    //TX_BF_LESSCUT_BBIN
-554    0x0000    //TX_BF_LESSCUT_EBIN
-555    0x0000    //TX_POSTBFB0
-556    0x0000    //TX_POSTBFB
-557    0x0000    //TX_POSTBFE
-558    0x0000    //TX_SPEECH_SNR_TH
-559    0x0000    //TX_PB_MAX_PRI_SNR_TH
-560    0x0000    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -53485,16 +80997,81 @@
 886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
 888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xD99A    //TX_FASTNS_MASK5_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
 890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0040    //RX_RECVFUNC_MODE_0
+0    0x2040    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -53504,7 +81081,7 @@
 7    0x3000    //RX_TDDRC_ALPHA_UP_2
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0082    //RX_PGA
+10    0x050D    //RX_PGA
 11    0x7652    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -53519,7 +81096,7 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x0000    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0000    //RX_FENS_RESRV_1
 27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
@@ -53623,7 +81200,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x0080    //RX_MIN_G_FP
 128    0x2000    //RX_MAX_G_FP
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0010    //RX_MAXLEVEL_CNG
 132    0x0000    //RX_BWE_UV_TH
@@ -53748,7 +81325,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -53847,7 +81424,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -53946,7 +81523,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -54045,7 +81622,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -54144,7 +81721,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -54243,7 +81820,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -54342,12 +81919,864 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x2040    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x050D    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0000    //RX_PITCH_BFR_LEN
+174    0x0000    //RX_SBD_PITCH_DET
+175    0x0000    //RX_PP_RESRV_0
+176    0x0000    //RX_PP_RESRV_1
+177    0xF800    //RX_N_SN_EST
+178    0x0000    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0000    //RX_FENS_RESRV_1
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+187    0x0000    //RX_EXTRA_NS_L
+188    0x0000    //RX_EXTRA_NS_A
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x0000    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0003    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0010    //RX_MAXLEVEL_CNG
+289    0x0000    //RX_BWE_UV_TH
+290    0x0000    //RX_BWE_UV_TH2
+291    0x0000    //RX_BWE_UV_TH3
+292    0x0000    //RX_BWE_V_TH
+293    0x0000    //RX_BWE_GAIN1_V_TH1
+294    0x0000    //RX_BWE_GAIN1_V_TH2
+295    0x0000    //RX_BWE_UV_EQ
+296    0x0000    //RX_BWE_V_EQ
+297    0x0000    //RX_BWE_TONE_TH
+298    0x0000    //RX_BWE_UV_HOLD_T
+299    0x0000    //RX_BWE_GAIN2_ALPHA
+300    0x0000    //RX_BWE_GAIN3_ALPHA
+301    0x0000    //RX_BWE_CUTOFF
+302    0x0000    //RX_BWE_GAINFILL
+303    0x0000    //RX_BWE_MAXTH_TONE
+304    0x0000    //RX_BWE_EQ_0
+305    0x0000    //RX_BWE_EQ_1
+306    0x0000    //RX_BWE_EQ_2
+307    0x0000    //RX_BWE_EQ_3
+308    0x0000    //RX_BWE_EQ_4
+309    0x0000    //RX_BWE_EQ_5
+310    0x0000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_FULL-VOICE_GENERIC-FB
-#PARAM_TYPE  TX+RX
-#TOTAL_CUSTOM_STEP  7
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -54376,7 +82805,7 @@
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x01B1    //TX_PGA_0
+27    0x0302    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
@@ -54468,10 +82897,10 @@
 116    0x7FFF    //TX_BRMIC_BLKFACTOR
 117    0x000A    //TX_MICBLK_START_BIN
 118    0x0041    //TX_MICBLK_END_BIN
-119    0x0000    //TX_MICBLK_FE_HOLD
+119    0x0015    //TX_MICBLK_FE_HOLD
 120    0xFFF2    //TX_MICBLK_MR_EXP_TH
 121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
+122    0x0015    //TX_FENE_HOLD
 123    0x0000    //TX_FE_ENER_TH_MTS
 124    0x0000    //TX_FE_ENER_TH_EXP
 125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
@@ -54538,7 +82967,7 @@
 186    0x0000    //TX_MU0_PTD_FRQ_AEC
 187    0x0000    //TX_MINENOISETH
 188    0x0000    //TX_MU0_RE_EST
-189    0x0000    //TX_AEC_NUM_CH
+189    0x0001    //TX_AEC_NUM_CH
 190    0x0000    //TX_BIGECHOATTENUATION_MAX
 191    0x0000    //TX_A_POST_FLT_MICBLK
 192    0x0000    //TX_BLKENERTH
@@ -54591,7 +83020,7 @@
 239    0x0000    //TX_DT_RESRV_7
 240    0x0000    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xF200    //TX_THR_SN_EST_0
+242    0xF700    //TX_THR_SN_EST_0
 243    0xF400    //TX_THR_SN_EST_1
 244    0xF800    //TX_THR_SN_EST_2
 245    0xF600    //TX_THR_SN_EST_3
@@ -54600,12 +83029,12 @@
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
+251    0x0100    //TX_DELTA_THR_SN_EST_1
 252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -54631,12 +83060,12 @@
 279    0x0000    //TX_B_POST_FLT_0
 280    0x0000    //TX_B_POST_FLT_1
 281    0x001A    //TX_NS_LVL_CTRL_0
-282    0x001A    //TX_NS_LVL_CTRL_1
+282    0x0014    //TX_NS_LVL_CTRL_1
 283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x0014    //TX_NS_LVL_CTRL_3
+284    0x000C    //TX_NS_LVL_CTRL_3
 285    0x000C    //TX_NS_LVL_CTRL_4
 286    0x000C    //TX_NS_LVL_CTRL_5
-287    0x000C    //TX_NS_LVL_CTRL_6
+287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x000C    //TX_NS_LVL_CTRL_7
 289    0x000E    //TX_MIN_GAIN_S_0
 290    0x0014    //TX_MIN_GAIN_S_1
@@ -54652,10 +83081,10 @@
 300    0x7FFF    //TX_SNRI_SUP_0
 301    0x7FFF    //TX_SNRI_SUP_1
 302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
+303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x7FFF    //TX_SNRI_SUP_6
 307    0x4000    //TX_SNRI_SUP_7
 308    0x1200    //TX_THR_LFNS
 309    0x0147    //TX_G_LFNS
@@ -54664,12 +83093,12 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x7FFF    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x199A    //TX_A_POST_FILT_S_1
+315    0x1000    //TX_A_POST_FILT_S_1
 316    0x1000    //TX_A_POST_FILT_S_2
-317    0x1000    //TX_A_POST_FILT_S_3
+317    0x6666    //TX_A_POST_FILT_S_3
 318    0x6666    //TX_A_POST_FILT_S_4
 319    0x6666    //TX_A_POST_FILT_S_5
-320    0x6666    //TX_A_POST_FILT_S_6
+320    0x199A    //TX_A_POST_FILT_S_6
 321    0x6666    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
 323    0x2000    //TX_B_POST_FILT_1
@@ -54716,7 +83145,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x05A0    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
+367    0x04E8    //TX_NOISE_TH_0
 368    0x1388    //TX_NOISE_TH_0_2
 369    0x3A98    //TX_NOISE_TH_0_3
 370    0x0C80    //TX_NOISE_TH_1
@@ -54728,11 +83157,11 @@
 376    0x7FFF    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x00C8    //TX_NOISE_TH_6
-379    0x000A    //TX_MINENOISE_TH
-380    0x0000    //TX_MINENOISE_MIC0_TH_MTS
-381    0x0000    //TX_MINENOISE_MIC0_TH_EXP
-382    0x0000    //TX_MINENOISE_MIC0_S_TH_MTS
-383    0x0000    //TX_MINENOISE_MIC0_S_TH_EXP
+379    0x02BC    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
 384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
 385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x6400    //TX_OUT_ENER_S_TH_NOISY
@@ -54740,22 +83169,22 @@
 388    0x7D00    //TX_OUT_ENER_TH_SPEECH
 389    0x0000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_CSX_ALPHA_0
-392    0x0000    //TX_CSX_ALPHA_1
-393    0x0000    //TX_CSX_ALPHA_2
-394    0x0000    //TX_CSX_ALPHA_3
-395    0x0000    //TX_MU_ARSP_EST
-396    0x0000    //TX_P_OUTBEAM_MIN_TH
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
 397    0x0000    //TX_EXTRA_NS_L
-398    0x0000    //TX_EXTRA_NS_A
-399    0x0000    //TX_VR_NOISE_FLOOR_TH
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0000    //TX_MIN_G_LOW300HZ
 401    0x0010    //TX_MAXLEVEL_CNG
 402    0x0000    //TX_STN_NOISE_TH
 403    0x0000    //TX_POST_MASK_SUP
 404    0x0000    //TX_POST_MASK_ADJUST
 405    0x0014    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x04E7    //TX_MINENOISE_MIC0_TH
 407    0x0226    //TX_MINENOISE_MIC0_S_TH
 408    0x2879    //TX_MIN_G_CTRL_SSNS
 409    0x0400    //TX_METAL_RTO_THR
@@ -54863,16 +83292,16 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x6666    //TX_MICTOBFGAIN0
 513    0x0014    //TX_FASTMUE_TH
-514    0x0000    //TX_DERVB_LEN_0
-515    0x0000    //TX_DERVB_LEN_1
-516    0x0000    //TX_RHO_DERVB
-517    0x0000    //TX_MIC_INDX_DERVB
-518    0x0000    //TX_MU_DERVB
-519    0x0000    //TX_DR_RESRV_0
-520    0x0000    //TX_DR_RESRV_1
-521    0x0000    //TX_DR_RESRV_2
-522    0x0000    //TX_DR_RESRV_3
-523    0x0000    //TX_DR_RESRV_4
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
@@ -54901,19 +83330,19 @@
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0000    //TX_BF_LESSCUT_BBIN
-554    0x0000    //TX_BF_LESSCUT_EBIN
-555    0x0000    //TX_POSTBFB0
-556    0x0000    //TX_POSTBFB
-557    0x0000    //TX_POSTBFE
-558    0x0000    //TX_SPEECH_SNR_TH
-559    0x0000    //TX_PB_MAX_PRI_SNR_TH
-560    0x0000    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -55238,16 +83667,81 @@
 886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
 888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xD99A    //TX_FASTNS_MASK5_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+891    0x7000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x0040    //RX_RECVFUNC_MODE_0
+0    0x2040    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -55257,7 +83751,7 @@
 7    0x3000    //RX_TDDRC_ALPHA_UP_2
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0082    //RX_PGA
+10    0x050D    //RX_PGA
 11    0x7652    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -55272,7 +83766,7 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x0000    //RX_FENS_RESRV_0
+25    0x000A    //RX_FENS_RESRV_0
 26    0x0000    //RX_FENS_RESRV_1
 27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
@@ -55376,7 +83870,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x0080    //RX_MIN_G_FP
 128    0x2000    //RX_MAX_G_FP
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0010    //RX_MAXLEVEL_CNG
 132    0x0000    //RX_BWE_UV_TH
@@ -55501,7 +83995,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -55600,7 +84094,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -55699,7 +84193,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -55798,7 +84292,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -55897,7 +84391,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -55996,7 +84490,7 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -56095,6 +84589,22217 @@
 108    0x2000    //RX_FDDRC_SLANT_1_2
 109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x2040    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x050D    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0000    //RX_PITCH_BFR_LEN
+174    0x0000    //RX_SBD_PITCH_DET
+175    0x0000    //RX_PP_RESRV_0
+176    0x0000    //RX_PP_RESRV_1
+177    0xF800    //RX_N_SN_EST
+178    0x0000    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0000    //RX_FENS_RESRV_1
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+187    0x0000    //RX_EXTRA_NS_L
+188    0x0000    //RX_EXTRA_NS_A
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x0000    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0003    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0010    //RX_MAXLEVEL_CNG
+289    0x0000    //RX_BWE_UV_TH
+290    0x0000    //RX_BWE_UV_TH2
+291    0x0000    //RX_BWE_UV_TH3
+292    0x0000    //RX_BWE_V_TH
+293    0x0000    //RX_BWE_GAIN1_V_TH1
+294    0x0000    //RX_BWE_GAIN1_V_TH2
+295    0x0000    //RX_BWE_UV_EQ
+296    0x0000    //RX_BWE_V_EQ
+297    0x0000    //RX_BWE_TONE_TH
+298    0x0000    //RX_BWE_UV_HOLD_T
+299    0x0000    //RX_BWE_GAIN2_ALPHA
+300    0x0000    //RX_BWE_GAIN3_ALPHA
+301    0x0000    //RX_BWE_CUTOFF
+302    0x0000    //RX_BWE_GAINFILL
+303    0x0000    //RX_BWE_MAXTH_TONE
+304    0x0000    //RX_BWE_EQ_0
+305    0x0000    //RX_BWE_EQ_1
+306    0x0000    //RX_BWE_EQ_2
+307    0x0000    //RX_BWE_EQ_3
+308    0x0000    //RX_BWE_EQ_4
+309    0x0000    //RX_BWE_EQ_5
+310    0x0000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-USB_BLACKBIRD-RESERVE2-SWB
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x6F68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6D60    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x6590    //TX_DTD_THR1_0
+198    0x7D00    //TX_DTD_THR1_1
+199    0x6590    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xF700    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0012    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x001C    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x0009    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x5000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x3000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x3000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7000    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x00FA    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x2904    //TX_NOISE_TH_3
+373    0x07D0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0064    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4040    //TX_FDEQ_GAIN_6
+574    0x4040    //TX_FDEQ_GAIN_7
+575    0x4040    //TX_FDEQ_GAIN_8
+576    0x3838    //TX_FDEQ_GAIN_9
+577    0x3838    //TX_FDEQ_GAIN_10
+578    0x3828    //TX_FDEQ_GAIN_11
+579    0x2828    //TX_FDEQ_GAIN_12
+580    0x2828    //TX_FDEQ_GAIN_13
+581    0x1C1C    //TX_FDEQ_GAIN_14
+582    0x1C1C    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x284A    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0050    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0002    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0020    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x243C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E52    //RX_FDEQ_GAIN_0
+40    0x5252    //RX_FDEQ_GAIN_1
+41    0x5252    //RX_FDEQ_GAIN_2
+42    0x5250    //RX_FDEQ_GAIN_3
+43    0x4C46    //RX_FDEQ_GAIN_4
+44    0x4748    //RX_FDEQ_GAIN_5
+45    0x5768    //RX_FDEQ_GAIN_6
+46    0x6162    //RX_FDEQ_GAIN_7
+47    0x5252    //RX_FDEQ_GAIN_8
+48    0x5256    //RX_FDEQ_GAIN_9
+49    0x5248    //RX_FDEQ_GAIN_10
+50    0x3434    //RX_FDEQ_GAIN_11
+51    0x3436    //RX_FDEQ_GAIN_12
+52    0x2A18    //RX_FDEQ_GAIN_13
+53    0x1830    //RX_FDEQ_GAIN_14
+54    0x3648    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x023E    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x0D90    //RX_TPKA_FP
+127    0x032D    //RX_MIN_G_FP
+128    0x0A00    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0011    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0030    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0050    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0089    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x243C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E52    //RX_FDEQ_GAIN_0
+197    0x5252    //RX_FDEQ_GAIN_1
+198    0x5252    //RX_FDEQ_GAIN_2
+199    0x5250    //RX_FDEQ_GAIN_3
+200    0x4C46    //RX_FDEQ_GAIN_4
+201    0x4748    //RX_FDEQ_GAIN_5
+202    0x5768    //RX_FDEQ_GAIN_6
+203    0x6162    //RX_FDEQ_GAIN_7
+204    0x5252    //RX_FDEQ_GAIN_8
+205    0x5256    //RX_FDEQ_GAIN_9
+206    0x5248    //RX_FDEQ_GAIN_10
+207    0x3434    //RX_FDEQ_GAIN_11
+208    0x3436    //RX_FDEQ_GAIN_12
+209    0x2A18    //RX_FDEQ_GAIN_13
+210    0x1830    //RX_FDEQ_GAIN_14
+211    0x3648    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x023E    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x0D90    //RX_TPKA_FP
+284    0x032D    //RX_MIN_G_FP
+285    0x0A00    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0011    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0030    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0050    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0089    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-GOOGLE_CONDOR-RESERVE2-SWB
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0383    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x02F3    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x202C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x202C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-RESERVE1-RESERVE2-SWB
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0383    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x02F3    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x202C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x202C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-RESERVE2-SWB
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00F3    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009C    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7600    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x0600    //TX_MIN_EQ_RE_EST_1
+154    0x3000    //TX_MIN_EQ_RE_EST_2
+155    0x3000    //TX_MIN_EQ_RE_EST_3
+156    0x3000    //TX_MIN_EQ_RE_EST_4
+157    0x3000    //TX_MIN_EQ_RE_EST_5
+158    0x3000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x7800    //TX_MIN_EQ_RE_EST_8
+161    0x7800    //TX_MIN_EQ_RE_EST_9
+162    0x7800    //TX_MIN_EQ_RE_EST_10
+163    0x7800    //TX_MIN_EQ_RE_EST_11
+164    0x7800    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x3000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0680    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7B0C    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x36B0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x01F4    //TX_RATIO_DT_L_TH_HIGH
+226    0x59D8    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x00C8    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0000    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0024    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x7FFF    //TX_A_POST_FILT_S_1
+316    0x7FFF    //TX_A_POST_FILT_S_2
+317    0x7FFF    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x7FFF    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x6000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7F00    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x3E80    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x36B0    //TX_DT_BINVAD_ENDF
+358    0x0200    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x36B0    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x2CEC    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E5C    //TX_FDEQ_GAIN_6
+574    0x564E    //TX_FDEQ_GAIN_7
+575    0x4C4E    //TX_FDEQ_GAIN_8
+576    0x4E45    //TX_FDEQ_GAIN_9
+577    0x494A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x5C54    //TX_FDEQ_GAIN_12
+580    0x5466    //TX_FDEQ_GAIN_13
+581    0x5C70    //TX_FDEQ_GAIN_14
+582    0x7C84    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0004    //TX_TDDRC_THRD_1
+856    0x1000    //TX_TDDRC_THRD_2
+857    0x1000    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x1380    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x01C2    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7918    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x3A98    //TX_DTD_THR1_MICMUTE_2
+914    0x32C8    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0xE4A8    //TX_AMS_RESRV_02
+945    0x1770    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x202C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x202C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-RESERVE2-SWB
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0383    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x02F3    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x2024    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0014    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0021    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0037    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x2024    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000C    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000C    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0014    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0021    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0037    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-TTY_HCO-RESERVE2-SWB
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0000    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0078    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0302    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0000    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0000    //TX_MICS_OF_PAIR0
+38    0x0000    //TX_MICS_OF_PAIR1
+39    0x0000    //TX_MICS_OF_PAIR2
+40    0x0000    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0003    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x0000    //TX_HD_BIN_MASK
+53    0x0000    //TX_HD_SUBAND_MASK
+54    0x0000    //TX_HD_FRAME_AVG_MASK
+55    0x0000    //TX_HD_MIN_FRQ
+56    0x0000    //TX_HD_ALPHA_PSD
+57    0x0000    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0x0000    //TX_T_PSDVAT
+63    0x0000    //TX_CNT
+64    0x0000    //TX_ANTI_HOWL_GAIN
+65    0x0000    //TX_MICFORBFMARK_0
+66    0x0000    //TX_MICFORBFMARK_1
+67    0x0000    //TX_MICFORBFMARK_2
+68    0x0000    //TX_MICFORBFMARK_3
+69    0x0000    //TX_MICFORBFMARK_4
+70    0x0000    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x0000    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x0000    //TX_ADCS_GAIN
+112    0x0000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x7FFF    //TX_BLMIC_BLKFACTOR
+116    0x7FFF    //TX_BRMIC_BLKFACTOR
+117    0x000A    //TX_MICBLK_START_BIN
+118    0x0041    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x0000    //TX_FE_ENER_TH_MTS
+124    0x0000    //TX_FE_ENER_TH_EXP
+125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0020    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7800    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6000    //TX_THR_PITCH_DET_2
+133    0x0000    //TX_PITCH_BFR_LEN
+134    0x0000    //TX_SBD_PITCH_DET
+135    0x0000    //TX_TD_AEC_L
+136    0x0000    //TX_MU0_UNP_TD_AEC
+137    0x0000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x2000    //TX_AEC_REF_GAIN_0
+148    0x2000    //TX_AEC_REF_GAIN_1
+149    0x2000    //TX_AEC_REF_GAIN_2
+150    0x4000    //TX_EAD_THR
+151    0x0200    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x0000    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0008    //TX_SE_HOLD_N
+170    0x0050    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x0000    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x0000    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0000    //TX_FRQ_LIN_LEN
+184    0x0000    //TX_FRQ_AEC_LEN_RHO
+185    0x0000    //TX_MU0_UNP_FRQ_AEC
+186    0x0000    //TX_MU0_PTD_FRQ_AEC
+187    0x0000    //TX_MINENOISETH
+188    0x0000    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x0000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7333    //TX_DTD_THR1_0
+198    0x7333    //TX_DTD_THR1_1
+199    0x7333    //TX_DTD_THR1_2
+200    0x7333    //TX_DTD_THR1_3
+201    0x7333    //TX_DTD_THR1_4
+202    0x7333    //TX_DTD_THR1_5
+203    0x7333    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0400    //TX_DT_CUT_K
+214    0x0000    //TX_DT_CUT_THR
+215    0x0000    //TX_COMFORT_G
+216    0x0000    //TX_POWER_YOUT_TH
+217    0x0000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0000    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x0000    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0000    //TX_DT_RESRV_7
+240    0x0000    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF800    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0A00    //TX_N_SN_EST
+267    0x0000    //TX_INBEAM_T
+268    0x0000    //TX_INBEAMHOLDT
+269    0x1FFF    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0000    //TX_B_POST_FLT_0
+280    0x0000    //TX_B_POST_FLT_1
+281    0x001A    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x000C    //TX_NS_LVL_CTRL_3
+285    0x000C    //TX_NS_LVL_CTRL_4
+286    0x000C    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x000C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0014    //TX_MIN_GAIN_S_1
+291    0x0014    //TX_MIN_GAIN_S_2
+292    0x0014    //TX_MIN_GAIN_S_3
+293    0x0014    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x0000    //TX_NMOS_SUP
+298    0x0064    //TX_NS_MAX_PRI_SNR_TH
+299    0x7FFF    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x1200    //TX_THR_LFNS
+309    0x0147    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x7FFF    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x7FFF    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x1000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x6666    //TX_A_POST_FILT_S_3
+318    0x6666    //TX_A_POST_FILT_S_4
+319    0x6666    //TX_A_POST_FILT_S_5
+320    0x199A    //TX_A_POST_FILT_S_6
+321    0x6666    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7E00    //TX_LAMBDA_PFILT_S_0
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
+343    0x7E00    //TX_LAMBDA_PFILT_S_4
+344    0x7E00    //TX_LAMBDA_PFILT_S_5
+345    0x7E00    //TX_LAMBDA_PFILT_S_6
+346    0x7E00    //TX_LAMBDA_PFILT_S_7
+347    0x0010    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x0000    //TX_K_PEPPER_HF
+350    0x0000    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0000    //TX_DT_BINVAD_TH_0
+354    0x0000    //TX_DT_BINVAD_TH_1
+355    0x0000    //TX_DT_BINVAD_TH_2
+356    0x0000    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0001    //TX_BF_SGRAD_FLG
+362    0x0000    //TX_BF_DVG_TH
+363    0x0000    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x05A0    //TX_NDETCT
+367    0x0383    //TX_NOISE_TH_0
+368    0x1388    //TX_NOISE_TH_0_2
+369    0x3A98    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x0032    //TX_NOISE_TH_2
+372    0x3D54    //TX_NOISE_TH_3
+373    0x012C    //TX_NOISE_TH_4
+374    0x07D0    //TX_NOISE_TH_5
+375    0x6590    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x00C8    //TX_NOISE_TH_6
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
+385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x6400    //TX_OUT_ENER_S_TH_NOISY
+387    0x6400    //TX_OUT_ENER_TH_NOISE
+388    0x7D00    //TX_OUT_ENER_TH_SPEECH
+389    0x0000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0000    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0000    //TX_MIN_G_LOW300HZ
+401    0x0010    //TX_MAXLEVEL_CNG
+402    0x0000    //TX_STN_NOISE_TH
+403    0x0000    //TX_POST_MASK_SUP
+404    0x0000    //TX_POST_MASK_ADJUST
+405    0x0014    //TX_NS_ENOISE_MIC0_TH
+406    0x02F3    //TX_MINENOISE_MIC0_TH
+407    0x0226    //TX_MINENOISE_MIC0_S_TH
+408    0x2879    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x2000    //TX_RHO_UPB
+415    0x0020    //TX_N_HOLD_HS
+416    0x0009    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x0219    //TX_THR_STD_PLH
+421    0x09C4    //TX_N_HOLD_STD
+422    0x0166    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x1000    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0000    //TX_HS_VAD_BIN
+435    0x0000    //TX_THR_VAD_HS
+436    0x0000    //TX_MEAN_RTO_MIN_TH2
+437    0x0000    //TX_SILENCE_T
+438    0x4000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x001E    //TX_DOA_VAD_THR_1
+445    0x001E    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x005A    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x005A    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x005A    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0172    //TX_BF_HOLDOFF_T
+473    0x8000    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x071C    //TX_DOA_TRACK_HT
+477    0x0280    //TX_N1_HOLD_HF
+478    0x0140    //TX_N2_HOLD_HF
+479    0x2AAB    //TX_BF_RESET_THR_HF
+480    0x4000    //TX_DOA_SMOOTH
+481    0x0000    //TX_MU_BF
+482    0x0200    //TX_BF_MU_LF_B2
+483    0x0000    //TX_BF_FC_END_BIN_B2
+484    0x0000    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0000    //TX_N_DOA_SEED
+488    0x0000    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x0000    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x0000    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x0000    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0168    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0004    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0230    //TX_NOR_OFF_TH1
+503    0xD333    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x6666    //TX_MICTOBFGAIN0
+513    0x0014    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x0000    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0028    //TX_SNR_THR
+531    0x03E8    //TX_ENGY_THR
+532    0x0000    //TX_CORR_HIGH_TH
+533    0x0000    //TX_ENGY_THR_2
+534    0x0000    //TX_MEAN_RTO_THR
+535    0x0000    //TX_WNS_ENOISE_MIC0_TH
+536    0x0000    //TX_RATIOMICL_TH
+537    0x0000    //TX_CALIG_HS
+538    0x000A    //TX_LVL_CTRL
+539    0x0000    //TX_WIND_SUPRTO
+540    0x0000    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x0000    //TX_RATIOMICH_TH
+543    0x0000    //TX_WIND_INBEAM_L_TH
+544    0x0000    //TX_WIND_INBEAM_H_TH
+545    0x0000    //TX_WNS_RESRV_0
+546    0x0000    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0000    //TX_FDEQ_BIN_0
+592    0x0000    //TX_FDEQ_BIN_1
+593    0x0000    //TX_FDEQ_BIN_2
+594    0x0000    //TX_FDEQ_BIN_3
+595    0x0000    //TX_FDEQ_BIN_4
+596    0x0000    //TX_FDEQ_BIN_5
+597    0x0000    //TX_FDEQ_BIN_6
+598    0x0000    //TX_FDEQ_BIN_7
+599    0x0000    //TX_FDEQ_BIN_8
+600    0x0000    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0000    //TX_PREEQ_BIN_MIC0_0
+642    0x0000    //TX_PREEQ_BIN_MIC0_1
+643    0x0000    //TX_PREEQ_BIN_MIC0_2
+644    0x0000    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0000    //TX_PREEQ_BIN_MIC1_0
+691    0x0000    //TX_PREEQ_BIN_MIC1_1
+692    0x0000    //TX_PREEQ_BIN_MIC1_2
+693    0x0000    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0000    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0064    //TX_MIC_CALIBRATION_0
+766    0x006A    //TX_MIC_CALIBRATION_1
+767    0x006A    //TX_MIC_CALIBRATION_2
+768    0x006B    //TX_MIC_CALIBRATION_3
+769    0x0048    //TX_MIC_PWR_BIAS_0
+770    0x003C    //TX_MIC_PWR_BIAS_1
+771    0x003C    //TX_MIC_PWR_BIAS_2
+772    0x003C    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
+788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
+789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
+790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
+791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0002    //TX_DEADMIC_SILENCE_TH
+817    0x0147    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x0000    //TX_KS_NOISEPASTE_FACTOR
+824    0x0000    //TX_KS_CONFIG
+825    0x0000    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x0000    //TX_A_POST_FLT_FP
+835    0x0000    //TX_RTO_OUTBEAM_TH
+836    0x0000    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0000    //TX_FFP_RESRV_2
+849    0x0000    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x0E80    //TX_TDDRC_THRD_2
+857    0x3800    //TX_TDDRC_THRD_3
+858    0x2A00    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x0000    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0000    //TX_TDDRC_SMT_W
+866    0x0100    //TX_TDDRC_DRC_GAIN
+867    0x0000    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x1EB8    //TX_TFMASKLTH
+870    0x170A    //TX_TFMASKLTHL
+871    0x7FFF    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x0000    //TX_FASTNS_OUTIN_TH
+884    0x0000    //TX_FASTNS_TFMASK_TH
+885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x247C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x847C    //RX_FDEQ_GAIN_0
+40    0x5A56    //RX_FDEQ_GAIN_1
+41    0x6266    //RX_FDEQ_GAIN_2
+42    0x6E7A    //RX_FDEQ_GAIN_3
+43    0x8678    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x706E    //RX_FDEQ_GAIN_6
+46    0x6C64    //RX_FDEQ_GAIN_7
+47    0x5C6A    //RX_FDEQ_GAIN_8
+48    0x6268    //RX_FDEQ_GAIN_9
+49    0x6462    //RX_FDEQ_GAIN_10
+50    0x646E    //RX_FDEQ_GAIN_11
+51    0x6860    //RX_FDEQ_GAIN_12
+52    0x646A    //RX_FDEQ_GAIN_13
+53    0x7478    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0105    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x0CE0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03FC    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0B50    //RX_MAX_G_FP
+129    0x0058    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0039    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0054    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0085    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00C7    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0134    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01EE    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8464    //RX_FDEQ_GAIN_0
+40    0x5150    //RX_FDEQ_GAIN_1
+41    0x555C    //RX_FDEQ_GAIN_2
+42    0x6E75    //RX_FDEQ_GAIN_3
+43    0x8077    //RX_FDEQ_GAIN_4
+44    0x756D    //RX_FDEQ_GAIN_5
+45    0x6667    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03AD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F4F    //RX_FDEQ_GAIN_1
+41    0x555A    //RX_FDEQ_GAIN_2
+42    0x6069    //RX_FDEQ_GAIN_3
+43    0x7D86    //RX_FDEQ_GAIN_4
+44    0x8682    //RX_FDEQ_GAIN_5
+45    0x7461    //RX_FDEQ_GAIN_6
+46    0x5352    //RX_FDEQ_GAIN_7
+47    0x5860    //RX_FDEQ_GAIN_8
+48    0x5D5F    //RX_FDEQ_GAIN_9
+49    0x5A52    //RX_FDEQ_GAIN_10
+50    0x535A    //RX_FDEQ_GAIN_11
+51    0x6654    //RX_FDEQ_GAIN_12
+52    0x6068    //RX_FDEQ_GAIN_13
+53    0x6F69    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x027C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0014    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0039    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0054    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0085    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x00C7    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0134    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01EE    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8464    //RX_FDEQ_GAIN_0
+197    0x5150    //RX_FDEQ_GAIN_1
+198    0x555C    //RX_FDEQ_GAIN_2
+199    0x6E75    //RX_FDEQ_GAIN_3
+200    0x8077    //RX_FDEQ_GAIN_4
+201    0x756D    //RX_FDEQ_GAIN_5
+202    0x6667    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0006    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03AD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F4F    //RX_FDEQ_GAIN_1
+198    0x555A    //RX_FDEQ_GAIN_2
+199    0x6069    //RX_FDEQ_GAIN_3
+200    0x7D86    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7461    //RX_FDEQ_GAIN_6
+203    0x5352    //RX_FDEQ_GAIN_7
+204    0x5860    //RX_FDEQ_GAIN_8
+205    0x5D5F    //RX_FDEQ_GAIN_9
+206    0x5A52    //RX_FDEQ_GAIN_10
+207    0x535A    //RX_FDEQ_GAIN_11
+208    0x6654    //RX_FDEQ_GAIN_12
+209    0x6068    //RX_FDEQ_GAIN_13
+210    0x6F69    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-TTY_VCO-RESERVE2-SWB
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00F3    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009C    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7600    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x0600    //TX_MIN_EQ_RE_EST_1
+154    0x3000    //TX_MIN_EQ_RE_EST_2
+155    0x3000    //TX_MIN_EQ_RE_EST_3
+156    0x3000    //TX_MIN_EQ_RE_EST_4
+157    0x3000    //TX_MIN_EQ_RE_EST_5
+158    0x3000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x7800    //TX_MIN_EQ_RE_EST_8
+161    0x7800    //TX_MIN_EQ_RE_EST_9
+162    0x7800    //TX_MIN_EQ_RE_EST_10
+163    0x7800    //TX_MIN_EQ_RE_EST_11
+164    0x7800    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x3000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0680    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7B0C    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x36B0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x01F4    //TX_RATIO_DT_L_TH_HIGH
+226    0x59D8    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x00C8    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0000    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0024    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x7FFF    //TX_A_POST_FILT_S_1
+316    0x7FFF    //TX_A_POST_FILT_S_2
+317    0x7FFF    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x7FFF    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x6000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7F00    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x3E80    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x36B0    //TX_DT_BINVAD_ENDF
+358    0x0200    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x36B0    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x2CEC    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E5C    //TX_FDEQ_GAIN_6
+574    0x564E    //TX_FDEQ_GAIN_7
+575    0x4C4E    //TX_FDEQ_GAIN_8
+576    0x4E45    //TX_FDEQ_GAIN_9
+577    0x494A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x5C54    //TX_FDEQ_GAIN_12
+580    0x5466    //TX_FDEQ_GAIN_13
+581    0x5C70    //TX_FDEQ_GAIN_14
+582    0x7C84    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0004    //TX_TDDRC_THRD_1
+856    0x1000    //TX_TDDRC_THRD_2
+857    0x1000    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x1380    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x01C2    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7918    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x3A98    //TX_DTD_THR1_MICMUTE_2
+914    0x32C8    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0xE4A8    //TX_AMS_RESRV_02
+945    0x1770    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x2040    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x050D    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0000    //RX_PITCH_BFR_LEN
+17    0x0000    //RX_SBD_PITCH_DET
+18    0x0000    //RX_PP_RESRV_0
+19    0x0000    //RX_PP_RESRV_1
+20    0xF800    //RX_N_SN_EST
+21    0x0000    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0000    //RX_FENS_RESRV_1
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+30    0x0000    //RX_EXTRA_NS_L
+31    0x0000    //RX_EXTRA_NS_A
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x0000    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0003    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0010    //RX_MAXLEVEL_CNG
+132    0x0000    //RX_BWE_UV_TH
+133    0x0000    //RX_BWE_UV_TH2
+134    0x0000    //RX_BWE_UV_TH3
+135    0x0000    //RX_BWE_V_TH
+136    0x0000    //RX_BWE_GAIN1_V_TH1
+137    0x0000    //RX_BWE_GAIN1_V_TH2
+138    0x0000    //RX_BWE_UV_EQ
+139    0x0000    //RX_BWE_V_EQ
+140    0x0000    //RX_BWE_TONE_TH
+141    0x0000    //RX_BWE_UV_HOLD_T
+142    0x0000    //RX_BWE_GAIN2_ALPHA
+143    0x0000    //RX_BWE_GAIN3_ALPHA
+144    0x0000    //RX_BWE_CUTOFF
+145    0x0000    //RX_BWE_GAINFILL
+146    0x0000    //RX_BWE_MAXTH_TONE
+147    0x0000    //RX_BWE_EQ_0
+148    0x0000    //RX_BWE_EQ_1
+149    0x0000    //RX_BWE_EQ_2
+150    0x0000    //RX_BWE_EQ_3
+151    0x0000    //RX_BWE_EQ_4
+152    0x0000    //RX_BWE_EQ_5
+153    0x0000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x2040    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x050D    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0000    //RX_PITCH_BFR_LEN
+174    0x0000    //RX_SBD_PITCH_DET
+175    0x0000    //RX_PP_RESRV_0
+176    0x0000    //RX_PP_RESRV_1
+177    0xF800    //RX_N_SN_EST
+178    0x0000    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0000    //RX_FENS_RESRV_1
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+187    0x0000    //RX_EXTRA_NS_L
+188    0x0000    //RX_EXTRA_NS_A
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x0000    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0003    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0010    //RX_MAXLEVEL_CNG
+289    0x0000    //RX_BWE_UV_TH
+290    0x0000    //RX_BWE_UV_TH2
+291    0x0000    //RX_BWE_UV_TH3
+292    0x0000    //RX_BWE_V_TH
+293    0x0000    //RX_BWE_GAIN1_V_TH1
+294    0x0000    //RX_BWE_GAIN1_V_TH2
+295    0x0000    //RX_BWE_UV_EQ
+296    0x0000    //RX_BWE_V_EQ
+297    0x0000    //RX_BWE_TONE_TH
+298    0x0000    //RX_BWE_UV_HOLD_T
+299    0x0000    //RX_BWE_GAIN2_ALPHA
+300    0x0000    //RX_BWE_GAIN3_ALPHA
+301    0x0000    //RX_BWE_CUTOFF
+302    0x0000    //RX_BWE_GAINFILL
+303    0x0000    //RX_BWE_MAXTH_TONE
+304    0x0000    //RX_BWE_EQ_0
+305    0x0000    //RX_BWE_EQ_1
+306    0x0000    //RX_BWE_EQ_2
+307    0x0000    //RX_BWE_EQ_3
+308    0x0000    //RX_BWE_EQ_4
+309    0x0000    //RX_BWE_EQ_5
+310    0x0000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-TTY_FULL-RESERVE2-SWB
+#PARAM_MODE  Full
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0000    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0078    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0302    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0000    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0000    //TX_MICS_OF_PAIR0
+38    0x0000    //TX_MICS_OF_PAIR1
+39    0x0000    //TX_MICS_OF_PAIR2
+40    0x0000    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0003    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x0000    //TX_HD_BIN_MASK
+53    0x0000    //TX_HD_SUBAND_MASK
+54    0x0000    //TX_HD_FRAME_AVG_MASK
+55    0x0000    //TX_HD_MIN_FRQ
+56    0x0000    //TX_HD_ALPHA_PSD
+57    0x0000    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0x0000    //TX_T_PSDVAT
+63    0x0000    //TX_CNT
+64    0x0000    //TX_ANTI_HOWL_GAIN
+65    0x0000    //TX_MICFORBFMARK_0
+66    0x0000    //TX_MICFORBFMARK_1
+67    0x0000    //TX_MICFORBFMARK_2
+68    0x0000    //TX_MICFORBFMARK_3
+69    0x0000    //TX_MICFORBFMARK_4
+70    0x0000    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x0000    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x0000    //TX_ADCS_GAIN
+112    0x0000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x7FFF    //TX_BLMIC_BLKFACTOR
+116    0x7FFF    //TX_BRMIC_BLKFACTOR
+117    0x000A    //TX_MICBLK_START_BIN
+118    0x0041    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x0000    //TX_FE_ENER_TH_MTS
+124    0x0000    //TX_FE_ENER_TH_EXP
+125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0020    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7800    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6000    //TX_THR_PITCH_DET_2
+133    0x0000    //TX_PITCH_BFR_LEN
+134    0x0000    //TX_SBD_PITCH_DET
+135    0x0000    //TX_TD_AEC_L
+136    0x0000    //TX_MU0_UNP_TD_AEC
+137    0x0000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x2000    //TX_AEC_REF_GAIN_0
+148    0x2000    //TX_AEC_REF_GAIN_1
+149    0x2000    //TX_AEC_REF_GAIN_2
+150    0x4000    //TX_EAD_THR
+151    0x0200    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x0000    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0008    //TX_SE_HOLD_N
+170    0x0050    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x0000    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x0000    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0000    //TX_FRQ_LIN_LEN
+184    0x0000    //TX_FRQ_AEC_LEN_RHO
+185    0x0000    //TX_MU0_UNP_FRQ_AEC
+186    0x0000    //TX_MU0_PTD_FRQ_AEC
+187    0x0000    //TX_MINENOISETH
+188    0x0000    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x0000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7333    //TX_DTD_THR1_0
+198    0x7333    //TX_DTD_THR1_1
+199    0x7333    //TX_DTD_THR1_2
+200    0x7333    //TX_DTD_THR1_3
+201    0x7333    //TX_DTD_THR1_4
+202    0x7333    //TX_DTD_THR1_5
+203    0x7333    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0400    //TX_DT_CUT_K
+214    0x0000    //TX_DT_CUT_THR
+215    0x0000    //TX_COMFORT_G
+216    0x0000    //TX_POWER_YOUT_TH
+217    0x0000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0000    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x0000    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0000    //TX_DT_RESRV_7
+240    0x0000    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF800    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0A00    //TX_N_SN_EST
+267    0x0000    //TX_INBEAM_T
+268    0x0000    //TX_INBEAMHOLDT
+269    0x1FFF    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0000    //TX_B_POST_FLT_0
+280    0x0000    //TX_B_POST_FLT_1
+281    0x001A    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x000C    //TX_NS_LVL_CTRL_3
+285    0x000C    //TX_NS_LVL_CTRL_4
+286    0x000C    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x000C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0014    //TX_MIN_GAIN_S_1
+291    0x0014    //TX_MIN_GAIN_S_2
+292    0x0014    //TX_MIN_GAIN_S_3
+293    0x0014    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x0000    //TX_NMOS_SUP
+298    0x0064    //TX_NS_MAX_PRI_SNR_TH
+299    0x7FFF    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x1200    //TX_THR_LFNS
+309    0x0147    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x7FFF    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x7FFF    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x1000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x6666    //TX_A_POST_FILT_S_3
+318    0x6666    //TX_A_POST_FILT_S_4
+319    0x6666    //TX_A_POST_FILT_S_5
+320    0x199A    //TX_A_POST_FILT_S_6
+321    0x6666    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7E00    //TX_LAMBDA_PFILT_S_0
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
+343    0x7E00    //TX_LAMBDA_PFILT_S_4
+344    0x7E00    //TX_LAMBDA_PFILT_S_5
+345    0x7E00    //TX_LAMBDA_PFILT_S_6
+346    0x7E00    //TX_LAMBDA_PFILT_S_7
+347    0x0010    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x0000    //TX_K_PEPPER_HF
+350    0x0000    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0000    //TX_DT_BINVAD_TH_0
+354    0x0000    //TX_DT_BINVAD_TH_1
+355    0x0000    //TX_DT_BINVAD_TH_2
+356    0x0000    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0001    //TX_BF_SGRAD_FLG
+362    0x0000    //TX_BF_DVG_TH
+363    0x0000    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x05A0    //TX_NDETCT
+367    0x0383    //TX_NOISE_TH_0
+368    0x1388    //TX_NOISE_TH_0_2
+369    0x3A98    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x0032    //TX_NOISE_TH_2
+372    0x3D54    //TX_NOISE_TH_3
+373    0x012C    //TX_NOISE_TH_4
+374    0x07D0    //TX_NOISE_TH_5
+375    0x6590    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x00C8    //TX_NOISE_TH_6
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
+385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x6400    //TX_OUT_ENER_S_TH_NOISY
+387    0x6400    //TX_OUT_ENER_TH_NOISE
+388    0x7D00    //TX_OUT_ENER_TH_SPEECH
+389    0x0000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0000    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0000    //TX_MIN_G_LOW300HZ
+401    0x0010    //TX_MAXLEVEL_CNG
+402    0x0000    //TX_STN_NOISE_TH
+403    0x0000    //TX_POST_MASK_SUP
+404    0x0000    //TX_POST_MASK_ADJUST
+405    0x0014    //TX_NS_ENOISE_MIC0_TH
+406    0x02F3    //TX_MINENOISE_MIC0_TH
+407    0x0226    //TX_MINENOISE_MIC0_S_TH
+408    0x2879    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x2000    //TX_RHO_UPB
+415    0x0020    //TX_N_HOLD_HS
+416    0x0009    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x0219    //TX_THR_STD_PLH
+421    0x09C4    //TX_N_HOLD_STD
+422    0x0166    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x1000    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0000    //TX_HS_VAD_BIN
+435    0x0000    //TX_THR_VAD_HS
+436    0x0000    //TX_MEAN_RTO_MIN_TH2
+437    0x0000    //TX_SILENCE_T
+438    0x4000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x001E    //TX_DOA_VAD_THR_1
+445    0x001E    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x005A    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x005A    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x005A    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0172    //TX_BF_HOLDOFF_T
+473    0x8000    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x071C    //TX_DOA_TRACK_HT
+477    0x0280    //TX_N1_HOLD_HF
+478    0x0140    //TX_N2_HOLD_HF
+479    0x2AAB    //TX_BF_RESET_THR_HF
+480    0x4000    //TX_DOA_SMOOTH
+481    0x0000    //TX_MU_BF
+482    0x0200    //TX_BF_MU_LF_B2
+483    0x0000    //TX_BF_FC_END_BIN_B2
+484    0x0000    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0000    //TX_N_DOA_SEED
+488    0x0000    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x0000    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x0000    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x0000    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0168    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0004    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0230    //TX_NOR_OFF_TH1
+503    0xD333    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x6666    //TX_MICTOBFGAIN0
+513    0x0014    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x0000    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0028    //TX_SNR_THR
+531    0x03E8    //TX_ENGY_THR
+532    0x0000    //TX_CORR_HIGH_TH
+533    0x0000    //TX_ENGY_THR_2
+534    0x0000    //TX_MEAN_RTO_THR
+535    0x0000    //TX_WNS_ENOISE_MIC0_TH
+536    0x0000    //TX_RATIOMICL_TH
+537    0x0000    //TX_CALIG_HS
+538    0x000A    //TX_LVL_CTRL
+539    0x0000    //TX_WIND_SUPRTO
+540    0x0000    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x0000    //TX_RATIOMICH_TH
+543    0x0000    //TX_WIND_INBEAM_L_TH
+544    0x0000    //TX_WIND_INBEAM_H_TH
+545    0x0000    //TX_WNS_RESRV_0
+546    0x0000    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0000    //TX_FDEQ_BIN_0
+592    0x0000    //TX_FDEQ_BIN_1
+593    0x0000    //TX_FDEQ_BIN_2
+594    0x0000    //TX_FDEQ_BIN_3
+595    0x0000    //TX_FDEQ_BIN_4
+596    0x0000    //TX_FDEQ_BIN_5
+597    0x0000    //TX_FDEQ_BIN_6
+598    0x0000    //TX_FDEQ_BIN_7
+599    0x0000    //TX_FDEQ_BIN_8
+600    0x0000    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0000    //TX_PREEQ_BIN_MIC0_0
+642    0x0000    //TX_PREEQ_BIN_MIC0_1
+643    0x0000    //TX_PREEQ_BIN_MIC0_2
+644    0x0000    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0000    //TX_PREEQ_BIN_MIC1_0
+691    0x0000    //TX_PREEQ_BIN_MIC1_1
+692    0x0000    //TX_PREEQ_BIN_MIC1_2
+693    0x0000    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0000    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0064    //TX_MIC_CALIBRATION_0
+766    0x006A    //TX_MIC_CALIBRATION_1
+767    0x006A    //TX_MIC_CALIBRATION_2
+768    0x006B    //TX_MIC_CALIBRATION_3
+769    0x0048    //TX_MIC_PWR_BIAS_0
+770    0x003C    //TX_MIC_PWR_BIAS_1
+771    0x003C    //TX_MIC_PWR_BIAS_2
+772    0x003C    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
+788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
+789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
+790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
+791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0002    //TX_DEADMIC_SILENCE_TH
+817    0x0147    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x0000    //TX_KS_NOISEPASTE_FACTOR
+824    0x0000    //TX_KS_CONFIG
+825    0x0000    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x0000    //TX_A_POST_FLT_FP
+835    0x0000    //TX_RTO_OUTBEAM_TH
+836    0x0000    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0000    //TX_FFP_RESRV_2
+849    0x0000    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x0E80    //TX_TDDRC_THRD_2
+857    0x3800    //TX_TDDRC_THRD_3
+858    0x2A00    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x0000    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0000    //TX_TDDRC_SMT_W
+866    0x0100    //TX_TDDRC_DRC_GAIN
+867    0x0000    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x1EB8    //TX_TFMASKLTH
+870    0x170A    //TX_TFMASKLTHL
+871    0x7FFF    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x0000    //TX_FASTNS_OUTIN_TH
+884    0x0000    //TX_FASTNS_TFMASK_TH
+885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x2040    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x050D    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0000    //RX_PITCH_BFR_LEN
+17    0x0000    //RX_SBD_PITCH_DET
+18    0x0000    //RX_PP_RESRV_0
+19    0x0000    //RX_PP_RESRV_1
+20    0xF800    //RX_N_SN_EST
+21    0x0000    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0000    //RX_FENS_RESRV_1
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+30    0x0000    //RX_EXTRA_NS_L
+31    0x0000    //RX_EXTRA_NS_A
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x0000    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0003    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0010    //RX_MAXLEVEL_CNG
+132    0x0000    //RX_BWE_UV_TH
+133    0x0000    //RX_BWE_UV_TH2
+134    0x0000    //RX_BWE_UV_TH3
+135    0x0000    //RX_BWE_V_TH
+136    0x0000    //RX_BWE_GAIN1_V_TH1
+137    0x0000    //RX_BWE_GAIN1_V_TH2
+138    0x0000    //RX_BWE_UV_EQ
+139    0x0000    //RX_BWE_V_EQ
+140    0x0000    //RX_BWE_TONE_TH
+141    0x0000    //RX_BWE_UV_HOLD_T
+142    0x0000    //RX_BWE_GAIN2_ALPHA
+143    0x0000    //RX_BWE_GAIN3_ALPHA
+144    0x0000    //RX_BWE_CUTOFF
+145    0x0000    //RX_BWE_GAINFILL
+146    0x0000    //RX_BWE_MAXTH_TONE
+147    0x0000    //RX_BWE_EQ_0
+148    0x0000    //RX_BWE_EQ_1
+149    0x0000    //RX_BWE_EQ_2
+150    0x0000    //RX_BWE_EQ_3
+151    0x0000    //RX_BWE_EQ_4
+152    0x0000    //RX_BWE_EQ_5
+153    0x0000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x2040    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x050D    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0000    //RX_PITCH_BFR_LEN
+174    0x0000    //RX_SBD_PITCH_DET
+175    0x0000    //RX_PP_RESRV_0
+176    0x0000    //RX_PP_RESRV_1
+177    0xF800    //RX_N_SN_EST
+178    0x0000    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0000    //RX_FENS_RESRV_1
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+187    0x0000    //RX_EXTRA_NS_L
+188    0x0000    //RX_EXTRA_NS_A
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x0000    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0003    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0010    //RX_MAXLEVEL_CNG
+289    0x0000    //RX_BWE_UV_TH
+290    0x0000    //RX_BWE_UV_TH2
+291    0x0000    //RX_BWE_UV_TH3
+292    0x0000    //RX_BWE_V_TH
+293    0x0000    //RX_BWE_GAIN1_V_TH1
+294    0x0000    //RX_BWE_GAIN1_V_TH2
+295    0x0000    //RX_BWE_UV_EQ
+296    0x0000    //RX_BWE_V_EQ
+297    0x0000    //RX_BWE_TONE_TH
+298    0x0000    //RX_BWE_UV_HOLD_T
+299    0x0000    //RX_BWE_GAIN2_ALPHA
+300    0x0000    //RX_BWE_GAIN3_ALPHA
+301    0x0000    //RX_BWE_CUTOFF
+302    0x0000    //RX_BWE_GAINFILL
+303    0x0000    //RX_BWE_MAXTH_TONE
+304    0x0000    //RX_BWE_EQ_0
+305    0x0000    //RX_BWE_EQ_1
+306    0x0000    //RX_BWE_EQ_2
+307    0x0000    //RX_BWE_EQ_3
+308    0x0000    //RX_BWE_EQ_4
+309    0x0000    //RX_BWE_EQ_5
+310    0x0000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0